From 9f97e77db42f83d050f3e29f8416aaa09b76db09 Mon Sep 17 00:00:00 2001 From: robert Date: Sun, 30 Mar 2014 15:26:18 +0200 Subject: [PATCH] checker refactoring --- dram/src/core/Command.cpp | 10 ++ dram/src/core/Command.h | 2 +- dram/src/core/Controller.cpp | 6 +- dram/src/core/Controller.h | 2 +- dram/src/core/ControllerState.cpp | 12 +-- dram/src/core/ControllerState.h | 4 +- dram/src/core/IWrapperConnector.h | 2 +- dram/src/core/refresh/RefreshManager.cpp | 18 ++-- .../core/refresh/RefreshManagerBankwise.cpp | 9 +- dram/src/core/scheduling/CommandSchedule.h | 10 +- dram/src/core/scheduling/ScheduledCommand.cpp | 81 ++++++++++++++++ dram/src/core/scheduling/ScheduledCommand.h | 92 ++++--------------- .../scheduling/checker/ActivateChecker.cpp | 25 ++--- .../scheduling/checker/PrechargeChecker.cpp | 25 +++-- .../core/scheduling/checker/ReadChecker.cpp | 5 +- .../core/scheduling/checker/WriteChecker.cpp | 34 +++---- dram/src/simulation/controllerwrapper.h | 26 +++--- dram/src/simulation/main.cpp | 10 +- 18 files changed, 201 insertions(+), 172 deletions(-) create mode 100644 dram/src/core/scheduling/ScheduledCommand.cpp diff --git a/dram/src/core/Command.cpp b/dram/src/core/Command.cpp index 5815d1ac..5828c7eb 100644 --- a/dram/src/core/Command.cpp +++ b/dram/src/core/Command.cpp @@ -39,4 +39,14 @@ std::string commandToString(Command command) return ""; } +bool commandIsIn(Command command, std::vector commands) +{ + for(Command c : commands) + { + if(c == command) + return true; + } + return false; +} + } diff --git a/dram/src/core/Command.h b/dram/src/core/Command.h index 2fd3f83d..3cca0c24 100644 --- a/dram/src/core/Command.h +++ b/dram/src/core/Command.h @@ -14,7 +14,7 @@ namespace core { enum class Command {NOP, Precharge, PrechargeAll, Activate, Read, Write, ReadA, WriteA, AutoRefresh}; std::string commandToString(Command command); - +bool commandIsIn(Command command, std::vector commands); typedef std::vector CommandSequence; diff --git a/dram/src/core/Controller.cpp b/dram/src/core/Controller.cpp index 29981864..7107c97b 100644 --- a/dram/src/core/Controller.cpp +++ b/dram/src/core/Controller.cpp @@ -75,7 +75,7 @@ bool Controller::schedule(sc_time start, tlm::tlm_generic_payload& payload) } else { - send(schedule); + send(schedule, payload); return true; } } @@ -102,11 +102,11 @@ bool Controller::isBusy(sc_time currentTime, Bank bank) } -void Controller::send(const CommandSchedule& schedule) const +void Controller::send(const CommandSchedule& schedule, tlm::tlm_generic_payload& payload) const { for (const ScheduledCommand& cmd : schedule.getScheduledCommands()) { - wrapper.send(cmd); + wrapper.send(cmd, payload); } } diff --git a/dram/src/core/Controller.h b/dram/src/core/Controller.h index 33f6e2fb..8d40a324 100644 --- a/dram/src/core/Controller.h +++ b/dram/src/core/Controller.h @@ -38,7 +38,7 @@ public: void saveState(); void resetState(); - void send(const CommandSchedule& schedule) const; + void send(const CommandSchedule& schedule, tlm::tlm_generic_payload& payload) const; Configuration config; ControllerState state; diff --git a/dram/src/core/ControllerState.cpp b/dram/src/core/ControllerState.cpp index 7adabe6f..e9e96522 100644 --- a/dram/src/core/ControllerState.cpp +++ b/dram/src/core/ControllerState.cpp @@ -45,7 +45,6 @@ void ControllerState::change(const ScheduledCommand& scheduledCommand) { bus.blockSlot(scheduledCommand.getStart()); lastCommandsOnBus[scheduledCommand.getCommand()][scheduledCommand.getBank()] = scheduledCommand; - lastCommandsOnBus[scheduledCommand.getCommand()][scheduledCommand.getBank()].invalidateTransaction(); switch (scheduledCommand.getCommand()) { @@ -87,17 +86,8 @@ void ControllerState::cleanUp(sc_time time) { bus.cleanUpSlots(time); activates.cleanUpSlots(time); - //remove_if(lastDataStrobeCommands.begin(),lastDataStrobeCommands.end(), [&](ScheduledCommand command){return command.getEnd() < time;}); - vector tmp; - for(ScheduledCommand& command: lastDataStrobeCommands) - { - if(command.getEnd() >= time ) - { - tmp.emplace_back(command); - } - } - lastDataStrobeCommands = tmp; + lastDataStrobeCommands.remove_if([&](ScheduledCommand command){return command.getEnd() < time;}); } } /* namespace controller */ diff --git a/dram/src/core/ControllerState.h b/dram/src/core/ControllerState.h index acb5d65b..fc4a40df 100644 --- a/dram/src/core/ControllerState.h +++ b/dram/src/core/ControllerState.h @@ -16,7 +16,7 @@ #include "Configuration.h" #include #include -#include +#include namespace core { @@ -46,7 +46,7 @@ public: std::map > lastCommandsOnBus; Slots bus; Slots activates; - std::vector lastDataStrobeCommands; + std::list lastDataStrobeCommands; private: Configuration* config; diff --git a/dram/src/core/IWrapperConnector.h b/dram/src/core/IWrapperConnector.h index 413d598e..65501ffa 100644 --- a/dram/src/core/IWrapperConnector.h +++ b/dram/src/core/IWrapperConnector.h @@ -19,7 +19,7 @@ class IWrapperConnector { public: virtual ~IWrapperConnector() {} - virtual void send(const core::ScheduledCommand& command) = 0; + virtual void send(const core::ScheduledCommand& command,tlm::tlm_generic_payload& payload) = 0; virtual void send(Trigger trigger, sc_time time, tlm::tlm_generic_payload& payload) = 0; }; diff --git a/dram/src/core/refresh/RefreshManager.cpp b/dram/src/core/refresh/RefreshManager.cpp index 0a90c2eb..57bc5814 100644 --- a/dram/src/core/refresh/RefreshManager.cpp +++ b/dram/src/core/refresh/RefreshManager.cpp @@ -33,12 +33,12 @@ void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload& payload, sc_time if (time != nextPlannedRefresh) return; - ScheduledCommand nextRefresh(refreshPayloads.at(0), Command::AutoRefresh, time, timing.tRFC); + ScheduledCommand nextRefresh(Command::AutoRefresh, time, timing.tRFC, DramExtension::getExtension(refreshPayloads.at(0))); if (!controller.state.bankStates.allRowBuffersAreClosed()) { - ScheduledCommand precharge(refreshPayloads.at(0), Command::PrechargeAll, time, - controller.config.Timings.tRP); + ScheduledCommand precharge(Command::PrechargeAll, time, + controller.config.Timings.tRP, DramExtension::getExtension(refreshPayloads.at(0))); nextRefresh.setStart(precharge.getEnd()); @@ -46,9 +46,9 @@ void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload& payload, sc_time for (tlm::tlm_generic_payload& payload : refreshPayloads) { - ScheduledCommand prechargeToSend(payload, Command::PrechargeAll, precharge.getStart(), - controller.config.Timings.tRP); - controller.wrapper.send(prechargeToSend); + ScheduledCommand prechargeToSend(Command::PrechargeAll, precharge.getStart(), + controller.config.Timings.tRP, DramExtension::getExtension(payload)); + controller.wrapper.send(prechargeToSend, payload); } } @@ -56,9 +56,9 @@ void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload& payload, sc_time for (tlm::tlm_generic_payload& payload : refreshPayloads) { - ScheduledCommand refreshToSend(payload, Command::AutoRefresh, nextRefresh.getStart(), - timing.tRFC); - controller.wrapper.send(refreshToSend); + ScheduledCommand refreshToSend(Command::AutoRefresh, nextRefresh.getStart(), + timing.tRFC, DramExtension::getExtension(payload)); + controller.wrapper.send(refreshToSend, payload); } planNextRefresh(); diff --git a/dram/src/core/refresh/RefreshManagerBankwise.cpp b/dram/src/core/refresh/RefreshManagerBankwise.cpp index b61ae684..a70660d6 100644 --- a/dram/src/core/refresh/RefreshManagerBankwise.cpp +++ b/dram/src/core/refresh/RefreshManagerBankwise.cpp @@ -74,22 +74,21 @@ void RefreshManagerBankwise::RefreshManagerForBank::scheduleRefresh(sc_time time if (time != nextPlannedRefresh) return; - ScheduledCommand nextRefresh(refreshPayload, Command::AutoRefresh, time, timing.tRFC); + ScheduledCommand nextRefresh(Command::AutoRefresh, time, timing.tRFC, DramExtension::getExtension(refreshPayload)); if (controller.state.bankStates.rowBufferIsOpen(bank)) { - ScheduledCommand precharge(refreshPayload, Command::Precharge, time, - controller.config.Timings.tRP); + ScheduledCommand precharge(Command::Precharge, time, controller.config.Timings.tRP, DramExtension::getExtension(refreshPayload)); controller.state.bus.moveCommandToNextFreeSlot(precharge); nextRefresh.setStart(precharge.getEnd()); controller.state.change(precharge); - controller.wrapper.send(precharge); + controller.wrapper.send(precharge, refreshPayload); } controller.state.bus.moveCommandToNextFreeSlot(nextRefresh); controller.state.change(nextRefresh); - controller.wrapper.send(nextRefresh); + controller.wrapper.send(nextRefresh, refreshPayload); planNextRefresh(); } diff --git a/dram/src/core/scheduling/CommandSchedule.h b/dram/src/core/scheduling/CommandSchedule.h index b979ef74..6af549cd 100644 --- a/dram/src/core/scheduling/CommandSchedule.h +++ b/dram/src/core/scheduling/CommandSchedule.h @@ -18,7 +18,7 @@ class CommandSchedule { public: CommandSchedule(tlm::tlm_generic_payload& transaction) : - transaction(&transaction), extension(DramExtension::getExtension(&transaction)) + extension(DramExtension::getExtension(&transaction)), burstLength(transaction.get_streaming_width()) { } @@ -26,10 +26,9 @@ public: { } - ScheduledCommand& add(Command command, sc_time time, sc_time executionTime) + ScheduledCommand& add(Command command, sc_time start, sc_time executionTime) { - //assert(scheduledCommands.empty() || time >= scheduledCommands.back().getEnd()); - scheduledCommands.push_back(ScheduledCommand(*transaction, command, time, executionTime)); + scheduledCommands.push_back(ScheduledCommand(command, start, executionTime, extension, burstLength)); return scheduledCommands.back(); } @@ -60,8 +59,7 @@ public: private: std::vector scheduledCommands; - tlm::tlm_generic_payload* transaction; - + unsigned int burstLength; DramExtension extension; }; diff --git a/dram/src/core/scheduling/ScheduledCommand.cpp b/dram/src/core/scheduling/ScheduledCommand.cpp new file mode 100644 index 00000000..d7cfab93 --- /dev/null +++ b/dram/src/core/scheduling/ScheduledCommand.cpp @@ -0,0 +1,81 @@ +/* + * ScheduledCommand.cpp + * + * Created on: Mar 30, 2014 + * Author: robert + */ +#include "ScheduledCommand.h" +#include "../utils/Utils.h" + +namespace core { + +bool ScheduledCommand::isNoCommand() const +{ + return (command == Command::NOP && start == SC_ZERO_TIME && executionTime == SC_ZERO_TIME && end == SC_ZERO_TIME); +} + + +bool ScheduledCommand::isValidCommand() const +{ + return !isNoCommand(); +} + +const sc_time ScheduledCommand::getStart() const +{ + return start; +} + +void ScheduledCommand::setStart(sc_time newStart) +{ + start = newStart; + end = newStart + executionTime; +} + +void ScheduledCommand::delayStart(sc_time delay) +{ + setStart(start+delay); +} + +void ScheduledCommand::delayToMeetConstraint(sc_time previous, sc_time constraint) +{ + delayStart(getDelayToMeetConstraint(previous, start, constraint)); +} + +const sc_time ScheduledCommand::getEnd() const +{ + return end; +} + +const Command ScheduledCommand::getCommand() const +{ + return command; +} + +const sc_time ScheduledCommand::getExecutionTime() const +{ + return executionTime; +} + +Bank ScheduledCommand::getBank() const +{ + return extension.getBank(); +} + +Row ScheduledCommand::getRow() const +{ + return extension.getRow(); +} + +unsigned int ScheduledCommand::getBurstLength() +{ + return burstLength; +} + +bool ScheduledCommand::operator ==(const ScheduledCommand& b) const +{ + return b.command == command && b.start == start && b.executionTime == executionTime && b.end == end; +} + +} + + diff --git a/dram/src/core/scheduling/ScheduledCommand.h b/dram/src/core/scheduling/ScheduledCommand.h index 8b495c75..9c29ddfd 100644 --- a/dram/src/core/scheduling/ScheduledCommand.h +++ b/dram/src/core/scheduling/ScheduledCommand.h @@ -20,100 +20,46 @@ class ScheduledCommand { public: - ScheduledCommand(tlm::tlm_generic_payload& payload, Command command, sc_time time, - sc_time executionTime) : - payload(&payload), command(command), start(time), executionTime(executionTime), burstLength(payload.get_streaming_width()), - extension(DramExtension::getExtension(payload)) + ScheduledCommand(Command command, sc_time start, sc_time executionTime, const DramExtension& extension, unsigned int burstLength = 0) : + command(command), start(start), executionTime(executionTime),end(start+executionTime), burstLength(burstLength), + extension(extension) { } + ScheduledCommand() : - payload(NULL), command(Command::NOP), start(SC_ZERO_TIME), executionTime(SC_ZERO_TIME), burstLength(0), extension() + command(Command::NOP), start(SC_ZERO_TIME), executionTime(SC_ZERO_TIME), end(SC_ZERO_TIME), burstLength(0), extension() { } - bool isNoCommand() const - { - return (command == Command::NOP && start == SC_ZERO_TIME && executionTime == SC_ZERO_TIME); - } + bool isNoCommand() const; + bool isValidCommand() const; - bool isValidCommand() const - { - return !isNoCommand(); - } + const sc_time getStart() const; + void setStart(sc_time newStart); + void delayStart(sc_time delay); + void delayToMeetConstraint(sc_time previous, sc_time constraint); - const sc_time getStart() const - { - return start; - } + const sc_time getEnd() const; + const Command getCommand() const; + const sc_time getExecutionTime() const; - void setStart(sc_time newStart) - { - start = newStart; - } - void delayStart(sc_time delay) - { - start += delay; - } - - const sc_time getEnd() const - { - return start + executionTime; - } - - const Command getCommand() const - { - return command; - } - - const sc_time getExecutionTime() const - { - return executionTime; - } - - tlm::tlm_generic_payload& getTransaction() const - { - sc_assert(payload); - return *payload; - } - - Bank getBank() const - { - return extension.getBank(); - } - - Row getRow() const - { - return extension.getRow(); - } - - unsigned int getBurstLength() - { - return burstLength; - } - inline bool operator==(const ScheduledCommand& b) const - { - return b.command == command && b.start == start && b.executionTime == executionTime; - } - - void invalidateTransaction() - { - payload = NULL; - } + Bank getBank() const; + Row getRow() const; + unsigned int getBurstLength(); + bool operator ==(const ScheduledCommand& b) const; private: - tlm::tlm_generic_payload* payload; - Command command; sc_time start; sc_time executionTime; + sc_time end; unsigned int burstLength; DramExtension extension; }; - } /* namespace controller */ #endif /* SCHEDULEDCOMMAND_H_ */ diff --git a/dram/src/core/scheduling/checker/ActivateChecker.cpp b/dram/src/core/scheduling/checker/ActivateChecker.cpp index adeec7bb..991a090d 100644 --- a/dram/src/core/scheduling/checker/ActivateChecker.cpp +++ b/dram/src/core/scheduling/checker/ActivateChecker.cpp @@ -11,6 +11,7 @@ #include "ActivateChecker.h" #include "../../../common/DebugManager.h" #include +#include "../../Command.h" namespace core { @@ -21,13 +22,17 @@ void ActivateChecker::delayToSatisfyConstraints(ScheduledCommand& command) const if (lastCommandOnBank.isValidCommand()) { - Command lastCommand = lastCommandOnBank.getCommand(); - if (lastCommand == Command::Precharge || lastCommand == Command::PrechargeAll - || lastCommand == Command::AutoRefresh || lastCommand == Command::ReadA - || lastCommand == Command::WriteA) - command.delayStart(getDelayToMeetConstraint(lastCommandOnBank.getEnd(),command.getStart(), SC_ZERO_TIME)); + if (commandIsIn(lastCommandOnBank.getCommand(), { Command::Precharge, Command::PrechargeAll, + Command::AutoRefresh, Command::ReadA, Command::WriteA })) + { + if (command.getStart() < lastCommandOnBank.getEnd()) + { + command.setStart(lastCommandOnBank.getEnd()); + } + } else - reportFatal("Activate Checker", "Activate can not follow " + commandToString(lastCommandOnBank.getCommand())); + reportFatal("Activate Checker", + "Activate can not follow " + commandToString(lastCommandOnBank.getCommand())); } satisfy_activateToActivate_sameBank(command); @@ -55,9 +60,7 @@ void ActivateChecker::satisfy_activateToActivate_sameBank(ScheduledCommand& comm command.getBank()); if (lastActivateOnBank.isValidCommand()) { - command.delayStart( - getDelayToMeetConstraint(lastActivateOnBank.getStart(), command.getStart(), - config.Timings.tRC)); + command.delayToMeetConstraint(lastActivateOnBank.getStart(), config.Timings.tRC); } } @@ -66,9 +69,7 @@ void ActivateChecker::satisfy_nActivateWindow(ScheduledCommand& command) const if (!state.nActivateWindow.isFull()) return; - command.delayStart( - getDelayToMeetConstraint(state.nActivateWindow.getOldest(), command.getStart(), - config.Timings.tTAW)); + command.delayToMeetConstraint(state.nActivateWindow.getOldest(), config.Timings.tTAW); } diff --git a/dram/src/core/scheduling/checker/PrechargeChecker.cpp b/dram/src/core/scheduling/checker/PrechargeChecker.cpp index 634a7634..72bd8a6d 100644 --- a/dram/src/core/scheduling/checker/PrechargeChecker.cpp +++ b/dram/src/core/scheduling/checker/PrechargeChecker.cpp @@ -11,27 +11,26 @@ namespace core { void PrechargeChecker::delayToSatisfyConstraints(ScheduledCommand& command) const { - sc_assert(command.getCommand() == Command::Precharge || command.getCommand() == Command::PrechargeAll); - ScheduledCommand lastCommandOnBank = state.getLastScheduledCommand(command.getBank()); + sc_assert( + command.getCommand() == Command::Precharge + || command.getCommand() == Command::PrechargeAll); - if (lastCommandOnBank.isValidCommand()) + ScheduledCommand lastCommand = state.getLastScheduledCommand(command.getBank()); + + if (lastCommand.isValidCommand()) { - if (lastCommandOnBank.getCommand() == Command::Read) + if (lastCommand.getCommand() == Command::Read) { - command.delayStart( - getDelayToMeetConstraint(lastCommandOnBank.getStart(), command.getStart(), - lastCommandOnBank.getBurstLength() * config.Timings.clk)); + command.delayToMeetConstraint(lastCommand.getStart(), + lastCommand.getBurstLength() * config.Timings.clk); } - else if (lastCommandOnBank.getCommand() == Command::Write) + else if (lastCommand.getCommand() == Command::Write) { - command.delayStart( - getDelayToMeetConstraint(lastCommandOnBank.getStart(), command.getStart(), - (lastCommandOnBank.getBurstLength() - 1) * config.Timings.clk - + config.Timings.tWL)); + command.delayToMeetConstraint(lastCommand.getStart(), lastCommand.getExecutionTime()); } else reportFatal("Precharge Checker", - "Precharge can not follow " + commandToString(lastCommandOnBank.getCommand())); + "Precharge can not follow " + commandToString(lastCommand.getCommand())); } state.bus.moveCommandToNextFreeSlot(command); diff --git a/dram/src/core/scheduling/checker/ReadChecker.cpp b/dram/src/core/scheduling/checker/ReadChecker.cpp index 6846fbc4..649db0db 100644 --- a/dram/src/core/scheduling/checker/ReadChecker.cpp +++ b/dram/src/core/scheduling/checker/ReadChecker.cpp @@ -20,7 +20,10 @@ void ReadChecker::delayToSatisfyConstraints(ScheduledCommand& command) const { if (lastCommandOnBank.getCommand() == Command::Activate) { - command.delayStart(getDelayToMeetConstraint(lastCommandOnBank.getEnd(),command.getStart(), SC_ZERO_TIME)); + if (command.getStart() < lastCommandOnBank.getEnd()) + { + command.setStart(lastCommandOnBank.getEnd()); + } } else if (lastCommandOnBank.getCommand() == Command::Read || lastCommandOnBank.getCommand() == Command::Write) diff --git a/dram/src/core/scheduling/checker/WriteChecker.cpp b/dram/src/core/scheduling/checker/WriteChecker.cpp index 2cda4270..12737be6 100644 --- a/dram/src/core/scheduling/checker/WriteChecker.cpp +++ b/dram/src/core/scheduling/checker/WriteChecker.cpp @@ -12,27 +12,26 @@ namespace core { void WriteChecker::delayToSatisfyConstraints(ScheduledCommand& command) const { - if(command.getStart() >= sc_time(62885689,SC_NS)) - { - int i = 5; - i++; - } assert(command.getCommand() == Command::Write || command.getCommand() == Command::WriteA); - ScheduledCommand lastCommandOnBank = state.getLastScheduledCommand(command.getBank()); + ScheduledCommand lastCommand = state.getLastScheduledCommand(command.getBank()); - if (lastCommandOnBank.isValidCommand()) + if (lastCommand.isValidCommand()) { - if (lastCommandOnBank.getCommand() == Command::Activate) + if (lastCommand.getCommand() == Command::Activate) { - command.delayStart(getDelayToMeetConstraint(lastCommandOnBank.getEnd(),command.getStart(), SC_ZERO_TIME)); + if (command.getStart() < lastCommand.getEnd()) + { + command.setStart(lastCommand.getEnd()); + } } - else if (lastCommandOnBank.getCommand() == Command::Read - || lastCommandOnBank.getCommand() == Command::Write) + else if (lastCommand.getCommand() == Command::Read + || lastCommand.getCommand() == Command::Write) { } else - reportFatal("Write Checker", "Write can not follow " + commandToString(lastCommandOnBank.getCommand())); + reportFatal("Write Checker", + "Write can not follow " + commandToString(lastCommand.getCommand())); } while (!state.bus.isFree(command.getStart()) || collidesOnDataStrobe(command)) @@ -47,11 +46,12 @@ sc_time WriteChecker::getExecutionTime(const tlm::tlm_generic_payload& payload, assert(command == Command::Write || command == Command::WriteA); if (command == Command::Write) { - return config.Timings.tWL + config.Timings.clk * (payload.get_streaming_width()-1); + return config.Timings.tWL + config.Timings.clk * (payload.get_streaming_width() - 1); } else { - return config.Timings.tWL + config.Timings.clk * (payload.get_streaming_width()-1) + config.Timings.tRP; + return config.Timings.tWL + config.Timings.clk * (payload.get_streaming_width() - 1) + + config.Timings.tRP; } } @@ -69,7 +69,8 @@ bool WriteChecker::collidesOnDataStrobe(ScheduledCommand& write) const bool WriteChecker::collidesWithStrobeCommand(ScheduledCommand& write, ScheduledCommand& strobeCommand) const { - if (strobeCommand.getCommand() == Command::Write || strobeCommand.getCommand() == Command::WriteA) + if (strobeCommand.getCommand() == Command::Write + || strobeCommand.getCommand() == Command::WriteA) { //write to write (implicitly checked by checking the command bus first) return false; @@ -80,7 +81,8 @@ bool WriteChecker::collidesWithStrobeCommand(ScheduledCommand& write, //write to read if (strobeCommand.getStart() >= write.getStart()) { - return !(strobeCommand.getStart()>= getIntervalOnDataStrobe(write, config.Timings).end + config.Timings.tWTR); + return !(strobeCommand.getStart() + >= getIntervalOnDataStrobe(write, config.Timings).end + config.Timings.tWTR); } //read to write diff --git a/dram/src/simulation/controllerwrapper.h b/dram/src/simulation/controllerwrapper.h index 0e3dd7bc..43684f4c 100644 --- a/dram/src/simulation/controllerwrapper.h +++ b/dram/src/simulation/controllerwrapper.h @@ -59,35 +59,35 @@ public: delete scheduler; } - virtual void send(const ScheduledCommand& command) override + virtual void send(const ScheduledCommand& command,tlm_generic_payload& payload) override { assert(command.getStart() >= sc_time_stamp()); switch (command.getCommand()) { case Command::Read: - dramPEQ.notify(command.getTransaction(),BEGIN_RD, command.getStart() - sc_time_stamp()); - dramPEQ.notify(command.getTransaction(),END_RD, command.getEnd() - sc_time_stamp()); + dramPEQ.notify(payload,BEGIN_RD, command.getStart() - sc_time_stamp()); + dramPEQ.notify(payload,END_RD, command.getEnd() - sc_time_stamp()); break; case Command::Write: - dramPEQ.notify(command.getTransaction(),BEGIN_WR, command.getStart() - sc_time_stamp()); - dramPEQ.notify(command.getTransaction(),END_WR, command.getEnd() - sc_time_stamp()); + dramPEQ.notify(payload,BEGIN_WR, command.getStart() - sc_time_stamp()); + dramPEQ.notify(payload,END_WR, command.getEnd() - sc_time_stamp()); break; case Command::AutoRefresh: - dramPEQ.notify(command.getTransaction(),BEGIN_AUTO_REFRESH, command.getStart() - sc_time_stamp()); - dramPEQ.notify(command.getTransaction(),END_AUTO_REFRESH, command.getEnd() - sc_time_stamp()); + dramPEQ.notify(payload,BEGIN_AUTO_REFRESH, command.getStart() - sc_time_stamp()); + dramPEQ.notify(payload,END_AUTO_REFRESH, command.getEnd() - sc_time_stamp()); break; case Command::Activate: - dramPEQ.notify(command.getTransaction(),BEGIN_ACT, command.getStart() - sc_time_stamp()); - dramPEQ.notify(command.getTransaction(),END_ACT, command.getEnd() - sc_time_stamp()); + dramPEQ.notify(payload,BEGIN_ACT, command.getStart() - sc_time_stamp()); + dramPEQ.notify(payload,END_ACT, command.getEnd() - sc_time_stamp()); break; case Command::Precharge: - dramPEQ.notify(command.getTransaction(),BEGIN_PRE, command.getStart() - sc_time_stamp()); - dramPEQ.notify(command.getTransaction(),END_PRE, command.getEnd() - sc_time_stamp()); + dramPEQ.notify(payload,BEGIN_PRE, command.getStart() - sc_time_stamp()); + dramPEQ.notify(payload,END_PRE, command.getEnd() - sc_time_stamp()); break; case Command::PrechargeAll: - dramPEQ.notify(command.getTransaction(),BEGIN_PRE_ALL, command.getStart() - sc_time_stamp()); - dramPEQ.notify(command.getTransaction(),END_PRE_ALL, command.getEnd() - sc_time_stamp()); + dramPEQ.notify(payload,BEGIN_PRE_ALL, command.getStart() - sc_time_stamp()); + dramPEQ.notify(payload,END_PRE_ALL, command.getEnd() - sc_time_stamp()); break; default: SC_REPORT_FATAL(0, "unsupported command in controller wrapper"); diff --git a/dram/src/simulation/main.cpp b/dram/src/simulation/main.cpp index 452eff2b..e05a0dc0 100644 --- a/dram/src/simulation/main.cpp +++ b/dram/src/simulation/main.cpp @@ -19,6 +19,7 @@ #include "traceplayer.h" #include #include +#include using namespace std; @@ -29,13 +30,13 @@ string pathOfFile(string file) int sc_main(int argc, char **argv) { - sc_set_time_resolution(1,SC_NS); + sc_set_time_resolution(1, SC_NS); string resources = pathOfFile(argv[0]) + string("/../resources/"); xmlAddressDecoder::addressConfigURI = resources + string("configs/addressConfig.xml"); TlmRecorder recorder("tpr.tdb", resources + string("scripts/createTraceDB.sql")); - //TracePlayer<> player("player", resources + string("traces/mediabench-fractal_32.stl")); - TracePlayer<> player("player", resources + string("traces/mediabench-h263encode_32.stl")); + TracePlayer<> player("player", resources + string("traces/mediabench-fractal_32.stl")); + //TracePlayer<> player("player", resources + string("traces/mediabench-h263encode_32.stl")); Dram<> dram("dram"); Arbiter<> arbiter("arbiter"); @@ -64,8 +65,7 @@ int sc_main(int argc, char **argv) string runTestCommand = string("python ") + testingScript + string(" tpr.tdb"); //system(runTestCommand.c_str()); - string run_tpr = - "/home/robert/analyzer/build/traceAnalyzer tpr.tdb"; + string run_tpr = "/home/robert/analyzer/build/traceAnalyzer tpr.tdb"; system(run_tpr.c_str()); return 0; }