diff --git a/DRAMSys/tests/ddr3-example/ci.yml b/DRAMSys/tests/ddr3-example/ci.yml index bda9f443..b681e16c 100644 --- a/DRAMSys/tests/ddr3-example/ci.yml +++ b/DRAMSys/tests/ddr3-example/ci.yml @@ -2,4 +2,5 @@ example_ddr3: stage: simple-runs script: - cd build/simulator - - ./DRAMSys + - ./DRAMSys ../../DRAMSys/tests/example_ddr3/simulations/ddr3-example.xml ../../DRAMSys/tests/example_ddr3/ + - if [[ $(sqldiff ../../DRAMSys/tests/example_ddr3/ddr3-example_ddr3_ch0.tdb ddr3-example_ddr3_ch0.tdb) ]]; then false ; else true ; diff --git a/DRAMSys/tests/ddr3-example/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml b/DRAMSys/tests/ddr3-example/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml new file mode 100644 index 00000000..39d66692 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml @@ -0,0 +1,25 @@ + + + + + + + + + + diff --git a/DRAMSys/tests/ddr3-example/configs/mcconfigs/fifoStrict.xml b/DRAMSys/tests/ddr3-example/configs/mcconfigs/fifoStrict.xml new file mode 100644 index 00000000..dee4f5d4 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/mcconfigs/fifoStrict.xml @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DRAMSys/tests/ddr3-example/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml b/DRAMSys/tests/ddr3-example/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml new file mode 100644 index 00000000..052f6773 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DRAMSys/tests/ddr3-example/configs/simulator/ddr3.xml b/DRAMSys/tests/ddr3-example/configs/simulator/ddr3.xml new file mode 100644 index 00000000..1613737f --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/simulator/ddr3.xml @@ -0,0 +1,29 @@ + + + + + + + + + + + + + + + + + + + + + diff --git a/DRAMSys/tests/ddr3-example/configs/thermalsim/config.xml b/DRAMSys/tests/ddr3-example/configs/thermalsim/config.xml new file mode 100644 index 00000000..4d32315e --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/thermalsim/config.xml @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/DRAMSys/tests/ddr3-example/configs/thermalsim/core.flp b/DRAMSys/tests/ddr3-example/configs/thermalsim/core.flp new file mode 100755 index 00000000..e85e6801 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/thermalsim/core.flp @@ -0,0 +1,45 @@ +CPUs : + + position 0, 0 ; + dimension 2750, 4300 ; + +GPU : + + position 3350, 0 ; + dimension 2750, 4000 ; + +BASEBAND1 : + + position 4250, 4000 ; + dimension 1850, 3300 ; + +BASEBAND2 : + + position 3350, 7300 ; + dimension 2750, 3300 ; + +LLCACHE : + + position 0, 4300 ; + dimension 1900, 3000 ; + +DRAMCTRL1 : + + position 1900, 4300 ; + dimension 850, 3000 ; + +DRAMCTRL2 : + + position 3350, 4000 ; + dimension 900, 3300 ; + +TSVS : + + position 2750, 2300 ; + dimension 600, 6000 ; + +ACELLERATORS : + + position 0, 7300 ; + dimension 2750, 3300 ; + diff --git a/DRAMSys/tests/ddr3-example/configs/thermalsim/mem.flp b/DRAMSys/tests/ddr3-example/configs/thermalsim/mem.flp new file mode 100755 index 00000000..29d02254 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/thermalsim/mem.flp @@ -0,0 +1,16 @@ +channel0 : + position 150, 100 ; + dimension 2600, 5200 ; + +channel1 : + position 3350, 100 ; + dimension 2600, 5200 ; + +channel2 : + position 150, 5300 ; + dimension 2600, 5200 ; + +channel3 : + position 3350, 5300 ; + dimension 2600, 5200 ; + diff --git a/DRAMSys/tests/ddr3-example/configs/thermalsim/powerInfo.xml b/DRAMSys/tests/ddr3-example/configs/thermalsim/powerInfo.xml new file mode 100644 index 00000000..192cb4ea --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/thermalsim/powerInfo.xml @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/DRAMSys/tests/ddr3-example/configs/thermalsim/stack.stk b/DRAMSys/tests/ddr3-example/configs/thermalsim/stack.stk new file mode 100755 index 00000000..ec74f020 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/configs/thermalsim/stack.stk @@ -0,0 +1,49 @@ +material SILICON : + thermal conductivity 1.30e-4 ; + volumetric heat capacity 1.628e-12 ; + +material BEOL : + thermal conductivity 2.25e-6 ; + volumetric heat capacity 2.175e-12 ; + +material COPPER : + thermal conductivity 4.01e-04 ; + volumetric heat capacity 3.37e-12 ; + +top heat sink : + //sink height 1e03, area 100e06, material COPPER ; + //spreader height 0.5e03, area 70e06, material SILICON ; + heat transfer coefficient 1.3e-09 ; + temperature 318.15 ; +dimensions : + chip length 6100, width 10600 ; + cell length 100, width 100 ; + + +layer PCB : + height 10 ; + material BEOL ; + +die DRAM : + layer 58.5 SILICON ; + source 2 SILICON ; + layer 1.5 BEOL ; + layer 58.5 SILICON ; + + +stack: + die DRAM_DIE DRAM floorplan "./mem.flp" ; + layer CONN_TO_PCB PCB ; + +solver: + transient step 0.01, slot 0.05 ; + initial temperature 300.0 ; + +output: + Tflpel(DRAM_DIE.channel0 , "temp_flp_element_ch0.txt" , average , slot ); + Tflpel(DRAM_DIE.channel1 , "temp_flp_element_ch1.txt" , average , slot ); + Tflpel(DRAM_DIE.channel2 , "temp_flp_element_ch2.txt" , average , slot ); + Tflpel(DRAM_DIE.channel3 , "temp_flp_element_ch3.txt" , average , slot ); + Tmap (DRAM_DIE, "output1.txt", slot) ; + Pmap (DRAM_DIE, "output2.txt", slot) ; + diff --git a/DRAMSys/tests/ddr3-example/scripts/createTraceDB.sql b/DRAMSys/tests/ddr3-example/scripts/createTraceDB.sql new file mode 100644 index 00000000..1ba6c3aa --- /dev/null +++ b/DRAMSys/tests/ddr3-example/scripts/createTraceDB.sql @@ -0,0 +1,73 @@ +DROP TABLE IF EXISTS Phases; +DROP TABLE IF EXISTS GeneralInfo; +DROP TABLE IF EXISTS Comments; +DROP TABLE IF EXISTS ranges; +DROP TABLE IF EXISTS Transactions; +DROP TABLE IF EXISTS DebugMessages; +DROP TABLE IF EXISTS Power; + +CREATE TABLE Phases( + ID INTEGER PRIMARY KEY, + PhaseName TEXT, + PhaseBegin INTEGER, + PhaseEnd INTEGER, + Transact INTEGER +); + +CREATE TABLE GeneralInfo( + NumberOfTransactions INTEGER, + TraceEnd INTEGER, + NumberOfBanks INTEGER, + clk INTEGER, + UnitOfTime TEXT, + MCconfig TEXT, + Memspec TEXT, + Traces TEXT, + WindowSize INTEGER, + FlexibleRefresh INTEGER, + MaxRefBurst INTEGER, + ControllerThread INTEGER +); + +CREATE TABLE Power( + time DOUBLE, + AveragePower DOUBLE +); + + +CREATE TABLE Comments( + Time INTEGER, + Text TEXT +); + +CREATE TABLE DebugMessages( + Time INTEGER, + Message TEXT +); + +-- use SQLITE R* TREE Module to make queries on timespans effecient (see http://www.sqlite.org/rtree.html) +CREATE VIRTUAL TABLE ranges USING rtree( + id, + begin, end +); + +CREATE TABLE Transactions( + ID INTEGER, + Range INTEGER, + Address INTEGER, + Burstlength INTEGER, + TThread INTEGER, + TChannel INTEGER, + TBank INTEGER, + TBankgroup INTEGER, + TRow INTEGER, + TColumn INTEGER, + DataStrobeBegin INTEGER, + DataStrobeEnd INTEGER, + TimeOfGeneration INTEGER, + Command TEXT + ); + +CREATE INDEX ranges_index ON Transactions(Range); +CREATE INDEX "phasesTransactions" ON "Phases" ("Transact" ASC); +CREATE INDEX "messageTimes" ON "DebugMessages" ("Time" ASC); diff --git a/DRAMSys/tests/ddr3-example/simulations/ddr3-example.xml b/DRAMSys/tests/ddr3-example/simulations/ddr3-example.xml new file mode 100644 index 00000000..c6140385 --- /dev/null +++ b/DRAMSys/tests/ddr3-example/simulations/ddr3-example.xml @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + ddr3_example.stl + +