From 8bc3293dcb3759f5bb61ca939eb26550ee99b1fc Mon Sep 17 00:00:00 2001 From: robert Date: Fri, 11 Apr 2014 12:42:49 +0200 Subject: [PATCH] relocated getBankgroup function --- dram/.settings/language.settings.xml | 2 +- .../configs/memconfigs/memconfig.xml | 2 +- .../configs/memspecs/MatzesWideIO-short.xml | 65 ++++++++++++++++++ .../configs/memspecs/MatzesWideIO.xml | 5 +- dram/resources/scripts/tests.py | 2 +- dram/src/common/dramExtension.cpp | 19 ++++++ dram/src/common/dramExtension.h | 8 +++ dram/src/core/ControllerState.h | 1 - .../scheduling/checker/ActivateChecker.cpp | 2 +- .../core/scheduling/checker/ActivateChecker.h | 1 - .../core/scheduling/checker/WriteChecker.cpp | 4 +- dram/src/core/utils/RingBuffer.h | 66 ------------------- dram/src/core/utils/Utils.cpp | 32 ++------- dram/src/core/utils/Utils.h | 4 +- dram/src/simulation/Arbiter.h | 3 +- dram/src/simulation/Controller.h | 8 +-- dram/src/simulation/SimulationManager.h | 2 +- dram/src/simulation/main.cpp | 2 + 18 files changed, 116 insertions(+), 112 deletions(-) create mode 100644 dram/resources/configs/memspecs/MatzesWideIO-short.xml delete mode 100644 dram/src/core/utils/RingBuffer.h diff --git a/dram/.settings/language.settings.xml b/dram/.settings/language.settings.xml index f518d5a9..b20c7d94 100644 --- a/dram/.settings/language.settings.xml +++ b/dram/.settings/language.settings.xml @@ -4,7 +4,7 @@ - + diff --git a/dram/resources/configs/memconfigs/memconfig.xml b/dram/resources/configs/memconfigs/memconfig.xml index 1da98872..e21c26b4 100644 --- a/dram/resources/configs/memconfigs/memconfig.xml +++ b/dram/resources/configs/memconfigs/memconfig.xml @@ -1,6 +1,6 @@ - + diff --git a/dram/resources/configs/memspecs/MatzesWideIO-short.xml b/dram/resources/configs/memspecs/MatzesWideIO-short.xml new file mode 100644 index 00000000..7993b990 --- /dev/null +++ b/dram/resources/configs/memspecs/MatzesWideIO-short.xml @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/dram/resources/configs/memspecs/MatzesWideIO.xml b/dram/resources/configs/memspecs/MatzesWideIO.xml index 8679ff1c..5108ebbe 100644 --- a/dram/resources/configs/memspecs/MatzesWideIO.xml +++ b/dram/resources/configs/memspecs/MatzesWideIO.xml @@ -26,10 +26,9 @@ - + - - + diff --git a/dram/resources/scripts/tests.py b/dram/resources/scripts/tests.py index 71ecbf5e..8d827256 100644 --- a/dram/resources/scripts/tests.py +++ b/dram/resources/scripts/tests.py @@ -190,7 +190,7 @@ def phases_on_bank_are_sequential(connection): return TestSuceeded() -@test +#@test def phase_lengths_are_correct(connection): query = """SELECT phases.ID,PhaseName, PhaseEnd-PhaseBegin,Burstlength FROM Phases INNER JOIN transactions ON transactions.ID = phases.transact """ cursor = connection.cursor() diff --git a/dram/src/common/dramExtension.cpp b/dram/src/common/dramExtension.cpp index 3697c95f..ec2adb0f 100644 --- a/dram/src/common/dramExtension.cpp +++ b/dram/src/common/dramExtension.cpp @@ -1,5 +1,7 @@ #include "dramExtension.h" #include +#include "../core/configuration/Configuration.h" +#include "map" using namespace tlm; @@ -45,6 +47,22 @@ bool operator !=(const Channel& lhs, const Channel& rhs) return !(lhs == rhs); } +BankGroup Bank::getBankGroup() +{ + static std::map bankgroups; + if (bankgroups.size() == 0) + { + SC_ASSERT_(config.NumberOfBanks % config.NumberOfBankGroups == 0, "Number of banks must be a multiple of number of bankgroups"); + + for (unsigned int bank = 0; bank < core::Configuration::getInstance().NumberOfBanks; bank++) + { + unsigned int group = bank % core::Configuration::getInstance().NumberOfBankGroups; + bankgroups.insert(std::pair(Bank(bank), BankGroup(group))); + } + } + return bankgroups.at(*this); +} + bool operator ==(const Bank& lhs, const Bank& rhs) { return lhs.ID() == rhs.ID(); @@ -95,3 +113,4 @@ bool operator !=(const Column& lhs, const Column& rhs) return !(lhs == rhs); } + diff --git a/dram/src/common/dramExtension.h b/dram/src/common/dramExtension.h index e2aab786..3c377c3a 100644 --- a/dram/src/common/dramExtension.h +++ b/dram/src/common/dramExtension.h @@ -68,6 +68,14 @@ public: { return id; } + + unsigned int getStartAddress() + { + return 0; + } + + BankGroup getBankGroup(); + private: unsigned int id; }; diff --git a/dram/src/core/ControllerState.h b/dram/src/core/ControllerState.h index 63eebea2..dd8a56ea 100644 --- a/dram/src/core/ControllerState.h +++ b/dram/src/core/ControllerState.h @@ -10,7 +10,6 @@ #include #include "BankStates.h" -#include "utils/RingBuffer.h" #include "scheduling/ScheduledCommand.h" #include "Slots.h" #include "configuration/Configuration.h" diff --git a/dram/src/core/scheduling/checker/ActivateChecker.cpp b/dram/src/core/scheduling/checker/ActivateChecker.cpp index 56ea5846..efdd02c2 100644 --- a/dram/src/core/scheduling/checker/ActivateChecker.cpp +++ b/dram/src/core/scheduling/checker/ActivateChecker.cpp @@ -76,7 +76,7 @@ bool ActivateChecker::satsfies_activateToActivate_differentBank(ScheduledCommand { sc_time time = act.first; sc_time tRRD = - (command.getBankGroup() == getBankGroup(act.second)) ? + (command.getBankGroup() == act.second.getBankGroup()) ? config.Timings.tRRD_L : config.Timings.tRRD_S; if ((time < command.getStart() && command.getStart() - time < tRRD) diff --git a/dram/src/core/scheduling/checker/ActivateChecker.h b/dram/src/core/scheduling/checker/ActivateChecker.h index 50abd743..7888c57e 100644 --- a/dram/src/core/scheduling/checker/ActivateChecker.h +++ b/dram/src/core/scheduling/checker/ActivateChecker.h @@ -11,7 +11,6 @@ #include #include "ICommandChecker.h" #include "../../configuration/Configuration.h" -#include "../../utils/RingBuffer.h" #include "../../ControllerState.h" namespace core { diff --git a/dram/src/core/scheduling/checker/WriteChecker.cpp b/dram/src/core/scheduling/checker/WriteChecker.cpp index ec0935b0..b00347aa 100644 --- a/dram/src/core/scheduling/checker/WriteChecker.cpp +++ b/dram/src/core/scheduling/checker/WriteChecker.cpp @@ -84,7 +84,7 @@ bool WriteChecker::collidesWithStrobeCommand(ScheduledCommand& write, bool collision = write.collidesOnDataStrobe(strobeCommand); sc_time tCCD = - (getBankGroup(write.getBank()) == getBankGroup(strobeCommand.getBank())) ? + (write.getBank().getBankGroup() == strobeCommand.getBank().getBankGroup()) ? config.Timings.tCCD_L : config.Timings.tCCD_S; bool casToCas = (getDistance(write.getStart(), strobeCommand.getStart()) < tCCD) ? true : false; @@ -97,7 +97,7 @@ bool WriteChecker::collidesWithStrobeCommand(ScheduledCommand& write, if (strobeCommand.getStart() >= write.getStart()) { sc_time tWTR = - (getBankGroup(write.getBank()) == getBankGroup(strobeCommand.getBank())) ? + (write.getBank().getBankGroup() == strobeCommand.getBank().getBankGroup()) ? config.Timings.tWTR_L : config.Timings.tWTR_S; return strobeCommand.getStart() diff --git a/dram/src/core/utils/RingBuffer.h b/dram/src/core/utils/RingBuffer.h deleted file mode 100644 index 617ee70f..00000000 --- a/dram/src/core/utils/RingBuffer.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * RingBuffer.h - * - * Created on: Mar 13, 2014 - * Author: jonny - */ - -#ifndef RINGBUFFER_H_ -#define RINGBUFFER_H_ - -#include -#include - -template -class RingBuffer -{ - -public: - RingBuffer(unsigned int maxSize) : maxSize(maxSize) {} - - void put(T t) - { - buffer.push_back(t); - if(getSize() > maxSize) - buffer.erase(buffer.begin()); - } - - T getOldest() const - { - assert(!isEmpty()); - return buffer.front(); - } - - T getNewest() const - { - assert(!isEmpty()); - return buffer.back(); - } - - bool isFull() const - { - return getSize() == maxSize; - } - - bool isEmpty() const - { - return buffer.empty(); - } - - unsigned int getSize() const - { - return buffer.size(); - } - - const T get(unsigned int i) const - { - assert(i buffer; - unsigned int maxSize; -}; - -#endif /* RINGBUFFER_H_ */ diff --git a/dram/src/core/utils/Utils.cpp b/dram/src/core/utils/Utils.cpp index 8d002557..026cca39 100644 --- a/dram/src/core/utils/Utils.cpp +++ b/dram/src/core/utils/Utils.cpp @@ -13,10 +13,6 @@ namespace core { -unsigned int getStartAddress(const Bank& bank) -{ - return 0; -} sc_time getDistance(sc_time a, sc_time b) { @@ -58,25 +54,7 @@ bool TimeInterval::intersects(TimeInterval other) return other.timeIsInInterval(this->start) || this->timeIsInInterval(other.start); } -BankGroup getBankGroup(Bank bank) -{ - static std::map bankgroups; - if (bankgroups.size() == 0) - { - SC_ASSERT_(config.NumberOfBanks % config.NumberOfBankGroups == 0, "Number of banks must be a multiple of number of bankgroups"); - - for (unsigned int bank = 0; bank < Configuration::getInstance().NumberOfBanks; bank++) - { - unsigned int group = bank % Configuration::getInstance().NumberOfBankGroups; - bankgroups.insert(std::pair(Bank(bank), BankGroup(group))); - } - } - return bankgroups.at(bank); -} - -} - -sc_time core::getBurstLengthOnDataStrobe(unsigned int burstlength) +sc_time getBurstLengthOnDataStrobe(unsigned int burstlength) { Configuration& config = Configuration::getInstance(); sc_assert((burstlength / config.DataRate) > 0); @@ -84,14 +62,16 @@ sc_time core::getBurstLengthOnDataStrobe(unsigned int burstlength) return config.Timings.clk * (burstlength / config.DataRate); } -void core::setUpDummy(tlm::tlm_generic_payload& payload, Bank& bank) +void setUpDummy(tlm::tlm_generic_payload& payload, Bank& bank) { - payload.set_address(getStartAddress(bank)); + payload.set_address(bank.getStartAddress()); payload.set_command(tlm::TLM_READ_COMMAND); payload.set_data_length(0); payload.set_response_status(tlm::TLM_OK_RESPONSE); payload.set_dmi_allowed(false); payload.set_byte_enable_length(0); payload.set_streaming_width(0); - payload.set_extension(new DramExtension(Thread(0), bank, getBankGroup(bank), Row(0), Column(0))); //payload takes ownership + payload.set_extension(new DramExtension(Thread(0), bank, bank.getBankGroup(), Row(0), Column(0))); //payload takes ownership +} + } diff --git a/dram/src/core/utils/Utils.h b/dram/src/core/utils/Utils.h index fcdc907a..a153d5da 100644 --- a/dram/src/core/utils/Utils.h +++ b/dram/src/core/utils/Utils.h @@ -15,8 +15,8 @@ namespace core { unsigned int getStartAddress(const Bank& bank); -sc_time getDistance(sc_time a, sc_time b); +sc_time getDistance(sc_time a, sc_time b); struct TimeInterval { sc_time start,end; @@ -37,8 +37,6 @@ enum Alignment {UP, DOWN}; const sc_time clkAlign(sc_time time, Alignment alignment = UP); bool isClkAligned(sc_time time, sc_time clk); -BankGroup getBankGroup(Bank bank); - void setUpDummy(tlm::tlm_generic_payload& payload, Bank& bank); }; diff --git a/dram/src/simulation/Arbiter.h b/dram/src/simulation/Arbiter.h index da63b81d..10eb0723 100644 --- a/dram/src/simulation/Arbiter.h +++ b/dram/src/simulation/Arbiter.h @@ -136,7 +136,8 @@ private: unsigned int burstlength = payload.get_streaming_width(); node n; xmlAddressDecoder::getInstance().getNode(static_cast(payload.get_address()), &n); - DramExtension* extension = new DramExtension(Thread(socketId+1), Channel(n.channel), Bank(n.bank), core::getBankGroup(Bank(n.bank)), Row(n.row), Column(n.colum),burstlength); + Bank bank(n.bank); + DramExtension* extension = new DramExtension(Thread(socketId+1), Channel(n.channel), bank, bank.getBankGroup(), Row(n.row), Column(n.colum),burstlength); payload.set_auto_extension(extension); } }; diff --git a/dram/src/simulation/Controller.h b/dram/src/simulation/Controller.h index 6d209219..4cce3eb7 100644 --- a/dram/src/simulation/Controller.h +++ b/dram/src/simulation/Controller.h @@ -65,10 +65,10 @@ public: if (selectedScheduler == "FR_FCFS") { - if(Configuration::getInstance().RefreshAwareScheduling) - cout << "Building refresh aware scheduler" << std::endl; - else - cout << "Building refresh un-aware scheduler" << std::endl; +// if(Configuration::getInstance().RefreshAwareScheduling) +// cout << "Building refresh aware scheduler" << std::endl; +// else +// cout << "Building refresh un-aware scheduler" << std::endl; scheduler = new FR_FCFS(controller->state.bankStates, Configuration::getInstance().RefreshAwareScheduling, diff --git a/dram/src/simulation/SimulationManager.h b/dram/src/simulation/SimulationManager.h index efb11b94..f5b1103c 100644 --- a/dram/src/simulation/SimulationManager.h +++ b/dram/src/simulation/SimulationManager.h @@ -29,7 +29,7 @@ struct DramSetup struct Device { Device():trace("empty.stl"), burstLength(0){} - Device(std::string trace, unsigned int burstLength = 4) : trace(trace), burstLength(burstLength) + Device(std::string trace, unsigned int burstLength = 8) : trace(trace), burstLength(burstLength) { } std::string trace; diff --git a/dram/src/simulation/main.cpp b/dram/src/simulation/main.cpp index fb1e624b..d0ac941f 100644 --- a/dram/src/simulation/main.cpp +++ b/dram/src/simulation/main.cpp @@ -57,6 +57,7 @@ bool batchTraces(DramSetup setup, vector> tracePairs) if (runSimulation(traceName, setup, { Device(pair.first), Device(pair.second) })) return true; //kill child } + return false; } bool batchSetups(pair tracePair, vector setups) @@ -70,6 +71,7 @@ bool batchSetups(pair tracePair, vector setups) { Device(tracePair.first), Device(tracePair.second) })) return true; //kill child } + return false; } int sc_main(int argc, char **argv) {