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Rename RAACDR to RAADEC

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This commit is contained in:
Derek Christ
2023-04-21 11:10:09 +02:00
parent 515962e7ae
commit 85f944fe58
31 changed files with 39 additions and 39 deletions
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6
extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.cpp
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@@ -66,7 +66,7 @@ MemSpecDDR5::MemSpecDDR5(const DRAMSys::Config::MemSpec &memSpec)
refMode(memSpec.memarchitecturespec.entries.at("refMode")),
RAAIMT(memSpec.memarchitecturespec.entries.at("RAAIMT")),
RAAMMT(memSpec.memarchitecturespec.entries.at("RAAMMT")),
RAACDR(memSpec.memarchitecturespec.entries.at("RAACDR")),
RAADEC(memSpec.memarchitecturespec.entries.at("RAADEC")),
tRCD (tCK * memSpec.memtimingspec.entries.at("RCD")),
tPPD (tCK * memSpec.memtimingspec.entries.at("PPD")),
tRP (tCK * memSpec.memtimingspec.entries.at("RP")),
@@ -196,9 +196,9 @@ sc_time MemSpecDDR5::getRefreshIntervalSB() const
return tREFIsb;
}
unsigned MemSpecDDR5::getRAACDR() const
unsigned MemSpecDDR5::getRAADEC() const
{
return RAACDR;
return RAADEC;
}
unsigned MemSpecDDR5::getRAAIMT() const

4
extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.h
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@@ -54,7 +54,7 @@ public:
const unsigned refMode;
const unsigned RAAIMT;
const unsigned RAAMMT;
const unsigned RAACDR;
const unsigned RAADEC;
// Memspec Variables:
const sc_core::sc_time tRCD;
@@ -119,7 +119,7 @@ public:
sc_core::sc_time getRefreshIntervalAB() const override;
sc_core::sc_time getRefreshIntervalSB() const override;
unsigned getRAACDR() const override;
unsigned getRAADEC() const override;
unsigned getRAAIMT() const override;
unsigned getRAAMMT() const override;

6
extensions/standards/HBM3/DRAMSys/configuration/memspec/MemSpecHBM3.cpp
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@@ -58,7 +58,7 @@ MemSpecHBM3::MemSpecHBM3(const DRAMSys::Config::MemSpec &memSpec)
memSpec.memarchitecturespec.entries.at("nbrOfDevices")),
RAAIMT(memSpec.memarchitecturespec.entries.at("RAAIMT")),
RAAMMT(memSpec.memarchitecturespec.entries.at("RAAMMT")),
RAACDR(memSpec.memarchitecturespec.entries.at("RAACDR")),
RAADEC(memSpec.memarchitecturespec.entries.at("RAADEC")),
tDQSCK (tCK * memSpec.memtimingspec.entries.at("DQSCK")),
tRC (tCK * memSpec.memtimingspec.entries.at("RC")),
tRAS (tCK * memSpec.memtimingspec.entries.at("RAS")),
@@ -179,9 +179,9 @@ TimeInterval MemSpecHBM3::getIntervalOnDataStrobe(Command command, const tlm_gen
}
}
unsigned MemSpecHBM3::getRAACDR() const
unsigned MemSpecHBM3::getRAADEC() const
{
return RAACDR;
return RAADEC;
}
unsigned MemSpecHBM3::getRAAIMT() const

4
extensions/standards/HBM3/DRAMSys/configuration/memspec/MemSpecHBM3.h
View File

@@ -47,7 +47,7 @@ public:
const unsigned RAAIMT;
const unsigned RAAMMT;
const unsigned RAACDR;
const unsigned RAADEC;
// Memspec Variables:
const sc_core::sc_time tDQSCK;
@@ -89,7 +89,7 @@ public:
sc_core::sc_time getRefreshIntervalAB() const override;
sc_core::sc_time getRefreshIntervalPB() const override;
unsigned getRAACDR() const override;
unsigned getRAADEC() const override;
unsigned getRAAIMT() const override;
unsigned getRAAMMT() const override;