diff --git a/DRAMSys/library/resources/configs/simulator/ddr3.xml b/DRAMSys/library/resources/configs/simulator/ddr3.xml index 1613737f..f43e4b8c 100644 --- a/DRAMSys/library/resources/configs/simulator/ddr3.xml +++ b/DRAMSys/library/resources/configs/simulator/ddr3.xml @@ -1,6 +1,6 @@ - + diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index ebe31027..dfc021ba 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -232,12 +232,14 @@ tlm_sync_enum Controller::nb_transport_fw(tlm_generic_payload &payload, if (phase == BEGIN_REQ) { notDelay += Configuration::getInstance().memSpec.clk; - //Bandwidth IDLE + // Bandwidth IDLE if ((getTotalNumberOfPayloadsInSystem() == 0) && idleState) { endBandwidthIdleCollector(); } - } else if (phase == END_RESP) { - // Badnwith IDLE + } + else if (phase == END_RESP) { + // Bandwidth IDLE + // TODO: getTotalNumberOfPayloadsInSystem() == 1 && !idleState ?? if (getTotalNumberOfPayloadsInSystem() == 1) { startBandwidthIdleCollector(); } @@ -258,13 +260,15 @@ unsigned int Controller::transport_dbg(tlm::tlm_generic_payload &trans) void Controller::frontendPEQCallback(tlm_generic_payload &payload, const tlm_phase &phase) { - if (phase == BEGIN_REQ) { - printDebugMessage(string("Payload in system: ") + to_string( - getTotalNumberOfPayloadsInSystem())); + if (phase == BEGIN_REQ) + { + printDebugMessage(string("Payload in system: ") + + to_string(getTotalNumberOfPayloadsInSystem())); payload.acquire(); payloadEntersSystem(payload); if (getTotalNumberOfPayloadsInSystem() > - controllerCore->config.MaxNrOfTransactions) { + controllerCore->config.MaxNrOfTransactions) + { printDebugMessage("##Backpressure: Max number of transactions in system reached"); backpressure = &payload; return; @@ -273,12 +277,18 @@ void Controller::frontendPEQCallback(tlm_generic_payload &payload, sendToFrontend(payload, END_REQ, SC_ZERO_TIME); scheduler->storeRequest(&payload); + // TODO: (current position in code) scheduleNextFromScheduler(DramExtension::getExtension(payload).getBank()); - } else if (phase == PendingRequest) { + } + else if (phase == PendingRequest) + { // Schedule a pending request. scheduleNextFromScheduler(DramExtension::getExtension(payload).getBank()); - } else if (phase == END_RESP) { - if (backpressure != NULL) { + } + else if (phase == END_RESP) + { + if (backpressure != NULL) + { printDebugMessage("##Backpressure released"); backpressure->set_response_status(tlm::TLM_OK_RESPONSE); sendToFrontend(*backpressure, END_REQ, SC_ZERO_TIME); @@ -292,11 +302,11 @@ void Controller::frontendPEQCallback(tlm_generic_payload &payload, responseQueue.pop(); payload.release(); - if(!responseQueue.empty()) { + if(!responseQueue.empty()) sendToFrontend(*(responseQueue.front()), BEGIN_RESP, SC_ZERO_TIME); - } - - } else { + } + else + { SC_REPORT_FATAL(0, "Front-end PEQ in controller wrapper was triggered with unknown phase"); } @@ -305,12 +315,14 @@ void Controller::frontendPEQCallback(tlm_generic_payload &payload, void Controller::payloadEntersSystem(tlm_generic_payload &payload) { Bank bank = DramExtension::getExtension(payload).getBank(); + // TODO: first increase numberOfPayloadsInSystem[bank], then printDebugMessage ?? printDebugMessage( "Payload enters system on bank " + to_string(bank.ID()) + ". Total number of payloads in Controller: " + to_string(getTotalNumberOfPayloadsInSystem())); numberOfPayloadsInSystem[bank]++; // Set Start Time for Simulation + // TODO: startTimeSet always false at this point?? if (startTimeSet == false) { printDebugMessage("Simulation Timer Start"); startTime = sc_time_stamp() - Configuration::getInstance().memSpec.clk; @@ -340,18 +352,21 @@ unsigned int Controller::getTotalNumberOfPayloadsInSystem() void Controller::scheduleNextFromScheduler(Bank bank) { - if (controllerCore->bankIsBusy(bank)) { + if (controllerCore->bankIsBusy(bank)) return; - } bool rescheduled = true; pair nextRequest = scheduler->getNextRequest(bank); if (nextRequest.second != NULL) { schedule(nextRequest.first, *nextRequest.second); - } else { + } + else + { + // TODO: getPendingRequest is only used by SMS scheduler gp *pendingRequest = scheduler->getPendingRequest(bank); - if (pendingRequest != NULL) { + if (pendingRequest != NULL) + { rescheduled = true; frontendPEQ.notify(*(pendingRequest), PendingRequest, Configuration::getInstance().memSpec.clk); diff --git a/DRAMSys/library/src/controller/Controller.h b/DRAMSys/library/src/controller/Controller.h index c911f996..7e524a51 100644 --- a/DRAMSys/library/src/controller/Controller.h +++ b/DRAMSys/library/src/controller/Controller.h @@ -82,9 +82,9 @@ class Controller : public sc_module, public IController { public: Controller(sc_module_name /*name*/) : - frontendPEQ(this, &Controller::frontendPEQCallback), dramPEQ(this, - &Controller::dramPEQCallback), controllerCorePEQ(this, - &Controller::controllerCorePEQCallback), + frontendPEQ(this, &Controller::frontendPEQCallback), + dramPEQ(this, &Controller::dramPEQCallback), + controllerCorePEQ(this, &Controller::controllerCorePEQCallback), debugManager(DebugManager::getInstance()) { controllerCore = new ControllerCore("core", *this, numberOfPayloadsInSystem); diff --git a/DRAMSys/library/src/controller/scheduler/Fifo.cpp b/DRAMSys/library/src/controller/scheduler/Fifo.cpp index 6eb46aa8..305e2798 100644 --- a/DRAMSys/library/src/controller/scheduler/Fifo.cpp +++ b/DRAMSys/library/src/controller/scheduler/Fifo.cpp @@ -36,27 +36,28 @@ #include "Fifo.h" -using namespace std; - void Fifo::storeRequest(gp *payload) { - buffer[DramExtension::getExtension(payload).getBank()].emplace_back(payload); + Bank bank = DramExtension::getExtension(payload).getBank(); + buffer[bank].emplace_back(payload); } -pair Fifo::getNextRequest(Bank bank) +std::pair Fifo::getNextRequest(Bank bank) { - if (!buffer[bank].empty()) { + if (!buffer[bank].empty()) + { gp *payload = buffer[bank].front(); Command command = IScheduler::getNextCommand(*payload); if (command == Command::Read || command == Command::ReadA - || command == Command::Write || command == Command::WriteA) { + || command == Command::Write || command == Command::WriteA) + { buffer[bank].pop_front(); } - return pair(command, payload); + return std::pair(command, payload); } - - return pair(Command::NOP, NULL); + else + return std::pair(Command::NOP, NULL); } gp *Fifo::getPendingRequest(Bank /*bank*/) diff --git a/DRAMSys/library/src/controller/scheduler/Fifo.h b/DRAMSys/library/src/controller/scheduler/Fifo.h index 912570d2..dfb5820c 100644 --- a/DRAMSys/library/src/controller/scheduler/Fifo.h +++ b/DRAMSys/library/src/controller/scheduler/Fifo.h @@ -37,13 +37,14 @@ #ifndef FIFO_H_ #define FIFO_H_ -#include "../core/ControllerCore.h" -#include "../Command.h" -#include "IScheduler.h" #include #include #include +#include "../core/ControllerCore.h" +#include "../Command.h" +#include "IScheduler.h" + class Fifo : public IScheduler { public: diff --git a/DRAMSys/library/src/controller/scheduler/FifoStrict.cpp b/DRAMSys/library/src/controller/scheduler/FifoStrict.cpp index 9b3f8ec3..3f36dd9e 100644 --- a/DRAMSys/library/src/controller/scheduler/FifoStrict.cpp +++ b/DRAMSys/library/src/controller/scheduler/FifoStrict.cpp @@ -92,7 +92,7 @@ std::pair FifoStrict::getNextRequest( } } - return pair(command, payload); + return std::pair(command, payload); } else { // The next request in the FIFO is NOT for the bank passed as parameter. @@ -116,18 +116,18 @@ std::pair FifoStrict::getNextRequest( // the next command for this request is read or write // NOP will be returned and no operation will be // performed. - return pair(Command::NOP, NULL); + return std::pair(Command::NOP, NULL); } else { // Commands other than read and write are issued normally. - return pair(command, payload); + return std::pair(command, payload); } } } } } - return pair(Command::NOP, NULL); + return std::pair(Command::NOP, NULL); } gp *FifoStrict::getPendingRequest(Bank /*bank*/) diff --git a/DRAMSys/library/src/controller/scheduler/FifoStrict.h b/DRAMSys/library/src/controller/scheduler/FifoStrict.h index acd22086..4adf3990 100644 --- a/DRAMSys/library/src/controller/scheduler/FifoStrict.h +++ b/DRAMSys/library/src/controller/scheduler/FifoStrict.h @@ -40,7 +40,7 @@ #define FIFOSTRICT_H #include -#include +//#include #include #include "../core/ControllerCore.h" diff --git a/DRAMSys/library/src/simulation/Arbiter.cpp b/DRAMSys/library/src/simulation/Arbiter.cpp index f417eb1e..0459445d 100644 --- a/DRAMSys/library/src/simulation/Arbiter.cpp +++ b/DRAMSys/library/src/simulation/Arbiter.cpp @@ -40,7 +40,7 @@ using namespace std; using namespace tlm; -Arbiter::Arbiter(sc_module_name) : payloadEventQueue(this, &Arbiter::peqCallback) +Arbiter::Arbiter(sc_module_name /*name*/) : payloadEventQueue(this, &Arbiter::peqCallback) { // The arbiter communicates with one or more memory unity through one or more sockets (one or more memory channels). // Each of the arbiter's initiator sockets is bound to a memory controller's target socket. @@ -66,6 +66,7 @@ Arbiter::Arbiter(sc_module_name) : payloadEventQueue(this, &Arbiter::peqCallback tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload, tlm_phase &phase, sc_time &fwDelay) { + // TODO: clkAlign necessary? sc_time notDelay = clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay); if (phase == BEGIN_REQ) @@ -124,6 +125,7 @@ void Arbiter::peqCallback(tlm_generic_payload &payload, const tlm_phase &phase) unsigned int channelId = DramExtension::getExtension(payload).getChannel().ID(); // Check the valid range of initiatorSocket ID and channel Id + // TODO: initiatorSocket ID not checked assert(channelId < Configuration::getInstance().NumberOfMemChannels); // Phases initiated by the intiator side from arbiter's point of view (devices performing memory requests to the arbiter) diff --git a/DRAMSys/library/src/simulation/DRAMSys.cpp b/DRAMSys/library/src/simulation/DRAMSys.cpp index 5b48fc92..30b2393e 100644 --- a/DRAMSys/library/src/simulation/DRAMSys.cpp +++ b/DRAMSys/library/src/simulation/DRAMSys.cpp @@ -175,7 +175,7 @@ void DRAMSys::logo() void DRAMSys::setupDebugManager(const string &traceName) { auto &dbg = DebugManager::getInstance(); - dbg.writeToConsole = true; + dbg.writeToConsole = false; dbg.writeToFile = true; if (dbg.writeToFile) dbg.openDebugFile(traceName + ".txt"); diff --git a/coding-style.md b/coding-style.md index 7647bd95..80291bc1 100644 --- a/coding-style.md +++ b/coding-style.md @@ -148,7 +148,7 @@ There is a plugin for VIM. More information can be found in ## Applying the Coding Style The script [make_pretty.sh](./utils/make_pretty.sh) applies the coding style -to the project excluding thrid party code. +to the project excluding third party code. ## References