From 83f93f36208699f02e3c3bdf4833f4eb94b97511 Mon Sep 17 00:00:00 2001
From: Lukas Steiner <lsteiner@rhrk.uni-kl.de>
Date: Mon, 4 May 2020 11:25:08 +0200
Subject: [PATCH] Fixes phase conversions if more extended phases are declared
 outside of DRAMSys.

---
 DRAMSys/library/src/controller/Command.cpp    | 32 +++++++++----------
 .../src/controller/ControllerRecordable.cpp   |  8 ++---
 2 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/DRAMSys/library/src/controller/Command.cpp b/DRAMSys/library/src/controller/Command.cpp
index 88e64544..9b43125c 100644
--- a/DRAMSys/library/src/controller/Command.cpp
+++ b/DRAMSys/library/src/controller/Command.cpp
@@ -43,7 +43,7 @@ using namespace DRAMPower;
 
 std::string commandToString(Command command)
 {  
-    assert(command >= 0 && command <= 15);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
     static std::array<std::string, 16> stringOfCommand =
             {"NOP",
             "RD",
@@ -71,7 +71,7 @@ unsigned numberOfCommands()
 
 tlm_phase commandToPhase(Command command)
 {
-    assert(command >= 0 && command <= 15);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
     static std::array<tlm_phase, 16> phaseOfCommand =
             {UNINITIALIZED_PHASE,
             BEGIN_RD,
@@ -94,7 +94,7 @@ tlm_phase commandToPhase(Command command)
 
 Command phaseToCommand(tlm_phase phase)
 {
-    assert(phase >= 5 && phase <= 19);
+    assert(phase >= BEGIN_RD && phase <= END_SREF);
     static std::array<Command, 16> commandOfPhase =
             {Command::RD,
             Command::WR,
@@ -111,12 +111,12 @@ Command phaseToCommand(tlm_phase phase)
             Command::PDXP,
             Command::SREFEN,
             Command::SREFEX};
-    return commandOfPhase[phase - 5];
+    return commandOfPhase[phase - BEGIN_RD];
 }
 
 MemCommand::cmds phaseToDRAMPowerCommand(tlm_phase phase)
 {
-    assert(phase >= 5 && phase <= 19);
+    assert(phase >= BEGIN_RD && phase <= END_SREF);
     static std::array<MemCommand::cmds, 16> phaseOfCommand =
             {MemCommand::RD,
             MemCommand::WR,
@@ -133,40 +133,40 @@ MemCommand::cmds phaseToDRAMPowerCommand(tlm_phase phase)
             MemCommand::PUP_PRE,
             MemCommand::SREN,
             MemCommand::SREX};
-    return phaseOfCommand[phase - 5];
+    return phaseOfCommand[phase - BEGIN_RD];
 }
 
 bool phaseNeedsEnd(tlm_phase phase)
 {
-    return (phase >= 5 && phase <= 13);
+    return (phase >= BEGIN_RD && phase <= BEGIN_REFA);
 }
 
 tlm_phase getEndPhase(tlm_phase phase)
 {
-    assert(phase >= 5 && phase <= 13);
+    assert(phase >= BEGIN_RD && phase <= BEGIN_REFA);
     return (phase + 15);
 }
 
 bool isBankCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command <= 7);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command <= Command::REFB);
 }
 
 bool isRankCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command >= 8);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command >= Command::PREA);
 }
 
 bool isCasCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command <= 4);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command <= Command::WRA);
 }
 
 bool isRasCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command >= 5);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command >= Command::PRE);
 }
diff --git a/DRAMSys/library/src/controller/ControllerRecordable.cpp b/DRAMSys/library/src/controller/ControllerRecordable.cpp
index bcfbc836..638803fa 100644
--- a/DRAMSys/library/src/controller/ControllerRecordable.cpp
+++ b/DRAMSys/library/src/controller/ControllerRecordable.cpp
@@ -44,11 +44,11 @@ tlm_sync_enum ControllerRecordable::nb_transport_fw(tlm_generic_payload &trans,
     return Controller::nb_transport_fw(trans, phase, delay);
 }
 
-tlm_sync_enum ControllerRecordable::nb_transport_bw(tlm_generic_payload &trans,
-                              tlm_phase &phase, sc_time &delay)
+tlm_sync_enum ControllerRecordable::nb_transport_bw(tlm_generic_payload &,
+                              tlm_phase &, sc_time &)
 {
-    recordPhase(trans, phase, delay);
-    return Controller::nb_transport_bw(trans, phase, delay);
+    SC_REPORT_FATAL("Controller", "nb_transport_bw of controller must not be called");
+    return TLM_ACCEPTED;
 }
 
 void ControllerRecordable::sendToFrontend(tlm_generic_payload *payload, tlm_phase phase)