From 812b540ed53d1a7216a494eacf72aa8d0e9cf79d Mon Sep 17 00:00:00 2001 From: Derek Christ Date: Tue, 6 May 2025 10:43:15 +0200 Subject: [PATCH] Make DRAMPower required again DRAMPower was only optional because the linker had problems when integrating with gem5 as there still exists a very old version in the source tree. With the new namespaces, there is no longer a need for making DRAMPower optional. --- CMakeLists.txt | 9 +-- README.md | 5 -- .../configuration/memspec/MemSpecDDR5.cpp | 8 +-- .../configuration/memspec/MemSpecDDR5.h | 3 - .../configuration/memspec/MemSpecLPDDR5.cpp | 8 +-- .../configuration/memspec/MemSpecLPDDR5.h | 2 - src/libdramsys/CMakeLists.txt | 3 +- .../DRAMSys/configuration/memspec/MemSpec.h | 24 ++++---- .../configuration/memspec/MemSpecDDR4.cpp | 6 +- .../configuration/memspec/MemSpecDDR4.h | 7 --- .../configuration/memspec/MemSpecLPDDR4.cpp | 6 +- .../configuration/memspec/MemSpecLPDDR4.h | 8 --- src/libdramsys/DRAMSys/controller/Command.cpp | 60 +++++++++---------- src/libdramsys/DRAMSys/controller/Command.h | 4 -- src/libdramsys/DRAMSys/simulation/Dram.cpp | 19 +----- src/libdramsys/DRAMSys/simulation/Dram.h | 9 +-- .../DRAMSys/simulation/SimConfig.cpp | 6 -- 17 files changed, 57 insertions(+), 130 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index a5f0e2dd..51d8073c 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -150,14 +150,7 @@ endif() find_package(SystemCLanguage REQUIRED) find_package(SQLite3 REQUIRED) find_package(DRAMUtils REQUIRED) - -find_package(DRAMPower) - -if (DRAMPower_FOUND) - message(STATUS "Building with DRAMPower") -else() - message(STATUS "Building without DRAMPower") -endif() +find_package(DRAMPower REQUIRED) ############################################### ### Source Directory ### diff --git a/README.md b/README.md index eae8c019..758f0368 100644 --- a/README.md +++ b/README.md @@ -82,11 +82,6 @@ $ cmake -S . -B build $ cmake --build build ``` -To include **DRAMPower** in your build enable the CMake option `DRAMSYS_WITH_DRAMPOWER`: -```console -$ cmake -B build -D DRAMSYS_WITH_DRAMPOWER=Y -``` - If you plan to integrate DRAMSys into your own SystemC TLM-2.0 project you can build only the DRAMSys library by disabling the CMake option `DRAMSYS_BUILD_CLI`. To include the Trace Analyzer in the build process, enable the CMake option `DRAMSYS_BUILD_TRACE_ANALYZER`. diff --git a/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.cpp b/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.cpp index ce08b489..cc4feb7f 100644 --- a/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.cpp +++ b/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.cpp @@ -9,7 +9,9 @@ #include "MemSpecDDR5.h" -#include +#include "DRAMSys/common/utils.h" + +#include #include @@ -278,11 +280,9 @@ bool MemSpecDDR5::requiresMaskedWrite(const tlm::tlm_generic_payload& payload) c return !allBytesEnabled(payload); } -#ifdef DRAMPOWER std::unique_ptr> MemSpecDDR5::toDramPowerObject() const { - return std::make_unique(std::move(DRAMPower::MemSpecDDR5(memSpec))); + return std::make_unique(DRAMPower::MemSpecDDR5(memSpec)); } -#endif } // namespace DRAMSys diff --git a/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.h b/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.h index 7a719985..92c79af4 100644 --- a/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.h +++ b/extensions/standards/DDR5/DRAMSys/configuration/memspec/MemSpecDDR5.h @@ -116,10 +116,7 @@ public: [[nodiscard]] bool requiresMaskedWrite(const tlm::tlm_generic_payload& payload) const override; -#ifdef DRAMPOWER [[nodiscard]] std::unique_ptr> toDramPowerObject() const override; -#endif - }; } // namespace DRAMSys diff --git a/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.cpp b/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.cpp index 8907af56..4151050c 100644 --- a/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.cpp +++ b/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.cpp @@ -37,7 +37,9 @@ #include "MemSpecLPDDR5.h" -#include +#include "DRAMSys/common/utils.h" + +#include using namespace sc_core; using namespace tlm; @@ -255,11 +257,9 @@ bool MemSpecLPDDR5::requiresMaskedWrite(const tlm::tlm_generic_payload& payload) return !allBytesEnabled(payload); } -#ifdef DRAMPOWER std::unique_ptr> MemSpecLPDDR5::toDramPowerObject() const { - return std::make_unique(std::move(DRAMPower::MemSpecLPDDR5(memSpec))); + return std::make_unique(DRAMPower::MemSpecLPDDR5(memSpec)); } -#endif } // namespace DRAMSys diff --git a/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.h b/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.h index 0773fe29..38dba622 100644 --- a/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.h +++ b/extensions/standards/LPDDR5/DRAMSys/configuration/memspec/MemSpecLPDDR5.h @@ -134,10 +134,8 @@ public: [[nodiscard]] bool requiresMaskedWrite(const tlm::tlm_generic_payload& payload) const override; -#ifdef DRAMPOWER [[nodiscard]] std::unique_ptr> toDramPowerObject() const override; -#endif private: unsigned per2BankOffset; diff --git a/src/libdramsys/CMakeLists.txt b/src/libdramsys/CMakeLists.txt index f74ea34b..ad802e0c 100644 --- a/src/libdramsys/CMakeLists.txt +++ b/src/libdramsys/CMakeLists.txt @@ -101,7 +101,6 @@ target_compile_features(libdramsys PUBLIC cxx_std_17) target_compile_definitions(libdramsys PUBLIC DRAMSYS_RESOURCE_DIR="${DRAMSYS_RESOURCE_DIR}" - $<$:DRAMPOWER> ) target_link_libraries(libdramsys @@ -109,7 +108,7 @@ target_link_libraries(libdramsys SystemC::systemc DRAMSys::config DRAMUtils::DRAMUtils - $<$:DRAMPower::DRAMPower> + DRAMPower::DRAMPower PRIVATE SQLite::SQLite3 diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h b/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h index d307d0ef..caf3f2ec 100644 --- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h +++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h @@ -43,16 +43,14 @@ #include "DRAMSys/common/utils.h" #include "DRAMSys/controller/Command.h" +#include +#include + +#include #include #include #include #include -#include - -#ifdef DRAMPOWER -#include -#include -#endif namespace DRAMSys { @@ -64,8 +62,7 @@ public: MemSpec& operator=(MemSpec&&) = delete; virtual ~MemSpec() = default; - static constexpr enum sc_core::sc_time_unit TCK_UNIT - = sc_core::SC_SEC; + static constexpr enum sc_core::sc_time_unit TCK_UNIT = sc_core::SC_SEC; const uint64_t numberOfChannels; const uint64_t ranksPerChannel; @@ -115,20 +112,19 @@ public: [[nodiscard]] double getCommandLengthInCycles(Command command) const; [[nodiscard]] uint64_t getSimMemSizeInBytes() const; -#ifdef DRAMPOWER /** * @brief Creates the DRAMPower object if the standard is supported by DRAMPower. * If the standard is not supported, a fatal error is reported and the simulation is aborted. * @return unique_ptr to the DRAMPower object. */ - [[nodiscard]] virtual std::unique_ptr> toDramPowerObject() const + [[nodiscard]] virtual std::unique_ptr> + toDramPowerObject() const { SC_REPORT_FATAL("MemSpec", "DRAMPower does not support this memory standard"); sc_core::sc_abort(); // This line is never reached, but it is needed to avoid a compiler warning return nullptr; } -#endif protected: [[nodiscard]] static bool allBytesEnabled(const tlm::tlm_generic_payload& trans) @@ -147,7 +143,7 @@ protected: return true; } - template + template MemSpec(const MemSpecType& memSpec, uint64_t numberOfChannels, uint64_t ranksPerChannel, @@ -169,8 +165,8 @@ protected: columnsPerRow(memSpec.memarchitecturespec.nbrOfColumns), defaultBurstLength(memSpec.memarchitecturespec.burstLength), maxBurstLength(memSpec.memarchitecturespec.maxBurstLength.has_value() - ? memSpec.memarchitecturespec.maxBurstLength.value() - : defaultBurstLength), + ? memSpec.memarchitecturespec.maxBurstLength.value() + : defaultBurstLength), dataRate(memSpec.memarchitecturespec.dataRate), bitWidth(memSpec.memarchitecturespec.width), dataBusWidth(bitWidth * devicesPerRank), diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.cpp b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.cpp index 85163fd5..70bc86e7 100644 --- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.cpp +++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.cpp @@ -39,6 +39,8 @@ #include "DRAMSys/common/utils.h" +#include + #include using namespace sc_core; @@ -189,11 +191,9 @@ bool MemSpecDDR4::requiresMaskedWrite(const tlm::tlm_generic_payload& payload) c return !allBytesEnabled(payload); } -#ifdef DRAMPOWER std::unique_ptr> MemSpecDDR4::toDramPowerObject() const { - return std::make_unique(std::move(DRAMPower::MemSpecDDR4(memSpec))); + return std::make_unique(DRAMPower::MemSpecDDR4(memSpec)); } -#endif } // namespace DRAMSys diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.h b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.h index 2bf128d1..dece6093 100644 --- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.h +++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecDDR4.h @@ -42,11 +42,6 @@ #include -#ifdef DRAMPOWER -#include "DRAMPower/standards/ddr4/DDR4.h" -#include "DRAMPower/memspec/MemSpecDDR4.h" -#endif - #include namespace DRAMSys @@ -102,9 +97,7 @@ public: [[nodiscard]] bool requiresMaskedWrite(const tlm::tlm_generic_payload& payload) const override; -#ifdef DRAMPOWER [[nodiscard]] std::unique_ptr> toDramPowerObject() const override; -#endif }; } // namespace DRAMSys diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.cpp b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.cpp index 2a33dd47..d0fe0d5f 100644 --- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.cpp +++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.cpp @@ -39,6 +39,8 @@ #include "DRAMSys/common/utils.h" +#include + #include using namespace sc_core; @@ -188,12 +190,10 @@ MemSpecLPDDR4::getIntervalOnDataStrobe(Command command, throw; } -#ifdef DRAMPOWER std::unique_ptr> MemSpecLPDDR4::toDramPowerObject() const { - return std::make_unique(std::move(DRAMPower::MemSpecLPDDR4(memSpec))); + return std::make_unique(DRAMPower::MemSpecLPDDR4(memSpec)); } -#endif bool MemSpecLPDDR4::requiresMaskedWrite(const tlm::tlm_generic_payload& payload) const { diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.h b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.h index 55ce805f..f18fc594 100644 --- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.h +++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpecLPDDR4.h @@ -42,11 +42,6 @@ #include -#ifdef DRAMPOWER -#include "DRAMPower/standards/lpddr4/LPDDR4.h" -#include "DRAMPower/memspec/MemSpecLPDDR4.h" -#endif - #include namespace DRAMSys @@ -106,10 +101,7 @@ public: [[nodiscard]] bool requiresMaskedWrite(const tlm::tlm_generic_payload& payload) const override; -#ifdef DRAMPOWER [[nodiscard]] std::unique_ptr> toDramPowerObject() const override; -#endif - }; } // namespace DRAMSys diff --git a/src/libdramsys/DRAMSys/controller/Command.cpp b/src/libdramsys/DRAMSys/controller/Command.cpp index 3752c4d4..71d8abf7 100644 --- a/src/libdramsys/DRAMSys/controller/Command.cpp +++ b/src/libdramsys/DRAMSys/controller/Command.cpp @@ -43,10 +43,6 @@ using namespace tlm; -#ifdef DRAMPOWER -using namespace DRAMPower; -#endif - namespace DRAMSys { @@ -185,41 +181,39 @@ tlm_phase Command::toPhase() const return phaseOfCommand[type]; } -#ifdef DRAMPOWER -CmdType phaseToDRAMPowerCommand(tlm_phase phase) +DRAMPower::CmdType phaseToDRAMPowerCommand(tlm_phase phase) { // TODO missing DSMEN, DSMEX assert(phase >= BEGIN_NOP && phase <= END_SREF); - static std::array phaseOfCommand = { - CmdType::NOP, // 0 - CmdType::RD, // 1 - CmdType::WR, // 2 - CmdType::NOP, // 3 - CmdType::RDA, // 4 - CmdType::WRA, // 5 - CmdType::NOP, // 6 - CmdType::ACT, // 7 - CmdType::PRE, // 8, PREPB - CmdType::REFB, // 9, REFPB - CmdType::NOP, // 10, RFMPB - CmdType::REFP2B, // 11, REFP2B - CmdType::NOP, // 12, RFMP2B - CmdType::PRESB, // 13, PRESB - CmdType::REFSB, // 14, REFSB - CmdType::NOP, // 15, RFMSB - CmdType::PREA, // 16, PREAB - CmdType::REFA, // 17, REFAB - CmdType::NOP, // 18, RFMAB - CmdType::PDEA, // 19 - CmdType::PDEP, // 20 - CmdType::SREFEN, // 21 - CmdType::PDXA, // 22 - CmdType::PDXP, // 23 - CmdType::SREFEX // 24 + static std::array phaseOfCommand = { + DRAMPower::CmdType::NOP, // 0 + DRAMPower::CmdType::RD, // 1 + DRAMPower::CmdType::WR, // 2 + DRAMPower::CmdType::NOP, // 3 + DRAMPower::CmdType::RDA, // 4 + DRAMPower::CmdType::WRA, // 5 + DRAMPower::CmdType::NOP, // 6 + DRAMPower::CmdType::ACT, // 7 + DRAMPower::CmdType::PRE, // 8, PREPB + DRAMPower::CmdType::REFB, // 9, REFPB + DRAMPower::CmdType::NOP, // 10, RFMPB + DRAMPower::CmdType::REFP2B, // 11, REFP2B + DRAMPower::CmdType::NOP, // 12, RFMP2B + DRAMPower::CmdType::PRESB, // 13, PRESB + DRAMPower::CmdType::REFSB, // 14, REFSB + DRAMPower::CmdType::NOP, // 15, RFMSB + DRAMPower::CmdType::PREA, // 16, PREAB + DRAMPower::CmdType::REFA, // 17, REFAB + DRAMPower::CmdType::NOP, // 18, RFMAB + DRAMPower::CmdType::PDEA, // 19 + DRAMPower::CmdType::PDEP, // 20 + DRAMPower::CmdType::SREFEN, // 21 + DRAMPower::CmdType::PDXA, // 22 + DRAMPower::CmdType::PDXP, // 23 + DRAMPower::CmdType::SREFEX // 24 }; return phaseOfCommand[phase - BEGIN_NOP]; } -#endif bool Command::isBankCommand() const { diff --git a/src/libdramsys/DRAMSys/controller/Command.h b/src/libdramsys/DRAMSys/controller/Command.h index 7faa0053..41d44531 100644 --- a/src/libdramsys/DRAMSys/controller/Command.h +++ b/src/libdramsys/DRAMSys/controller/Command.h @@ -38,9 +38,7 @@ #ifndef COMMAND_H #define COMMAND_H -#ifdef DRAMPOWER #include -#endif #include #include @@ -86,9 +84,7 @@ DECLARE_EXTENDED_PHASE(END_PDNA); // 27 DECLARE_EXTENDED_PHASE(END_PDNP); // 28 DECLARE_EXTENDED_PHASE(END_SREF); // 29 -#ifdef DRAMPOWER DRAMPower::CmdType phaseToDRAMPowerCommand(tlm::tlm_phase phase); -#endif bool phaseHasDataStrobe(tlm::tlm_phase phase); bool isPowerDownEntryPhase(tlm::tlm_phase phase); diff --git a/src/libdramsys/DRAMSys/simulation/Dram.cpp b/src/libdramsys/DRAMSys/simulation/Dram.cpp index 016eacee..c110ad02 100644 --- a/src/libdramsys/DRAMSys/simulation/Dram.cpp +++ b/src/libdramsys/DRAMSys/simulation/Dram.cpp @@ -55,17 +55,11 @@ #include #endif -#ifdef DRAMPOWER -#include "DRAMPower/command/Command.h" -#endif +#include using namespace sc_core; using namespace tlm; -#ifdef DRAMPOWER -using namespace DRAMPower; -#endif - namespace DRAMSys { @@ -110,7 +104,6 @@ Dram::Dram(const sc_module_name& name, tSocket.register_b_transport(this, &Dram::b_transport); tSocket.register_transport_dbg(this, &Dram::transport_dbg); -#ifdef DRAMPOWER if (simConfig.powerAnalysis) { DRAMPower = memSpec.toDramPowerObject(); @@ -125,7 +118,6 @@ Dram::Dram(const sc_module_name& name, if (simConfig.powerAnalysis && simConfig.enableWindowing) SC_THREAD(powerWindow); -#endif } Dram::~Dram() @@ -136,7 +128,6 @@ Dram::~Dram() void Dram::reportPower() { -#ifdef DRAMPOWER if (!DRAMPower) return; @@ -158,14 +149,12 @@ void Dram::reportPower() tlmRecorder->recordPower(sc_time_stamp().to_seconds(), energy / time); } -#endif } tlm_sync_enum Dram::nb_transport_fw(tlm_generic_payload& trans, tlm_phase& phase, sc_time& delay) { assert(phase >= BEGIN_RD && phase <= END_SREF); -#ifdef DRAMPOWER if (DRAMPower) { std::size_t rank = static_cast(ControllerExtension::getRank(trans)); // relaitve to the channel @@ -190,7 +179,6 @@ tlm_sync_enum Dram::nb_transport_fw(tlm_generic_payload& trans, tlm_phase& phase DRAMPower::Command command(cycle, phaseToDRAMPowerCommand(phase), target, data, datasize); DRAMPower->doCoreInterfaceCommand(command); } -#endif if (storeMode == Config::StoreModeType::Store) { @@ -311,10 +299,6 @@ void Dram::deserialize(std::istream& stream) stream.read(reinterpret_cast(memory), channelSize); } -#ifdef DRAMPOWER -// This Thread is only triggered when Power Simulation is enabled. -// It estimates the current average power which will be stored in the trace database for -// visualization purposes. void Dram::powerWindow() { int64_t clkCycles = 0; @@ -354,6 +338,5 @@ void Dram::powerWindow() std::string("\t[W]")); } } -#endif } // namespace DRAMSys diff --git a/src/libdramsys/DRAMSys/simulation/Dram.h b/src/libdramsys/DRAMSys/simulation/Dram.h index efef7f05..6dc56ece 100644 --- a/src/libdramsys/DRAMSys/simulation/Dram.h +++ b/src/libdramsys/DRAMSys/simulation/Dram.h @@ -48,10 +48,8 @@ #include "DRAMSys/configuration/memspec/MemSpec.h" #include "DRAMSys/simulation/SimConfig.h" -#ifdef DRAMPOWER -#include "DRAMPower/command/CmdType.h" -#include "DRAMPower/dram/dram_base.h" -#endif +#include +#include #include #include @@ -74,13 +72,12 @@ protected: TlmRecorder* const tlmRecorder; sc_core::sc_time powerWindowSize; -#ifdef DRAMPOWER std::unique_ptr> DRAMPower; + // This Thread is only triggered when Power Simulation is enabled. // It estimates the current average power which will be stored in the trace database for // visualization purposes. void powerWindow(); -#endif virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans, tlm::tlm_phase& phase, diff --git a/src/libdramsys/DRAMSys/simulation/SimConfig.cpp b/src/libdramsys/DRAMSys/simulation/SimConfig.cpp index b5d343d3..1245245e 100644 --- a/src/libdramsys/DRAMSys/simulation/SimConfig.cpp +++ b/src/libdramsys/DRAMSys/simulation/SimConfig.cpp @@ -62,12 +62,6 @@ SimConfig::SimConfig(const Config::SimConfig& simConfig) : if (windowSize == 0) SC_REPORT_FATAL("SimConfig", "Minimum window size is 1"); - -#ifndef DRAMPOWER - if (powerAnalysis) - SC_REPORT_FATAL("SimConfig", - "Power analysis is only supported with included DRAMPower library!"); -#endif } } // namespace DRAMSys