From 8115aba222c91c5e979d51f5cbf80ad6424ce414 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Sun, 18 Aug 2019 19:56:17 +0200 Subject: [PATCH] Fixed wrong PRE -<> PREA test in TraceAnalyzer. --- DRAMSys/traceAnalyzer/scripts/tests.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DRAMSys/traceAnalyzer/scripts/tests.py b/DRAMSys/traceAnalyzer/scripts/tests.py index c38e1d2d..6b2877ca 100755 --- a/DRAMSys/traceAnalyzer/scripts/tests.py +++ b/DRAMSys/traceAnalyzer/scripts/tests.py @@ -321,7 +321,7 @@ def timing_constraint(FirstPhase, SecondPhase): FirstPhaseName = FirstPhase[0] SecondPhaseName = SecondPhase[0] - if (FirstPhaseName == "PRE" or FirstPhaseName == "PRE_ALL"): + if ((FirstPhaseName == "PRE" or FirstPhaseName == "PRE_ALL") and SecondPhaseName != "PRE_ALL"): return dramconfig.tRP elif (FirstPhaseName == "ACT"):