From 7c33d48398a005e774bf1a2825b4f0646b1bfe26 Mon Sep 17 00:00:00 2001
From: Lukas Steiner <lsteiner@rhrk.uni-kl.de>
Date: Thu, 13 Apr 2023 16:09:00 +0200
Subject: [PATCH] Add common interface for BM, RM and PDM.

---
 src/simulator/simulator/TlmProfiler.h | 109 ++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)
 create mode 100644 src/simulator/simulator/TlmProfiler.h

diff --git a/src/simulator/simulator/TlmProfiler.h b/src/simulator/simulator/TlmProfiler.h
new file mode 100644
index 00000000..02e2f753
--- /dev/null
+++ b/src/simulator/simulator/TlmProfiler.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2020, University of Kaiserslautern
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors:
+ *    Lukas Steiner
+ */
+
+#ifndef TLMPROFILER_H
+#define TLMPROFILER_H
+
+#include <systemc>
+#include <tlm_utils/simple_target_socket.h>
+#include <tlm_utils/simple_initiator_socket.h>
+#include <unordered_map>
+
+
+template<unsigned int BUSWIDTH = 32>
+class TlmProfiler : public sc_core::sc_module
+{
+public:
+    tlm_utils::simple_target_socket<TlmProfiler, BUSWIDTH> tSocket;
+    tlm_utils::simple_initiator_socket<TlmProfiler, BUSWIDTH> iSocket;
+    
+    TlmProfiler(sc_core::sc_module_name name) : sc_core::sc_module(name)
+    {
+        tSocket.register_nb_transport_fw(this, &TlmProfiler::nb_transport_fw);
+        tSocket.register_transport_dbg(this, &TlmProfiler::transport_dbg);
+        iSocket.register_nb_transport_bw(this, &TlmProfiler::nb_transport_bw);
+
+        std::cout << "Constructor called" << std::endl;
+    }
+
+private:
+    std::unordered_map<tlm::tlm_generic_payload*, sc_core::sc_time> transStart;
+    uint64_t totalTranses = 0;
+    uint64_t totalTranses2 = 0;
+    sc_core::sc_time totalLatency = sc_core::SC_ZERO_TIME;
+
+    tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans,
+                                  tlm::tlm_phase& phase, sc_core::sc_time& delay)
+    {
+        //std::cout << "nb_transport_fw: " << phase << " @ " << sc_core::sc_time_stamp() << ", command: " << trans.get_command() << std::endl;
+        tlm::tlm_sync_enum returnVal = iSocket->nb_transport_fw(trans, phase, delay);
+        //std::cout << "tlm_sync_enum: " << returnVal << ", phase: " << phase << ", delay: " << delay << std::endl; 
+        return returnVal;
+    }
+
+    unsigned transport_dbg(tlm::tlm_generic_payload& trans)
+    {
+        return iSocket->transport_dbg(trans);
+    }
+
+    tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload& trans,
+                                  tlm::tlm_phase& phase, sc_core::sc_time& delay)
+    {
+        //std::cout << "nb_transport_bw: " << phase << " @ " << sc_core::sc_time_stamp() << ", command: " << trans.get_command() << std::endl;
+        if (phase == tlm::END_REQ)
+        {
+            totalTranses2++;
+            transStart[&trans] = sc_core::sc_time_stamp();
+        }
+        else if (phase == tlm::BEGIN_RESP)
+        {
+            totalLatency += (sc_core::sc_time_stamp() - transStart.at(&trans));
+            totalTranses++;
+        }
+        tlm::tlm_sync_enum returnVal = tSocket->nb_transport_bw(trans, phase, delay);
+        //std::cout << "tlm_sync_enum: " << returnVal << ", phase: " << phase << ", delay: " << delay << std::endl; 
+        return returnVal;
+    }
+
+    void end_of_simulation() override
+    {
+        std::cout << "Total transactions: " << totalTranses << ", " << totalTranses2 << std::endl;
+        std::cout << sc_core::sc_time_stamp().to_seconds() << std::endl;
+        std::cout << "AVG Bandwidth: " << 512ULL * totalTranses / sc_core::sc_time_stamp().to_seconds() / 1'000'000'000 << std::endl;
+        std::cout << "AVG Latency: " << totalLatency / totalTranses << std::endl;
+    }
+};
+
+#endif // TLMPROFILER_H