Implement stack ID for HBM3

tests/tests_configuration/test_configuration.cpp

@@ -75,6 +75,7 @@ protected:
         addressMapBitVector({17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32}),
         addressMapBitVector({33}),
         std::nullopt,
+        std::nullopt,
         std::nullopt};
 
     DRAMSys::Config::McConfig mcConfig{PagePolicyType::Open,

tests/tests_dramsys/AddressDecoderTests.cpp

@@ -81,13 +81,14 @@ TEST_F(AddressDecoderFixture, Encoding)
 {
     unsigned int channel = 0;
     unsigned int rank = 0;
+    unsigned int stack = 0;
     unsigned int bankgroup = 3;
     unsigned int bank = 12;
     unsigned int row = 29874;
     unsigned int column = 170;
     unsigned int byte = 0;
 
-    DRAMSys::DecodedAddress decodedAddress(channel, rank, bankgroup, bank, row, column, byte);
+    DRAMSys::DecodedAddress decodedAddress(channel, rank, stack, bankgroup, bank, row, column, byte);
 
     uint64_t address = addressDecoder.encodeAddress(decodedAddress);
     EXPECT_EQ(address, 0x3A59'1474);

tests/tests_regression/HBM3/hbm3-example.json

@@ -64,6 +64,7 @@
                 "nbrOfBanks": 16,
                 "nbrOfColumns": 128,
                 "nbrOfPseudoChannels": 2,
+                "nbrOfStacks": 1,
                 "nbrOfRows": 65536,
                 "width": 32,
                 "nbrOfDevices": 1,
@@ -77,6 +78,7 @@
             "memtimingspec": {
                 "CCDL": 4,
                 "CCDS": 2,
+                "CCDR": 3,
                 "CKE": 8,
                 "DQSCK": 1,
                 "FAW": 16,