diff --git a/src/libdramsys/DRAMSys/common/DebugManager.cpp b/src/libdramsys/DRAMSys/common/DebugManager.cpp
index f558057b..21f06bde 100644
--- a/src/libdramsys/DRAMSys/common/DebugManager.cpp
+++ b/src/libdramsys/DRAMSys/common/DebugManager.cpp
@@ -75,7 +75,7 @@ void DebugManager::openDebugFile(const std::string &filename)
 }
 
 DebugManager::DebugManager()
-    : debugEnabled(false), writeToConsole(false), writeToFile(false)
+     
 {
 }
 
diff --git a/src/libdramsys/DRAMSys/common/DebugManager.h b/src/libdramsys/DRAMSys/common/DebugManager.h
index 411183b2..2d6c0d99 100644
--- a/src/libdramsys/DRAMSys/common/DebugManager.h
+++ b/src/libdramsys/DRAMSys/common/DebugManager.h
@@ -73,9 +73,9 @@ public:
     void openDebugFile(const std::string &filename);
 
 private:
-    bool debugEnabled;
-    bool writeToConsole;
-    bool writeToFile;
+    bool debugEnabled = false;
+    bool writeToConsole = false;
+    bool writeToFile = false;
 
     std::ofstream debugFile;
 };
diff --git a/src/libdramsys/DRAMSys/common/TlmRecorder.cpp b/src/libdramsys/DRAMSys/common/TlmRecorder.cpp
index 9bbb95c5..4f70fe59 100644
--- a/src/libdramsys/DRAMSys/common/TlmRecorder.cpp
+++ b/src/libdramsys/DRAMSys/common/TlmRecorder.cpp
@@ -53,7 +53,7 @@ namespace DRAMSys
 {
 
 TlmRecorder::TlmRecorder(const std::string& name, const Configuration& config, const std::string& dbName) :
-        name(name), config(config), memSpec(*config.memSpec), totalNumTransactions(0),
+        name(name), config(config), memSpec(*config.memSpec), 
         simulationTimeCoveredByRecording(SC_ZERO_TIME)
 {
     currentDataBuffer = &recordingDataBuffer[0];
diff --git a/src/libdramsys/DRAMSys/common/TlmRecorder.h b/src/libdramsys/DRAMSys/common/TlmRecorder.h
index 7a950f2e..17bfcbd3 100644
--- a/src/libdramsys/DRAMSys/common/TlmRecorder.h
+++ b/src/libdramsys/DRAMSys/common/TlmRecorder.h
@@ -162,7 +162,7 @@ private:
 
     std::unordered_map<tlm::tlm_generic_payload*, Transaction> currentTransactionsInSystem;
 
-    uint64_t totalNumTransactions;
+    uint64_t totalNumTransactions = 0;
     sc_core::sc_time simulationTimeCoveredByRecording;
 
     sqlite3 *db = nullptr;
diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.cpp b/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.cpp
index 5c3c140d..b71ae1cd 100644
--- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.cpp
+++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.cpp
@@ -75,8 +75,8 @@ MemSpec::MemSpec(const DRAMSys::Config::MemSpec& memSpec,
     tCK(sc_time(1.0 / fCKMHz, SC_US)),
     memoryId(memSpec.memoryId),
     memoryType(memoryType),
-    burstDuration(tCK* (static_cast<double>(defaultBurstLength) / dataRate)),
-    memorySizeBytes(0)
+    burstDuration(tCK* (static_cast<double>(defaultBurstLength) / dataRate))
+    
 {
     commandLengthInCycles = std::vector<double>(Command::numberOfCommands(), 1);
 }
diff --git a/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h b/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h
index 83e7afca..ff715d1b 100644
--- a/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h
+++ b/src/libdramsys/DRAMSys/configuration/memspec/MemSpec.h
@@ -118,7 +118,7 @@ protected:
     // Command lengths in cycles on bus, usually one clock cycle
     std::vector<double> commandLengthInCycles;
     sc_core::sc_time burstDuration;
-    uint64_t memorySizeBytes;
+    uint64_t memorySizeBytes = 0;
 };
 
 } // namespace DRAMSys
diff --git a/src/libdramsys/DRAMSys/controller/refresh/RefreshManagerSameBank.cpp b/src/libdramsys/DRAMSys/controller/refresh/RefreshManagerSameBank.cpp
index 08078262..75ecb124 100644
--- a/src/libdramsys/DRAMSys/controller/refresh/RefreshManagerSameBank.cpp
+++ b/src/libdramsys/DRAMSys/controller/refresh/RefreshManagerSameBank.cpp
@@ -65,7 +65,7 @@ RefreshManagerSameBank::RefreshManagerSameBank(const Configuration& config,
     }
 
     // allBankMachines: ((0-4-8-12-16-20-24-28), (1-5-9-13-17-21-25-29), ...)
-    std::list<std::vector<BankMachine *>>::iterator it = allBankMachines.begin();
+    auto it = allBankMachines.begin();
     for (unsigned bankID = 0; bankID < memSpec.banksPerGroup; bankID++)
     {
         for (unsigned groupID = 0; groupID < memSpec.groupsPerRank; groupID++)
diff --git a/src/libdramsys/DRAMSys/simulation/ReorderBuffer.h b/src/libdramsys/DRAMSys/simulation/ReorderBuffer.h
index cff46124..dac5e389 100644
--- a/src/libdramsys/DRAMSys/simulation/ReorderBuffer.h
+++ b/src/libdramsys/DRAMSys/simulation/ReorderBuffer.h
@@ -56,8 +56,7 @@ public:
     tlm_utils::simple_target_socket<ReorderBuffer> tSocket;
 
     SC_CTOR(ReorderBuffer) :
-        payloadEventQueue(this, &ReorderBuffer::peqCallback),
-        responseIsPendingInInitator(false)
+        payloadEventQueue(this, &ReorderBuffer::peqCallback)
     {
         iSocket.register_nb_transport_bw(this, &ReorderBuffer::nb_transport_bw);
         tSocket.register_nb_transport_fw(this, &ReorderBuffer::nb_transport_fw);
@@ -68,7 +67,7 @@ private:
     std::deque<tlm::tlm_generic_payload*> pendingRequestsInOrder;
     std::set<tlm::tlm_generic_payload*>   receivedResponses;
 
-    bool responseIsPendingInInitator;
+    bool responseIsPendingInInitator = false;
 
 
     // Initiated by dram side
diff --git a/src/simulator/simulator/MemoryManager.cpp b/src/simulator/simulator/MemoryManager.cpp
index 25c7d480..9a62e11d 100644
--- a/src/simulator/simulator/MemoryManager.cpp
+++ b/src/simulator/simulator/MemoryManager.cpp
@@ -41,7 +41,7 @@
 using namespace tlm;
 
 MemoryManager::MemoryManager(bool storageEnabled)
-    : numberOfAllocations(0), numberOfFrees(0), storageEnabled(storageEnabled)
+    :  storageEnabled(storageEnabled)
 {}
 
 MemoryManager::~MemoryManager()
diff --git a/src/simulator/simulator/MemoryManager.h b/src/simulator/simulator/MemoryManager.h
index 82c5658c..f5dc99b5 100644
--- a/src/simulator/simulator/MemoryManager.h
+++ b/src/simulator/simulator/MemoryManager.h
@@ -50,8 +50,8 @@ public:
     void free(tlm::tlm_generic_payload* payload) override;
 
 private:
-    uint64_t numberOfAllocations;
-    uint64_t numberOfFrees;
+    uint64_t numberOfAllocations = 0;
+    uint64_t numberOfFrees = 0;
     std::unordered_map<unsigned, std::stack<tlm::tlm_generic_payload*>> freePayloads;
     bool storageEnabled = false;
 };