diff --git a/src/libdramsys/DRAMSys/controller/Controller.cpp b/src/libdramsys/DRAMSys/controller/Controller.cpp
index c826579c..79da9ece 100644
--- a/src/libdramsys/DRAMSys/controller/Controller.cpp
+++ b/src/libdramsys/DRAMSys/controller/Controller.cpp
@@ -552,16 +552,16 @@ void Controller::manageRequests(const sc_time& delay)
 
             transToAcquire.payload->acquire();
 
-            // Align address to minimum burst length
-            uint64_t alignedAddress =
-                transToAcquire.payload->get_address() & ~(minBytesPerBurst - UINT64_C(1));
-            transToAcquire.payload->set_address(alignedAddress);
+            // The following logic assumes that transactions are naturally aligned
+            const uint64_t address = transToAcquire.payload->get_address();
+            const uint64_t dataLength = transToAcquire.payload->get_data_length();
+            assert((dataLength & (dataLength - 1)) == 0); // Data length must be a power of 2
+            assert(address % dataLength == 0);            // Check if naturally aligned
 
-            // continuous block of data that can be fetched with a single burst
-            if ((alignedAddress / maxBytesPerBurst) ==
-                ((alignedAddress + transToAcquire.payload->get_data_length() - 1) /
-                 maxBytesPerBurst))
+            if ((address / maxBytesPerBurst) ==
+                ((address + transToAcquire.payload->get_data_length() - 1) / maxBytesPerBurst))
             {
+                // continuous block of data that can be fetched with a single burst
                 DecodedAddress decodedAddress =
                     addressDecoder.decodeAddress(transToAcquire.payload->get_address());
                 ControllerExtension::setAutoExtension(*transToAcquire.payload,