From 60519463893a7c8a76e924a86bc852a964bdebab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=89der=20Ferreira=20Zulian?= Date: Thu, 25 Jun 2015 13:54:01 +0200 Subject: [PATCH 1/4] Support to multiple TLM recorders - one per channel. Each module connected to a channel (e.g. channel Controller and DRAM) is able to access the TLM recorder for that channel. A module connected to more than one channel must be able to access multiple TLM recorders (one from each channel) and must also be able to decide for which TLM recorder records a transaction should be forwarded. The Arbiter is an example of this kind of module and is currently able to do that. Output file names after this implementation: _channel[0-9]+.tdb (dependent on the number of channels) .txt (a single file, independent of the number of channels) Tests were made with this sim-batch.xml: wideio_multi_channel.stl Output files generated: fifo_channel0.tdb fifo_channel1.tdb fifo_channel2.tdb fifo_channel3.tdb fifo.txt --- DRAMSys/dramSys/src/common/TlmRecorder.cpp | 20 ++----- DRAMSys/dramSys/src/common/TlmRecorder.h | 24 +++----- DRAMSys/dramSys/src/controller/Controller.h | 22 +++---- .../src/controller/ControllerState.cpp | 1 + .../src/controller/core/ControllerCore.h | 3 +- .../core/configuration/Configuration.h | 1 + .../controller/core/configuration/MemSpec.h | 3 +- .../powerdown/PowerDownManagerBankwise.cpp | 1 + .../powerdown/PowerDownManagerTimeout.cpp | 1 + .../core/scheduling/ScheduledCommand.h | 4 +- .../scheduling/checker/ActivateChecker.cpp | 4 +- .../core/scheduling/checker/ReadChecker.cpp | 3 +- .../core/scheduling/checker/ReadChecker.h | 3 +- .../core/scheduling/checker/WriteChecker.cpp | 1 + DRAMSys/dramSys/src/simulation/Arbiter.h | 11 +++- DRAMSys/dramSys/src/simulation/Dram.h | 10 +++- DRAMSys/dramSys/src/simulation/Simulation.cpp | 57 ++++++++++++------- DRAMSys/dramSys/src/simulation/Simulation.h | 7 ++- .../src/simulation/SimulationManager.cpp | 2 +- DRAMSys/dramSys/src/simulation/TracePlayer.h | 4 -- README.md | 7 ++- 21 files changed, 105 insertions(+), 84 deletions(-) diff --git a/DRAMSys/dramSys/src/common/TlmRecorder.cpp b/DRAMSys/dramSys/src/common/TlmRecorder.cpp index 36baa1cf..eef96c8c 100644 --- a/DRAMSys/dramSys/src/common/TlmRecorder.cpp +++ b/DRAMSys/dramSys/src/common/TlmRecorder.cpp @@ -35,29 +35,21 @@ * Matthias Jung */ +#include +#include +#include + #include "TlmRecorder.h" #include "protocol.h" #include "dramExtension.h" #include "xmlAddressdecoder.h" #include "../controller/core/configuration/Configuration.h" -#include -#include -#include using namespace std; -string TlmRecorder::dbName = ""; -string TlmRecorder::sqlScriptURI = ""; -string TlmRecorder::senderName = "TlmRecorder"; -bool TlmRecorder::recordingEnabled = true; - -// ------------- public ----------------------- - -TlmRecorder::TlmRecorder() : - totalNumTransactions(1), simulationTimeCoveredByRecording(SC_ZERO_TIME) +TlmRecorder::TlmRecorder(string uri, string dbname, bool recenable) : sqlScriptURI(uri), dbName(dbname), senderName("TlmRecorder"), recordingEnabled(recenable), totalNumTransactions(1), simulationTimeCoveredByRecording(SC_ZERO_TIME) { - if(recordingEnabled) - { + if (TlmRecorder::recordingEnabled == true) { recordedData.reserve(transactionCommitRate); setUpTransactionTerminatingPhases(); openDB(TlmRecorder::dbName.c_str()); diff --git a/DRAMSys/dramSys/src/common/TlmRecorder.h b/DRAMSys/dramSys/src/common/TlmRecorder.h index 0c3db041..5b9cfa0c 100644 --- a/DRAMSys/dramSys/src/common/TlmRecorder.h +++ b/DRAMSys/dramSys/src/common/TlmRecorder.h @@ -52,22 +52,17 @@ #include "DebugManager.h" #include "Utils.h" - using namespace std; -class TlmRecorder -{ +class TlmRecorder { public: - static std::string sqlScriptURI; - static std::string dbName; - static std::string senderName; - static bool recordingEnabled; + std::string sqlScriptURI; + std::string dbName; + std::string senderName; + bool recordingEnabled; - static inline TlmRecorder& getInstance() - { - static TlmRecorder decoder; - return decoder; - } + TlmRecorder(string uri, string dbname, bool recenable); + ~TlmRecorder(); void recordMemconfig(string memconfig){this->memconfig = memconfig;} void recordMemspec(string memspec){this->memspec = memspec;} @@ -106,9 +101,6 @@ private: std::string memconfig,memspec,traces; - TlmRecorder(); - ~TlmRecorder(); - void prepareSqlStatements(); void executeSqlCommand(std::string command); void executeSqlStatement(sqlite3_stmt* statement); @@ -143,4 +135,6 @@ private: std::string insertTransactionString, insertRangeString, updateRangeString, insertPhaseString, updatePhaseString, insertGeneralInfoString, insertDebugMessageString, updateDataStrobeString; }; + #endif + diff --git a/DRAMSys/dramSys/src/controller/Controller.h b/DRAMSys/dramSys/src/controller/Controller.h index 66cf672b..b43b8b20 100644 --- a/DRAMSys/dramSys/src/controller/Controller.h +++ b/DRAMSys/dramSys/src/controller/Controller.h @@ -74,9 +74,8 @@ template struct Controller: public sc_module, public IController { public: - Controller(sc_module_name /*name*/) : - frontendPEQ(this, &Controller::frontendPEQCallback), dramPEQ(this, &Controller::dramPEQCallback), controllerCorePEQ( - this, &Controller::controllerCorePEQCallback), debugManager(DebugManager::getInstance()) + Controller(sc_module_name /*name*/, TlmRecorder *rec) : + frontendPEQ(this, &Controller::frontendPEQCallback), dramPEQ(this, &Controller::dramPEQCallback), controllerCorePEQ(this, &Controller::controllerCorePEQCallback), debugManager(DebugManager::getInstance()), tlmRecorder(rec) { controllerCore = new ControllerCore(*this, numberOfPayloadsInSystem); buildScheduler(); @@ -91,7 +90,6 @@ public: delete scheduler; } - void terminateSimulation(); // ------- CONTROLLER CORE --------- virtual void send(const ScheduledCommand& command, tlm_generic_payload& payload) override; @@ -137,6 +135,7 @@ private: tlm_utils::peq_with_cb_and_phase controllerCorePEQ; DebugManager& debugManager; + TlmRecorder *tlmRecorder; }; // --- IMPLEMENTATION ----- @@ -181,22 +180,22 @@ void Controller::send(const ScheduledCommand &command, tlm_generic_pay //TODO: refactor tlm recorder case Command::Read: dataStrobe = command.getIntervalOnDataStrobe(); - TlmRecorder::getInstance().updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); + tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); controllerCorePEQ.notify(payload, BEGIN_RD, command.getStart() - sc_time_stamp()); break; case Command::ReadA: dataStrobe = command.getIntervalOnDataStrobe(); - TlmRecorder::getInstance().updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); + tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); controllerCorePEQ.notify(payload, BEGIN_RDA, command.getStart() - sc_time_stamp()); break; case Command::Write: dataStrobe = command.getIntervalOnDataStrobe(); - TlmRecorder::getInstance().updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); + tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); controllerCorePEQ.notify(payload, BEGIN_WR, command.getStart() - sc_time_stamp()); break; case Command::WriteA: dataStrobe = command.getIntervalOnDataStrobe(); - TlmRecorder::getInstance().updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); + tlmRecorder->updateDataStrobe(dataStrobe.start, dataStrobe.end, payload); controllerCorePEQ.notify(payload, BEGIN_WRA, command.getStart() - sc_time_stamp()); break; case Command::AutoRefresh: @@ -352,13 +351,13 @@ tlm_sync_enum Controller::nb_transport_fw(tlm_generic_payload &payload { if (phase == BEGIN_REQ) { - TlmRecorder::getInstance().recordPhase(payload, phase, fwDelay + sc_time_stamp()); + tlmRecorder->recordPhase(payload, phase, fwDelay + sc_time_stamp()); frontendPEQ.notify(payload, phase, clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay) + Configuration::getInstance().memSpec.clk); } else if (phase == END_RESP) { - TlmRecorder::getInstance().recordPhase(payload, phase, + tlmRecorder->recordPhase(payload, phase, fwDelay + sc_time_stamp() + Configuration::getInstance().memSpec.clk); frontendPEQ.notify(payload, phase, clkAlign(sc_time_stamp() + fwDelay) - (sc_time_stamp() + fwDelay)); } @@ -473,7 +472,7 @@ template tlm_sync_enum Controller::nb_transport_bw(tlm_generic_payload &payload, tlm_phase &phase, sc_time &bwDelay) { dramPEQ.notify(payload, phase, bwDelay); - TlmRecorder::getInstance().recordPhase(payload, phase, bwDelay + sc_time_stamp()); + tlmRecorder->recordPhase(payload, phase, bwDelay + sc_time_stamp()); return TLM_ACCEPTED; } @@ -573,3 +572,4 @@ void Controller::terminateSimulation() } #endif /* CONTROLLERWRAPPER_H_ */ + diff --git a/DRAMSys/dramSys/src/controller/ControllerState.cpp b/DRAMSys/dramSys/src/controller/ControllerState.cpp index ff73ded7..9d53f08e 100644 --- a/DRAMSys/dramSys/src/controller/ControllerState.cpp +++ b/DRAMSys/dramSys/src/controller/ControllerState.cpp @@ -38,6 +38,7 @@ #include #include "core/TimingCalculation.h" +using namespace std; const ScheduledCommand ControllerState::getLastCommand(Command command, Bank bank) //TODO const reference? and make const { diff --git a/DRAMSys/dramSys/src/controller/core/ControllerCore.h b/DRAMSys/dramSys/src/controller/core/ControllerCore.h index 455aa53a..cae3758d 100644 --- a/DRAMSys/dramSys/src/controller/core/ControllerCore.h +++ b/DRAMSys/dramSys/src/controller/core/ControllerCore.h @@ -40,15 +40,16 @@ #include #include #include +#include #include "../IController.h" #include "configuration/Configuration.h" #include "powerdown/PowerDownManager.h" #include "refresh/IRefreshManager.h" #include "scheduling/checker/ICommandChecker.h" -#include "../../common/TlmRecorder.h" #include "../RowBufferStates.h" #include "../ControllerState.h" +using namespace std; class ControllerCore { diff --git a/DRAMSys/dramSys/src/controller/core/configuration/Configuration.h b/DRAMSys/dramSys/src/controller/core/configuration/Configuration.h index 6c89fd4e..6ec2d8ee 100644 --- a/DRAMSys/dramSys/src/controller/core/configuration/Configuration.h +++ b/DRAMSys/dramSys/src/controller/core/configuration/Configuration.h @@ -93,3 +93,4 @@ private: }; #endif /* CONFIGURATION_H_ */ + diff --git a/DRAMSys/dramSys/src/controller/core/configuration/MemSpec.h b/DRAMSys/dramSys/src/controller/core/configuration/MemSpec.h index 95b41ed1..31226abc 100644 --- a/DRAMSys/dramSys/src/controller/core/configuration/MemSpec.h +++ b/DRAMSys/dramSys/src/controller/core/configuration/MemSpec.h @@ -149,6 +149,5 @@ struct MemSpec sc_time tDataStrobeHistory(){return tWTR_L;} }; - - #endif /* MemSpec_H_ */ + diff --git a/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerBankwise.cpp b/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerBankwise.cpp index 45f3059b..6237fe6d 100644 --- a/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerBankwise.cpp +++ b/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerBankwise.cpp @@ -37,6 +37,7 @@ #include "PowerDownManager.h" #include "../ControllerCore.h" #include "../../../common/Utils.h" +#include "../../../common/DebugManager.h" #include "../TimingCalculation.h" using namespace tlm; diff --git a/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerTimeout.cpp b/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerTimeout.cpp index bc6b9096..2b2b172a 100644 --- a/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerTimeout.cpp +++ b/DRAMSys/dramSys/src/controller/core/powerdown/PowerDownManagerTimeout.cpp @@ -38,6 +38,7 @@ #include "PowerDownManagerTimeout.h" #include "../ControllerCore.h" #include "../../../common/Utils.h" +#include "../../../common/DebugManager.h" #include "../TimingCalculation.h" using namespace tlm; diff --git a/DRAMSys/dramSys/src/controller/core/scheduling/ScheduledCommand.h b/DRAMSys/dramSys/src/controller/core/scheduling/ScheduledCommand.h index 4452df29..e0265737 100644 --- a/DRAMSys/dramSys/src/controller/core/scheduling/ScheduledCommand.h +++ b/DRAMSys/dramSys/src/controller/core/scheduling/ScheduledCommand.h @@ -41,10 +41,8 @@ #include #include "../../Command.h" #include "../../../common/dramExtension.h" -#include "../../../common/TlmRecorder.h" #include "../../../common/Utils.h" - class ScheduledCommand { public: @@ -88,7 +86,6 @@ public: TimeInterval getIntervalOnDataStrobe() const; - private: Command command; sc_time start; @@ -98,3 +95,4 @@ private: }; #endif /* SCHEDULEDCOMMAND_H_ */ + diff --git a/DRAMSys/dramSys/src/controller/core/scheduling/checker/ActivateChecker.cpp b/DRAMSys/dramSys/src/controller/core/scheduling/checker/ActivateChecker.cpp index 7086f4e7..447bbe1a 100644 --- a/DRAMSys/dramSys/src/controller/core/scheduling/checker/ActivateChecker.cpp +++ b/DRAMSys/dramSys/src/controller/core/scheduling/checker/ActivateChecker.cpp @@ -34,6 +34,7 @@ * Matthias Jung */ +#include #include #include #include "ActivateChecker.h" @@ -41,7 +42,8 @@ #include "../../../../common/DebugManager.h" #include "../../../Command.h" #include "../../../../common/Utils.h" -#include + +using namespace std; void ActivateChecker::delayToSatisfyConstraints(ScheduledCommand& command) const { diff --git a/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.cpp b/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.cpp index 739f4169..e0746d24 100644 --- a/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.cpp +++ b/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.cpp @@ -39,6 +39,8 @@ #include "../../../../common/Utils.h" #include "WriteChecker.h" +using namespace std; + void ReadChecker::delayToSatisfyConstraints(ScheduledCommand& command) const { sc_assert(command.getCommand() == Command::Read || command.getCommand() == Command::ReadA); @@ -132,4 +134,3 @@ sc_time ReadChecker::writeToRead(ScheduledCommand& write, ScheduledCommand& read return config.tWL + getWriteAccessTime() + tWTR; } - diff --git a/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.h b/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.h index 72174d73..7b4ebede 100644 --- a/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.h +++ b/DRAMSys/dramSys/src/controller/core/scheduling/checker/ReadChecker.h @@ -41,7 +41,6 @@ #include "../../configuration/Configuration.h" #include "../../../ControllerState.h" - class ReadChecker: public ICommandChecker { public: @@ -62,5 +61,5 @@ private: bool collidesWithStrobeCommand(ScheduledCommand& read, ScheduledCommand& strobeCommand) const; }; - #endif /* READCHECKER_H_ */ + diff --git a/DRAMSys/dramSys/src/controller/core/scheduling/checker/WriteChecker.cpp b/DRAMSys/dramSys/src/controller/core/scheduling/checker/WriteChecker.cpp index 28689d10..e02130bb 100644 --- a/DRAMSys/dramSys/src/controller/core/scheduling/checker/WriteChecker.cpp +++ b/DRAMSys/dramSys/src/controller/core/scheduling/checker/WriteChecker.cpp @@ -39,6 +39,7 @@ #include "../../../../common/Utils.h" #include "ReadChecker.h" +using namespace std; void WriteChecker::delayToSatisfyConstraints(ScheduledCommand& command) const { diff --git a/DRAMSys/dramSys/src/simulation/Arbiter.h b/DRAMSys/dramSys/src/simulation/Arbiter.h index 2c8d096a..6aed14e6 100644 --- a/DRAMSys/dramSys/src/simulation/Arbiter.h +++ b/DRAMSys/dramSys/src/simulation/Arbiter.h @@ -81,6 +81,11 @@ public: } } + void setTlmRecorders(std::vector recorders) + { + tlmRecorders = recorders; + } + private: tlm_utils::peq_with_cb_and_phase payloadEventQueue; @@ -93,11 +98,13 @@ private: // This is a queue of responses comming from the memory side. The phase of these transactions is BEGIN_RESP. vector> receivedResponses; + std::vector tlmRecorders; + // Initiated by dram side // This function is called when an arbiter's initiator socket receives a transaction from a memory controller - tlm_sync_enum nb_transport_bw(__attribute__((unused)) int id, tlm_generic_payload& payload, tlm_phase& phase, sc_time& bwDelay) + tlm_sync_enum nb_transport_bw(int channelId, tlm_generic_payload &payload, tlm_phase &phase, sc_time &bwDelay) { - TlmRecorder::getInstance().recordPhase(payload, phase, bwDelay + sc_time_stamp()); + tlmRecorders[channelId]->recordPhase(payload, phase, bwDelay + sc_time_stamp()); payloadEventQueue.notify(payload, phase, bwDelay); return TLM_ACCEPTED; } diff --git a/DRAMSys/dramSys/src/simulation/Dram.h b/DRAMSys/dramSys/src/simulation/Dram.h index 44b3d84f..0c981fd3 100644 --- a/DRAMSys/dramSys/src/simulation/Dram.h +++ b/DRAMSys/dramSys/src/simulation/Dram.h @@ -59,7 +59,7 @@ using namespace Data; template -struct Dram: sc_module +struct Dram : sc_module { // TLM Related: tlm_utils::simple_target_socket tSocket; @@ -75,6 +75,8 @@ struct Dram: sc_module // Data Storage: map< unsigned long int, unsigned char[BUSWIDTH/2] > memory; + TlmRecorder *tlmRecorder; + SC_CTOR(Dram) : tSocket("socket") { tSocket.register_nb_transport_fw(this, &Dram::nb_transport_fw); @@ -194,7 +196,7 @@ struct Dram: sc_module virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& payload, tlm::tlm_phase& phase, sc_time& delay) { - TlmRecorder::getInstance().recordPhase(payload, phase, sc_time_stamp() + delay); + tlmRecorder->recordPhase(payload, phase, sc_time_stamp() + delay); // This is only needed for power simulation: unsigned long long cycle = 0; @@ -437,6 +439,10 @@ struct Dram: sc_module DebugManager::getInstance().printDebugMessage(name(), message); } + void setTlmRecorder(TlmRecorder *rec) + { + tlmRecorder = rec; + } }; #endif /* DRAM_H_ */ diff --git a/DRAMSys/dramSys/src/simulation/Simulation.cpp b/DRAMSys/dramSys/src/simulation/Simulation.cpp index efd4c1ee..6b800324 100644 --- a/DRAMSys/dramSys/src/simulation/Simulation.cpp +++ b/DRAMSys/dramSys/src/simulation/Simulation.cpp @@ -52,9 +52,7 @@ using namespace std; Simulation::Simulation(sc_module_name __attribute__((unused)) name, string pathToResources, string traceName, DramSetup setup, - std::vector devices) : - traceName(traceName), dramSetup(setup) - + std::vector devices) : traceName(traceName), dramSetup(setup) { SC_THREAD(stop); @@ -65,8 +63,7 @@ Simulation::Simulation(sc_module_name __attribute__((unused)) name, string pathT ConfigurationLoader::loadMemSpec(Configuration::getInstance(), setup.memspec);//pathToResources + string("configs/memspecs/") + setup.memspec); ConfigurationLoader::loadSimConfig(Configuration::getInstance(), setup.simconfig); - setupTlmRecorder(traceName, pathToResources, devices); - instantiateModules(pathToResources, devices); + instantiateModules(traceName, pathToResources, devices); bindSockets(); setupDebugManager(traceName); } @@ -81,15 +78,20 @@ void Simulation::setupDebugManager(const string& traceName) dbg.openDebugFile(traceName + ".txt"); } -void Simulation::setupTlmRecorder(const string &traceName, const string &pathToResources, const std::vector &devices) + +void Simulation::setupTlmRecorders(const string &traceName, const string &pathToResources, const std::vector &devices) { - if(Configuration::getInstance().DatabaseRecording) - { - TlmRecorder::recordingEnabled = true; - TlmRecorder::dbName = traceName; - TlmRecorder::sqlScriptURI = pathToResources + string("scripts/createTraceDB.sql"); - TlmRecorder::getInstance().recordMemconfig(Configuration::getInstance().memconfigUri); - TlmRecorder::getInstance().recordMemspec(Configuration::getInstance().memspecUri); + // Create TLM Recorders, one per channel. + for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) { + std::string sqlScriptURI = pathToResources + string("scripts/createTraceDB.sql"); + std::string dbName = traceName + string("_channel") + std::to_string(i) + ".tdb"; + TlmRecorder *tlmRecorder = new TlmRecorder(sqlScriptURI.c_str(), dbName.c_str(), true); + + tlmRecorder->recordMemconfig(Configuration::getInstance().memconfigUri); + tlmRecorder->recordMemspec(Configuration::getInstance().memspecUri); + + tlmRecorders.push_back(tlmRecorder); + std::string traceNames; for (size_t i = 0; i < devices.size(); i++) { traceNames.append(devices[i].trace); @@ -97,15 +99,19 @@ void Simulation::setupTlmRecorder(const string &traceName, const string &pathToR continue; traceNames.append(","); } - TlmRecorder::getInstance().recordTracenames(traceNames); + tlmRecorder->recordTracenames(traceNames); } - else - { - TlmRecorder::recordingEnabled = false; + + // Enable all TLM Recorders. TODO: maybe individually? + for (auto rec : tlmRecorders) { + if (Configuration::getInstance().DatabaseRecording == true) + rec->recordingEnabled = true; + else + rec->recordingEnabled = false; } } -void Simulation::instantiateModules(const string &pathToResources, const std::vector& devices) +void Simulation::instantiateModules(const string &traceName, const string &pathToResources, const std::vector &devices) { for (size_t i = 0; i < Configuration::getInstance().NumberOfTracePlayers; i++) { std::string playerStr = "player" + std::to_string(i); @@ -113,15 +119,20 @@ void Simulation::instantiateModules(const string &pathToResources, const std::ve players.push_back(player); } + // Create and properly initialize TLM recorders. They need to be ready before creating some modules. + setupTlmRecorders(traceName, pathToResources, devices); + arbiter = new Arbiter<128>("arbiter"); + arbiter->setTlmRecorders(tlmRecorders); for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) { std::string str = "controller" + std::to_string(i); - Controller<> *controller = new Controller<>(str.c_str()); + Controller<> *controller = new Controller<>(str.c_str(), tlmRecorders[i]); controllers.push_back(controller); str = "dram" + std::to_string(i); Dram<> *dram = new Dram<>(str.c_str()); + dram->setTlmRecorder(tlmRecorders[i]); drams.push_back(dram); } } @@ -153,6 +164,10 @@ Simulation::~Simulation() for (auto dram : drams) { delete dram; } + + for (auto rec : tlmRecorders) { + delete rec; + } } void Simulation::start() @@ -189,7 +204,9 @@ void Simulation::stop() controller->terminateSimulation(); } wait(sc_time(200, SC_NS)); - TlmRecorder::getInstance().closeConnection(); + for (auto rec : tlmRecorders) { + rec->closeConnection(); + } sc_stop(); double elapsed_secs = double(clock() - simulationStartTime) / CLOCKS_PER_SEC; diff --git a/DRAMSys/dramSys/src/simulation/Simulation.h b/DRAMSys/dramSys/src/simulation/Simulation.h index 09b14ad5..d8621434 100644 --- a/DRAMSys/dramSys/src/simulation/Simulation.h +++ b/DRAMSys/dramSys/src/simulation/Simulation.h @@ -104,13 +104,16 @@ private: ReorderBuffer<> *reorder; // DRAM units std::vector*> drams; + // Transaction Recorders (one per channel). They generate the output databases. + std::vector tlmRecorders; clock_t simulationStartTime; void report(std::string message); - void setupDebugManager(const string& traceName); - void setupTlmRecorder(const string &traceName, const string &pathToResources, const std::vector &devices); + void setupTlmRecorders(const string &traceName, const string &pathToResources, const std::vector &devices); void instantiateModules(const string &pathToResources, const std::vector &devices); void bindSockets(); + void setupDebugManager(const string& traceName); }; #endif /* SIMULATIONMANAGER_H_ */ + diff --git a/DRAMSys/dramSys/src/simulation/SimulationManager.cpp b/DRAMSys/dramSys/src/simulation/SimulationManager.cpp index 5e971c19..9f78d6c2 100644 --- a/DRAMSys/dramSys/src/simulation/SimulationManager.cpp +++ b/DRAMSys/dramSys/src/simulation/SimulationManager.cpp @@ -87,7 +87,7 @@ void SimulationManager::runSimulations() { for (auto& traceSetup : batch.traceSetups) { - string exportname = exportPath + "/" + traceSetup.first + ".tdb"; + string exportname = exportPath + "/" + traceSetup.first; runSimulation(exportname, dramSetup, traceSetup.second); } } diff --git a/DRAMSys/dramSys/src/simulation/TracePlayer.h b/DRAMSys/dramSys/src/simulation/TracePlayer.h index e2abc1a5..94eb99fd 100644 --- a/DRAMSys/dramSys/src/simulation/TracePlayer.h +++ b/DRAMSys/dramSys/src/simulation/TracePlayer.h @@ -48,7 +48,6 @@ #include "../controller/core/configuration/Configuration.h" #include "../common/DebugManager.h" #include "../common/xmlAddressdecoder.h" -#include "../common/TlmRecorder.h" #include "../common/dramExtension.h" #include "../controller/core/TimingCalculation.h" #include "TracePlayerListener.h" @@ -81,8 +80,6 @@ private: TracePlayerListener* listener; }; - - template TracePlayer::TracePlayer(TracePlayerListener* listener) : payloadEventQueue(this, &TracePlayer::peqCallback), transactionsSent(0), listener(listener) @@ -90,7 +87,6 @@ TracePlayer::TracePlayer(TracePlayerListener* listener) : iSocket.register_nb_transport_bw(this, &TracePlayer::nb_transport_bw); } - template gp *TracePlayer::allocatePayload() { diff --git a/README.md b/README.md index 766fac13..05bd734f 100644 --- a/README.md +++ b/README.md @@ -322,9 +322,10 @@ Below are listed the configuration sections and configuration fields. - **Trace setups** - *id* (string) - - Trace setup id. Two files are generated by DRAMSys: an SQLite database - file (.tdb) and a text file (.txt) containing the program output. The - name of these files comes from this field. + - Trace setup id. Two kinds of output files are generated by DRAMSys: + SQLite databases containing transactions related to each memory channel + (.tdb) and a text file (.txt) with the program output. The base name for + these files comes from this field. - *clkMhz* (unsigned int) - Speed of the trace player - *bl* (unsigned int) From edc78e05dd2dcdb6bcdad12d370b672ba83318b3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=89der=20Ferreira=20Zulian?= Date: Thu, 25 Jun 2015 14:07:59 +0200 Subject: [PATCH 2/4] Oops, I forgot to commit this. --- DRAMSys/dramSys/src/simulation/Simulation.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DRAMSys/dramSys/src/simulation/Simulation.h b/DRAMSys/dramSys/src/simulation/Simulation.h index d8621434..d6c24451 100644 --- a/DRAMSys/dramSys/src/simulation/Simulation.h +++ b/DRAMSys/dramSys/src/simulation/Simulation.h @@ -110,7 +110,7 @@ private: clock_t simulationStartTime; void report(std::string message); void setupTlmRecorders(const string &traceName, const string &pathToResources, const std::vector &devices); - void instantiateModules(const string &pathToResources, const std::vector &devices); + void instantiateModules(const string &traceName, const string &pathToResources, const std::vector &devices); void bindSockets(); void setupDebugManager(const string& traceName); }; From c207eef02c65a10f9b060a939df1c6d1718bd2c7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=89der=20Ferreira=20Zulian?= Date: Thu, 25 Jun 2015 15:03:14 +0200 Subject: [PATCH 3/4] Authors list updated --- DRAMSys/dramSys/src/common/TlmRecorder.cpp | 1 + DRAMSys/dramSys/src/common/TlmRecorder.h | 1 + DRAMSys/dramSys/src/controller/Controller.h | 1 + 3 files changed, 3 insertions(+) diff --git a/DRAMSys/dramSys/src/common/TlmRecorder.cpp b/DRAMSys/dramSys/src/common/TlmRecorder.cpp index eef96c8c..c254fc78 100644 --- a/DRAMSys/dramSys/src/common/TlmRecorder.cpp +++ b/DRAMSys/dramSys/src/common/TlmRecorder.cpp @@ -33,6 +33,7 @@ * Janik Schlemminger * Robert Gernhardt * Matthias Jung + * Eder F. Zulian */ #include diff --git a/DRAMSys/dramSys/src/common/TlmRecorder.h b/DRAMSys/dramSys/src/common/TlmRecorder.h index 5b9cfa0c..c20c90e6 100644 --- a/DRAMSys/dramSys/src/common/TlmRecorder.h +++ b/DRAMSys/dramSys/src/common/TlmRecorder.h @@ -33,6 +33,7 @@ * Janik Schlemminger * Robert Gernhardt * Matthias Jung + * Eder F. Zulian */ #ifndef TLMPHASERECORDER_H diff --git a/DRAMSys/dramSys/src/controller/Controller.h b/DRAMSys/dramSys/src/controller/Controller.h index b43b8b20..31bb622d 100644 --- a/DRAMSys/dramSys/src/controller/Controller.h +++ b/DRAMSys/dramSys/src/controller/Controller.h @@ -32,6 +32,7 @@ * Authors: * Robert Gernhardt * Matthias Jung + * Eder F. Zulian */ #ifndef CONTROLLERWRAPPER_H_ From 8764850e9853f95e8ab0690302e1949f632c453d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=89der=20Ferreira=20Zulian?= Date: Sat, 27 Jun 2015 15:34:19 +0200 Subject: [PATCH 4/4] Using proper configuration when creating TLMRecorder instances. Fix after code review. --- DRAMSys/dramSys/src/simulation/Simulation.cpp | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/DRAMSys/dramSys/src/simulation/Simulation.cpp b/DRAMSys/dramSys/src/simulation/Simulation.cpp index 6b800324..dc2e1ab5 100644 --- a/DRAMSys/dramSys/src/simulation/Simulation.cpp +++ b/DRAMSys/dramSys/src/simulation/Simulation.cpp @@ -85,7 +85,7 @@ void Simulation::setupTlmRecorders(const string &traceName, const string &pathTo for (size_t i = 0; i < Configuration::getInstance().NumberOfMemChannels; i++) { std::string sqlScriptURI = pathToResources + string("scripts/createTraceDB.sql"); std::string dbName = traceName + string("_channel") + std::to_string(i) + ".tdb"; - TlmRecorder *tlmRecorder = new TlmRecorder(sqlScriptURI.c_str(), dbName.c_str(), true); + TlmRecorder *tlmRecorder = new TlmRecorder(sqlScriptURI.c_str(), dbName.c_str(), Configuration::getInstance().DatabaseRecording); tlmRecorder->recordMemconfig(Configuration::getInstance().memconfigUri); tlmRecorder->recordMemspec(Configuration::getInstance().memspecUri); @@ -101,14 +101,6 @@ void Simulation::setupTlmRecorders(const string &traceName, const string &pathTo } tlmRecorder->recordTracenames(traceNames); } - - // Enable all TLM Recorders. TODO: maybe individually? - for (auto rec : tlmRecorders) { - if (Configuration::getInstance().DatabaseRecording == true) - rec->recordingEnabled = true; - else - rec->recordingEnabled = false; - } } void Simulation::instantiateModules(const string &traceName, const string &pathToResources, const std::vector &devices)