diff --git a/DRAMSys/library/resources/configs/memspecs/memspec_ranktest.xml b/DRAMSys/library/resources/configs/memspecs/memspec_ranktest.xml index 45606d2b..cd5852ec 100644 --- a/DRAMSys/library/resources/configs/memspecs/memspec_ranktest.xml +++ b/DRAMSys/library/resources/configs/memspecs/memspec_ranktest.xml @@ -5,7 +5,7 @@ - + diff --git a/DRAMSys/library/src/common/XmlAddressDecoder.cpp b/DRAMSys/library/src/common/XmlAddressDecoder.cpp index 65795e97..1c819b57 100644 --- a/DRAMSys/library/src/common/XmlAddressDecoder.cpp +++ b/DRAMSys/library/src/common/XmlAddressDecoder.cpp @@ -82,7 +82,9 @@ DecodedAddress XmlAddressDecoder::decodeAddress(sc_dt::uint64 addr) result.channel = (addr & masks["channel"]) >> shifts["channel"]; result.rank = (addr & masks["rank"]) >> shifts["rank"]; //result.bankgroup = (addr & masks["bankgroup"]) >> shifts["bankgroup"]; - result.bank = (addr & masks["bank"]) >> shifts["bank"]; + unsigned banksPerRank = Configuration::getInstance().memSpec->NumberOfBanks + / Configuration::getInstance().memSpec->NumberOfRanks; + result.bank = ((addr & masks["bank"]) >> shifts["bank"]) + result.rank * banksPerRank; unsigned banksPerGroup = Configuration::getInstance().memSpec->NumberOfBanks / Configuration::getInstance().memSpec->NumberOfBankGroups; result.bankgroup = result.bank / banksPerGroup; diff --git a/DRAMSys/library/src/controller/BankMachine.cpp b/DRAMSys/library/src/controller/BankMachine.cpp index 7765ff9d..836edb97 100644 --- a/DRAMSys/library/src/controller/BankMachine.cpp +++ b/DRAMSys/library/src/controller/BankMachine.cpp @@ -34,9 +34,15 @@ #include "BankMachine.h" -BankMachine::BankMachine(SchedulerIF *scheduler, CheckerIF *checker, - Rank rank, BankGroup bankgroup, Bank bank) - : scheduler(scheduler), checker(checker), rank(rank), bankgroup(bankgroup), bank(bank) {} +BankMachine::BankMachine(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) + : scheduler(scheduler), checker(checker), bank(bank) +{ + MemSpec *memSpec = Configuration::getInstance().memSpec; + unsigned banksPerRank = memSpec->NumberOfBanks / memSpec->NumberOfRanks; + unsigned banksPerGroup = memSpec->NumberOfBanks / memSpec->NumberOfBankGroups; + rank = Rank(bank.ID() / banksPerRank); + bankgroup = BankGroup(bank.ID() / banksPerGroup); +} std::pair BankMachine::getNextCommand() { @@ -97,9 +103,8 @@ BmState BankMachine::getState() return currentState; } -BankMachineOpen::BankMachineOpen(SchedulerIF *scheduler, CheckerIF *checker, - Rank rank, BankGroup bankgroup, Bank bank) - : BankMachine(scheduler, checker, rank, bankgroup, bank) {} +BankMachineOpen::BankMachineOpen(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) + : BankMachine(scheduler, checker, bank) {} sc_time BankMachineOpen::startBankMachine() { @@ -113,7 +118,7 @@ sc_time BankMachineOpen::startBankMachine() DramExtension extension = DramExtension::getExtension(currentPayload); if (currentState == BmState::Precharged) // row miss { - delay = checker->delayToSatisfyConstraints(Command::ACT, bank); + delay = checker->delayToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; nextRow = extension.getRow(); } @@ -123,12 +128,12 @@ sc_time BankMachineOpen::startBankMachine() { if (currentPayload->get_command() == TLM_READ_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::RD, bank); + delay = checker->delayToSatisfyConstraints(Command::RD, rank, bankgroup, bank); nextCommand = Command::RD; } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::WR, bank); + delay = checker->delayToSatisfyConstraints(Command::WR, rank, bankgroup, bank); nextCommand = Command::WR; } else @@ -136,7 +141,7 @@ sc_time BankMachineOpen::startBankMachine() } else // row miss { - delay = checker->delayToSatisfyConstraints(Command::PRE, bank); + delay = checker->delayToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; nextRow = extension.getRow(); } @@ -145,9 +150,8 @@ sc_time BankMachineOpen::startBankMachine() return delay; } -BankMachineClosed::BankMachineClosed(SchedulerIF *scheduler, CheckerIF *checker, - Rank rank, BankGroup bankgroup, Bank bank) - : BankMachine(scheduler, checker, rank, bankgroup, bank) {} +BankMachineClosed::BankMachineClosed(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) + : BankMachine(scheduler, checker, bank) {} sc_time BankMachineClosed::startBankMachine() { @@ -161,7 +165,7 @@ sc_time BankMachineClosed::startBankMachine() DramExtension extension = DramExtension::getExtension(currentPayload); if (currentState == BmState::Precharged) // row miss { - delay = checker->delayToSatisfyConstraints(Command::ACT, bank); + delay = checker->delayToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; nextRow = extension.getRow(); } @@ -171,12 +175,12 @@ sc_time BankMachineClosed::startBankMachine() { if (currentPayload->get_command() == TLM_READ_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::RDA, bank); + delay = checker->delayToSatisfyConstraints(Command::RDA, rank, bankgroup, bank); nextCommand = Command::RDA; } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::WRA, bank); + delay = checker->delayToSatisfyConstraints(Command::WRA, rank, bankgroup, bank); nextCommand = Command::WRA; } else @@ -184,7 +188,7 @@ sc_time BankMachineClosed::startBankMachine() } else // row miss { - delay = checker->delayToSatisfyConstraints(Command::PRE, bank); + delay = checker->delayToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; nextRow = extension.getRow(); } @@ -193,9 +197,8 @@ sc_time BankMachineClosed::startBankMachine() return delay; } -BankMachineOpenAdaptive::BankMachineOpenAdaptive(SchedulerIF *scheduler, CheckerIF *checker, - Rank rank, BankGroup bankgroup, Bank bank) - : BankMachine(scheduler, checker, rank, bankgroup, bank) {} +BankMachineOpenAdaptive::BankMachineOpenAdaptive(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) + : BankMachine(scheduler, checker, bank) {} sc_time BankMachineOpenAdaptive::startBankMachine() { @@ -209,7 +212,7 @@ sc_time BankMachineOpenAdaptive::startBankMachine() DramExtension extension = DramExtension::getExtension(currentPayload); if (currentState == BmState::Precharged) // row miss { - delay = checker->delayToSatisfyConstraints(Command::ACT, bank); + delay = checker->delayToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; nextRow = extension.getRow(); } @@ -221,12 +224,12 @@ sc_time BankMachineOpenAdaptive::startBankMachine() { if (currentPayload->get_command() == TLM_READ_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::RDA, bank); + delay = checker->delayToSatisfyConstraints(Command::RDA, rank, bankgroup, bank); nextCommand = Command::RDA; } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::WRA, bank); + delay = checker->delayToSatisfyConstraints(Command::WRA, rank, bankgroup, bank); nextCommand = Command::WRA; } else @@ -236,12 +239,12 @@ sc_time BankMachineOpenAdaptive::startBankMachine() { if (currentPayload->get_command() == TLM_READ_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::RD, bank); + delay = checker->delayToSatisfyConstraints(Command::RD, rank, bankgroup, bank); nextCommand = Command::RD; } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::WR, bank); + delay = checker->delayToSatisfyConstraints(Command::WR, rank, bankgroup, bank); nextCommand = Command::WR; } else @@ -250,7 +253,7 @@ sc_time BankMachineOpenAdaptive::startBankMachine() } else // row miss { - delay = checker->delayToSatisfyConstraints(Command::PRE, bank); + delay = checker->delayToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; nextRow = extension.getRow(); } @@ -259,9 +262,8 @@ sc_time BankMachineOpenAdaptive::startBankMachine() return delay; } -BankMachineClosedAdaptive::BankMachineClosedAdaptive(SchedulerIF *scheduler, CheckerIF *checker, - Rank rank, BankGroup bankgroup, Bank bank) - : BankMachine(scheduler, checker, rank, bankgroup, bank) {} +BankMachineClosedAdaptive::BankMachineClosedAdaptive(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) + : BankMachine(scheduler, checker, bank) {} sc_time BankMachineClosedAdaptive::startBankMachine() { @@ -275,7 +277,7 @@ sc_time BankMachineClosedAdaptive::startBankMachine() DramExtension extension = DramExtension::getExtension(currentPayload); if (currentState == BmState::Precharged) // row miss { - delay = checker->delayToSatisfyConstraints(Command::ACT, bank); + delay = checker->delayToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; nextRow = extension.getRow(); } @@ -287,12 +289,12 @@ sc_time BankMachineClosedAdaptive::startBankMachine() { if (currentPayload->get_command() == TLM_READ_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::RD, bank); + delay = checker->delayToSatisfyConstraints(Command::RD, rank, bankgroup, bank); nextCommand = Command::RD; } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::WR, bank); + delay = checker->delayToSatisfyConstraints(Command::WR, rank, bankgroup, bank); nextCommand = Command::WR; } else @@ -302,12 +304,12 @@ sc_time BankMachineClosedAdaptive::startBankMachine() { if (currentPayload->get_command() == TLM_READ_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::RDA, bank); + delay = checker->delayToSatisfyConstraints(Command::RDA, rank, bankgroup, bank); nextCommand = Command::RDA; } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) { - delay = checker->delayToSatisfyConstraints(Command::WRA, bank); + delay = checker->delayToSatisfyConstraints(Command::WRA, rank, bankgroup, bank); nextCommand = Command::WRA; } else @@ -316,7 +318,7 @@ sc_time BankMachineClosedAdaptive::startBankMachine() } else // row miss TODO: remove this, can never happen { - delay = checker->delayToSatisfyConstraints(Command::PRE, bank); + delay = checker->delayToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; nextRow = extension.getRow(); SC_REPORT_FATAL("BankMachine", "Should never be reached for this policy"); diff --git a/DRAMSys/library/src/controller/BankMachine.h b/DRAMSys/library/src/controller/BankMachine.h index 910afe6b..af4ac52d 100644 --- a/DRAMSys/library/src/controller/BankMachine.h +++ b/DRAMSys/library/src/controller/BankMachine.h @@ -70,7 +70,7 @@ public: BmState getState(); protected: - BankMachine(SchedulerIF *, CheckerIF *, Rank, BankGroup, Bank); + BankMachine(SchedulerIF *, CheckerIF *, Bank); tlm_generic_payload *currentPayload = nullptr; SchedulerIF *scheduler; CheckerIF *checker; @@ -79,36 +79,36 @@ protected: BmState currentState = BmState::Precharged; Row currentRow; sc_time timeToSchedule = SC_ZERO_TIME; - Rank rank; - BankGroup bankgroup; + Rank rank = Rank(0); + BankGroup bankgroup = BankGroup(0); Bank bank; }; class BankMachineOpen final : public BankMachine { public: - BankMachineOpen(SchedulerIF *, CheckerIF *, Rank, BankGroup, Bank); + BankMachineOpen(SchedulerIF *, CheckerIF *, Bank); sc_time startBankMachine(); }; class BankMachineClosed final : public BankMachine { public: - BankMachineClosed(SchedulerIF *, CheckerIF *, Rank, BankGroup, Bank); + BankMachineClosed(SchedulerIF *, CheckerIF *, Bank); sc_time startBankMachine(); }; class BankMachineOpenAdaptive final : public BankMachine { public: - BankMachineOpenAdaptive(SchedulerIF *, CheckerIF *, Rank, BankGroup, Bank); + BankMachineOpenAdaptive(SchedulerIF *, CheckerIF *, Bank); sc_time startBankMachine(); }; class BankMachineClosedAdaptive final : public BankMachine { public: - BankMachineClosedAdaptive(SchedulerIF *, CheckerIF *, Rank, BankGroup, Bank); + BankMachineClosedAdaptive(SchedulerIF *, CheckerIF *, Bank); sc_time startBankMachine(); }; diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index 99be6756..8c98beb5 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -96,14 +96,12 @@ Controller::Controller(sc_module_name name) : if (config.AdaptivePagePolicy) { for (unsigned bankID = 0; bankID < config.memSpec->NumberOfBanks; bankID++) - bankMachines.push_back(new BankMachineOpenAdaptive - (scheduler, checker, Rank(0), BankGroup(0), Bank(bankID))); + bankMachines.push_back(new BankMachineOpenAdaptive(scheduler, checker, Bank(bankID))); } else { for (unsigned bankID = 0; bankID < config.memSpec->NumberOfBanks; bankID++) - bankMachines.push_back(new BankMachineOpen - (scheduler, checker, Rank(0), BankGroup(0), Bank(bankID))); + bankMachines.push_back(new BankMachineOpen(scheduler, checker, Bank(bankID))); } } else @@ -111,14 +109,12 @@ Controller::Controller(sc_module_name name) : if (config.AdaptivePagePolicy) { for (unsigned bankID = 0; bankID < config.memSpec->NumberOfBanks; bankID++) - bankMachines.push_back(new BankMachineClosedAdaptive - (scheduler, checker, Rank(0), BankGroup(0), Bank(bankID))); + bankMachines.push_back(new BankMachineClosedAdaptive(scheduler, checker, Bank(bankID))); } else { for (unsigned bankID = 0; bankID < config.memSpec->NumberOfBanks; bankID++) - bankMachines.push_back(new BankMachineClosed - (scheduler, checker, Rank(0), BankGroup(0), Bank(bankID))); + bankMachines.push_back(new BankMachineClosed(scheduler, checker, Bank(bankID))); } } diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp b/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp index 2e183798..3e176fa8 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp @@ -50,7 +50,11 @@ CheckerDDR3::CheckerDDR3() lastScheduledByCommandAndBank = std::vector> (numberOfCommands(), std::vector(memSpec->NumberOfBanks)); + lastScheduledByCommandAndRank = std::vector> + (numberOfCommands(), std::vector(memSpec->NumberOfRanks)); lastScheduledByCommand = std::vector(numberOfCommands()); + + lastActivates = std::vector>(memSpec->NumberOfRanks); } CheckerDDR3::~CheckerDDR3() @@ -58,7 +62,7 @@ CheckerDDR3::~CheckerDDR3() delete refreshChecker; } -sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Bank bank) +sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) { ScheduledCommand lastCommand; @@ -82,11 +86,11 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Bank bank) if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRC); - lastCommand = lastScheduledByCommand[Command::ACT]; + lastCommand = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRRD); - lastCommand = lastScheduledByCommand[Command::REFA]; + lastCommand = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRFC); @@ -94,7 +98,8 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Bank bank) if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRFC); - delayToSatisfyFAW(earliestTimeToStart); + if (lastActivates[rank.ID()].size() >= 4) + earliestTimeToStart = std::max(earliestTimeToStart, lastActivates[rank.ID()].front() + memSpec->tFAW); refreshChecker->delayToSatisfyACT(bank, earliestTimeToStart); } @@ -170,33 +175,25 @@ sc_time CheckerDDR3::delayToSatisfyConstraints(Command command, Bank bank) return (earliestTimeToStart - sc_time_stamp()); } -void CheckerDDR3::delayToSatisfyFAW(sc_time &earliestTimeToStart) -{ - if (lastActivates.size() >= 4) - { - sc_time earliestTime = lastActivates.front() + memSpec->tFAW; - if (earliestTime > earliestTimeToStart) - earliestTimeToStart = earliestTime; - } -} - void CheckerDDR3::insert(const ScheduledCommand &scheduledCommand) { Command command = scheduledCommand.getCommand(); + Rank rank = scheduledCommand.getRank(); Bank bank = scheduledCommand.getBank(); PRINTDEBUGMESSAGE("CheckerDDR3", "Changing state on bank " + to_string(scheduledCommand.getBank().ID()) + " command is " + commandToString(command)); lastScheduledByCommandAndBank[command][bank.ID()] = scheduledCommand; + lastScheduledByCommandAndRank[command][rank.ID()] = scheduledCommand; lastScheduledByCommand[command] = scheduledCommand; lastScheduled = scheduledCommand; if (command == Command::ACT) { - if (lastActivates.size() == 4) - lastActivates.pop(); - lastActivates.push(scheduledCommand.getStart()); + if (lastActivates[rank.ID()].size() == 4) + lastActivates[rank.ID()].pop(); + lastActivates[rank.ID()].push(scheduledCommand.getStart()); } else if (command == Command::REFA || command == Command::REFB) refreshChecker->insert(bank); diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR3.h b/DRAMSys/library/src/controller/checker/CheckerDDR3.h index 9082ea17..039856d6 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR3.h +++ b/DRAMSys/library/src/controller/checker/CheckerDDR3.h @@ -48,15 +48,14 @@ class CheckerDDR3 final : public CheckerIF public: CheckerDDR3(); ~CheckerDDR3(); - sc_time delayToSatisfyConstraints(Command, Bank); + sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank); void insert(const ScheduledCommand &); private: const MemSpecDDR3 *memSpec; // Four activate window - std::queue lastActivates; - void delayToSatisfyFAW(sc_time &); + std::vector> lastActivates; RefreshCheckerDDR3Dummy *refreshChecker; diff --git a/DRAMSys/library/src/controller/checker/CheckerIF.h b/DRAMSys/library/src/controller/checker/CheckerIF.h index c1586373..814102d3 100644 --- a/DRAMSys/library/src/controller/checker/CheckerIF.h +++ b/DRAMSys/library/src/controller/checker/CheckerIF.h @@ -47,11 +47,12 @@ class CheckerIF public: virtual ~CheckerIF() {} - virtual sc_time delayToSatisfyConstraints(Command, Bank) = 0; + virtual sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank) = 0; virtual void insert(const ScheduledCommand &) = 0; protected: std::vector> lastScheduledByCommandAndBank; + std::vector> lastScheduledByCommandAndRank; std::vector lastScheduledByCommand; ScheduledCommand lastScheduled; diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp b/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp index 6cc5dc8f..56331271 100644 --- a/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp @@ -50,7 +50,11 @@ CheckerWideIO::CheckerWideIO() lastScheduledByCommandAndBank = std::vector> (numberOfCommands(), std::vector(memSpec->NumberOfBanks)); + lastScheduledByCommandAndRank = std::vector> + (numberOfCommands(), std::vector(memSpec->NumberOfRanks)); lastScheduledByCommand = std::vector(numberOfCommands()); + + lastActivates = std::vector>(memSpec->NumberOfRanks); } CheckerWideIO::~CheckerWideIO() @@ -58,7 +62,7 @@ CheckerWideIO::~CheckerWideIO() delete refreshChecker; } -sc_time CheckerWideIO::delayToSatisfyConstraints(Command command, Bank bank) +sc_time CheckerWideIO::delayToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) { ScheduledCommand lastCommand; @@ -82,11 +86,11 @@ sc_time CheckerWideIO::delayToSatisfyConstraints(Command command, Bank bank) if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRC); - lastCommand = lastScheduledByCommand[Command::ACT]; + lastCommand = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRRD); - lastCommand = lastScheduledByCommand[Command::REFA]; + lastCommand = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRFC); @@ -94,7 +98,8 @@ sc_time CheckerWideIO::delayToSatisfyConstraints(Command command, Bank bank) if (lastCommand.isValidCommand()) earliestTimeToStart = std::max(earliestTimeToStart, lastCommand.getStart() + memSpec->tRFC); - delayToSatisfyTAW(earliestTimeToStart); + if (lastActivates[rank.ID()].size() >= 2) + earliestTimeToStart = std::max(earliestTimeToStart, lastActivates[rank.ID()].front() + memSpec->tTAW); refreshChecker->delayToSatisfyACT(bank, earliestTimeToStart); } @@ -154,33 +159,25 @@ sc_time CheckerWideIO::delayToSatisfyConstraints(Command command, Bank bank) return (earliestTimeToStart - sc_time_stamp()); } -void CheckerWideIO::delayToSatisfyTAW(sc_time &earliestTimeToStart) -{ - if (lastActivates.size() >= 2) - { - sc_time earliestTime = lastActivates.front() + memSpec->tTAW; - if (earliestTime > earliestTimeToStart) - earliestTimeToStart = earliestTime; - } -} - void CheckerWideIO::insert(const ScheduledCommand &scheduledCommand) { Command command = scheduledCommand.getCommand(); + Rank rank = scheduledCommand.getRank(); Bank bank = scheduledCommand.getBank(); PRINTDEBUGMESSAGE("CheckerWideIO", "Changing state on bank " + to_string(scheduledCommand.getBank().ID()) + " command is " + commandToString(command)); lastScheduledByCommandAndBank[command][bank.ID()] = scheduledCommand; + lastScheduledByCommandAndRank[command][rank.ID()] = scheduledCommand; lastScheduledByCommand[command] = scheduledCommand; lastScheduled = scheduledCommand; if (command == Command::ACT) { - if (lastActivates.size() == 2) - lastActivates.pop(); - lastActivates.push(scheduledCommand.getStart()); + if (lastActivates[rank.ID()].size() == 2) + lastActivates[rank.ID()].pop(); + lastActivates[rank.ID()].push(scheduledCommand.getStart()); } else if (command == Command::REFA || command == Command::REFB) refreshChecker->insert(bank); diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO.h b/DRAMSys/library/src/controller/checker/CheckerWideIO.h index 29950347..b8f8c460 100644 --- a/DRAMSys/library/src/controller/checker/CheckerWideIO.h +++ b/DRAMSys/library/src/controller/checker/CheckerWideIO.h @@ -48,15 +48,14 @@ class CheckerWideIO final : public CheckerIF public: CheckerWideIO(); ~CheckerWideIO(); - sc_time delayToSatisfyConstraints(Command, Bank); + sc_time delayToSatisfyConstraints(Command, Rank, BankGroup, Bank); void insert(const ScheduledCommand &); private: const MemSpecWideIO *memSpec; // Four activate window - std::queue lastActivates; - void delayToSatisfyTAW(sc_time &); + std::vector> lastActivates; RefreshCheckerWideIODummy *refreshChecker; diff --git a/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.cpp b/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.cpp index 6933c521..bdfebd0e 100644 --- a/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.cpp +++ b/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.cpp @@ -90,6 +90,11 @@ sc_time ScheduledCommand::getExecutionTime() const return executionTime; } +Rank ScheduledCommand::getRank() const +{ + return extension.getRank(); +} + Bank ScheduledCommand::getBank() const { return extension.getBank(); diff --git a/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.h b/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.h index cca521a2..9dde8bfb 100644 --- a/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.h +++ b/DRAMSys/library/src/controller/core/scheduling/ScheduledCommand.h @@ -72,6 +72,7 @@ public: Command getCommand() const; sc_time getExecutionTime() const; + Rank getRank() const; Bank getBank() const; BankGroup getBankGroup() const; Row getRow() const; diff --git a/DRAMSys/library/src/simulation/Arbiter.cpp b/DRAMSys/library/src/simulation/Arbiter.cpp index 0752e07c..45554403 100644 --- a/DRAMSys/library/src/simulation/Arbiter.cpp +++ b/DRAMSys/library/src/simulation/Arbiter.cpp @@ -229,17 +229,19 @@ void Arbiter::appendDramExtension(int socketId, tlm_generic_payload &payload) bool Arbiter::addressIsValid(DecodedAddress &decodedAddress) { + // TODO: correct this function if (decodedAddress.channel >= AddressDecoder::getInstance().amount["channel"]) { return false; } - if (decodedAddress.bank >= AddressDecoder::getInstance().amount["bank"]) { - return false; - } - // TODO: this test case should be corrected! - /*if (decodedAddress.bankgroup >= AddressDecoder::getInstance().amount["bankgroup"]) { - std::cout << decodedAddress.bankgroup << " " << AddressDecoder::getInstance().amount["bankgroup"] << std::endl; - return false; - }*/ +// if (decodedAddress.rank >= AddressDecoder::getInstance().amount["rank"]) { +// return false; +// } +// if (decodedAddress.bank >= AddressDecoder::getInstance().amount["bank"]) { +// return false; +// } +// if (decodedAddress.bankgroup >= AddressDecoder::getInstance().amount["bankgroup"]) { +// return false; +// } if (decodedAddress.column >= AddressDecoder::getInstance().amount["column"]) { return false; }