From 6e71e435c5e76422381f6f7d12d57d9eec9547bf Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Wed, 2 Oct 2019 21:55:19 +0200 Subject: [PATCH] Implemented first version of new bankwise refresh. --- .../src/controller/refresh/RefreshManager.cpp | 2 +- .../src/controller/refresh/RefreshManager.h | 2 +- .../refresh/RefreshManagerBankwise.cpp | 81 +++++++++---------- .../refresh/RefreshManagerBankwise.h | 8 +- DRAMSys/library/src/simulation/Dram.cpp | 2 +- 5 files changed, 47 insertions(+), 48 deletions(-) diff --git a/DRAMSys/library/src/controller/refresh/RefreshManager.cpp b/DRAMSys/library/src/controller/refresh/RefreshManager.cpp index 8f64f59c..5c17059f 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManager.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManager.cpp @@ -41,8 +41,8 @@ RefreshManager::RefreshManager(std::vector &bankMachines, Rank ra : bankMachines(bankMachines), rank(rank), checker(checker) { memSpec = Configuration::getInstance().memSpec; + timeForNextTrigger = memSpec->getRefreshIntervalAB(); setUpDummy(refreshPayload, rank); - timeForNextTrigger = memSpec->getRefreshIntervalAB() - memSpec->getExecutionTime(Command::PREA); } std::pair RefreshManager::getNextCommand() diff --git a/DRAMSys/library/src/controller/refresh/RefreshManager.h b/DRAMSys/library/src/controller/refresh/RefreshManager.h index c3a73988..50748fa9 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManager.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManager.h @@ -58,8 +58,8 @@ private: tlm_generic_payload refreshPayload; sc_time timeForNextTrigger; sc_time timeToSchedule = SC_ZERO_TIME; - CheckerIF *checker; Rank rank; + CheckerIF *checker; Command nextCommand; }; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index b6c5ed73..2e4509fd 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -37,61 +37,58 @@ #include "../../common/utils.h" #include "../../common/dramExtensions.h" -RefreshManagerBankwise::RefreshManagerBankwise(std::vector &bankMachines, Rank, CheckerIF *checker) - : bankMachines(bankMachines), checker(checker) +RefreshManagerBankwise::RefreshManagerBankwise(std::vector &bankMachines, Rank rank, CheckerIF *checker) + : bankMachines(bankMachines), rank(rank), checker(checker) { - memSpec = Configuration::getInstance().memSpec; - // TODO: implement for multiple ranks - sc_time currentREFB = memSpec->getRefreshIntervalPB() - memSpec->clk * (memSpec->NumberOfBanks - 1); - sc_time currentPRE = currentREFB - std::max(memSpec->clk * memSpec->NumberOfBanks, memSpec->getExecutionTime(Command::PRE)); - timeForNextTrigger = currentPRE; + memSpec = Configuration::getInstance().memSpec; + timeForNextTrigger = memSpec->getRefreshIntervalPB(); - refreshPayloads = std::vector(memSpec->NumberOfBanks); - states = std::vector(memSpec->NumberOfBanks, RmState::IDLE); - for (unsigned bankID = 0; bankID < memSpec->NumberOfBanks; bankID++) - { - setUpDummy(refreshPayloads[bankID], Rank(0), Bank(bankID)); - triggerTimes.insert(std::pair(currentREFB, Bank(bankID))); - triggerTimes.insert(std::pair(currentPRE, Bank(bankID))); - currentREFB += memSpec->clk; - currentPRE += memSpec->clk; - } + refreshPayloads = std::vector(memSpec->BanksPerRank); + //states = std::vector(memSpec->NumberOfBanks, RmState::IDLE); + for (unsigned bankID = 0; bankID < memSpec->BanksPerRank; bankID++) + setUpDummy(refreshPayloads[bankID], rank, bankMachines[bankID]->getBank()); } std::pair RefreshManagerBankwise::getNextCommand() { - if (sc_time_stamp() == timeForNextTrigger) - { - auto it = triggerTimes.begin(); - Bank bank = it->second; - triggerTimes.erase(it); - triggerTimes.insert(std::pair(timeForNextTrigger + memSpec->getRefreshIntervalPB(), bank)); - timeForNextTrigger = triggerTimes.begin()->first; - if (states[bank.ID()] == RmState::IDLE) - { - states[bank.ID()] = RmState::REFRESHING; - bool forcedPrecharge = true;/*= bankMachines[bank.ID()]->forcePrecharge();*/ - if (forcedPrecharge) - return std::pair(Command::PRE, &refreshPayloads[bank.ID()]); - else - return std::pair(Command::NOP, nullptr); - } - else - { - states[bank.ID()] = RmState::IDLE; - return std::pair(Command::REFB, &refreshPayloads[bank.ID()]); - } - } + if (sc_time_stamp() == timeToSchedule) + return std::pair(nextCommand, &refreshPayloads[nextBankID]); else return std::pair(Command::NOP, nullptr); } sc_time RefreshManagerBankwise::startRefreshManager() { - return timeForNextTrigger - sc_time_stamp(); + if (sc_time_stamp() >= timeForNextTrigger) + { + sc_time delay; + bankMachines[nextBankID]->block(); + if (bankMachines[nextBankID]->getState() == BmState::Activated) + { + delay = checker->delayToSatisfyConstraints(Command::PRE, rank, BankGroup(0), + bankMachines[nextBankID]->getBank()); + nextCommand = Command::PRE; + } + else + { + delay = checker->delayToSatisfyConstraints(Command::REFB, rank, BankGroup(0), + bankMachines[nextBankID]->getBank()); + nextCommand = Command::REFB; + } + timeToSchedule = sc_time_stamp() + delay; + return delay; + } + else + return timeForNextTrigger - sc_time_stamp(); } -void RefreshManagerBankwise::updateState(Command, tlm_generic_payload *) +void RefreshManagerBankwise::updateState(Command command, tlm_generic_payload *) { - + if (command == Command::REFB) + { + //state = RmState::IDLE; + nextBankID = (nextBankID + 1) % memSpec->BanksPerRank; + timeForNextTrigger += memSpec->getRefreshIntervalPB(); + } + //else if (command == Command::PRE) do nothing? } diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h index 4e49dddf..158246cc 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h @@ -52,14 +52,16 @@ public: void updateState(Command, tlm_generic_payload *); private: + enum class RmState {IDLE, PRECHARGED} state = RmState::IDLE; const MemSpec *memSpec; std::vector bankMachines; std::vector refreshPayloads; - std::map triggerTimes; sc_time timeForNextTrigger; - enum class RmState {IDLE, REFRESHING}; - std::vector states; + sc_time timeToSchedule = SC_ZERO_TIME; + Rank rank; CheckerIF *checker; + Command nextCommand; + unsigned nextBankID = 0; }; #endif // REFRESHMANAGERBANKWISE_H diff --git a/DRAMSys/library/src/simulation/Dram.cpp b/DRAMSys/library/src/simulation/Dram.cpp index 1475747e..bd498d10 100644 --- a/DRAMSys/library/src/simulation/Dram.cpp +++ b/DRAMSys/library/src/simulation/Dram.cpp @@ -195,7 +195,7 @@ tlm_sync_enum Dram::nb_transport_fw(tlm_generic_payload &payload, { DRAMPower->doCommand(MemCommand::REFB, bank, cycle); sendToController(payload, END_REFB, - delay + memSpec->getExecutionTime(Command::REFA)); + delay + memSpec->getExecutionTime(Command::REFB)); } // Powerdown phases have to be started and ended by the controller, because they do not have a fixed length else if (phase == BEGIN_PDNA)