From 65d148b7a7d3326c9a5c80f0677bfd8bb674c473 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Fri, 23 Oct 2020 12:07:30 +0200 Subject: [PATCH] Improved configuration process. --- .../src/configuration/Configuration.cpp | 139 +++++++++++++----- .../library/src/configuration/Configuration.h | 18 +-- .../src/configuration/memspec/MemSpec.cpp | 4 +- .../src/configuration/memspec/MemSpec.h | 36 ++--- .../src/configuration/memspec/MemSpecDDR3.cpp | 2 +- .../src/configuration/memspec/MemSpecDDR4.cpp | 2 +- .../configuration/memspec/MemSpecGDDR5.cpp | 2 +- .../configuration/memspec/MemSpecGDDR5X.cpp | 2 +- .../configuration/memspec/MemSpecGDDR6.cpp | 2 +- .../src/configuration/memspec/MemSpecHBM2.cpp | 2 +- .../configuration/memspec/MemSpecLPDDR4.cpp | 2 +- .../configuration/memspec/MemSpecWideIO.cpp | 2 +- .../configuration/memspec/MemSpecWideIO2.cpp | 6 +- DRAMSys/library/src/controller/Controller.cpp | 62 ++++---- .../controller/scheduler/SchedulerFifo.cpp | 6 +- .../controller/scheduler/SchedulerFrFcfs.cpp | 6 +- .../scheduler/SchedulerFrFcfsGrp.cpp | 6 +- DRAMSys/library/src/simulation/DRAMSys.cpp | 49 +++--- .../src/simulation/DRAMSysRecordable.cpp | 52 ++++--- DRAMSys/library/src/simulation/dram/Dram.cpp | 23 +-- DRAMSys/library/src/simulation/dram/Dram.h | 2 +- .../library/src/simulation/dram/DramDDR3.cpp | 4 +- .../library/src/simulation/dram/DramDDR4.cpp | 4 +- .../library/src/simulation/dram/DramGDDR5.cpp | 2 +- .../src/simulation/dram/DramGDDR5X.cpp | 2 +- .../library/src/simulation/dram/DramGDDR6.cpp | 2 +- .../library/src/simulation/dram/DramHBM2.cpp | 2 +- .../src/simulation/dram/DramLPDDR4.cpp | 2 +- .../src/simulation/dram/DramWideIO.cpp | 10 +- .../src/simulation/dram/DramWideIO2.cpp | 2 +- DRAMSys/simulator/MemoryManager.cpp | 2 +- DRAMSys/simulator/TracePlayer.cpp | 2 +- 32 files changed, 247 insertions(+), 212 deletions(-) diff --git a/DRAMSys/library/src/configuration/Configuration.cpp b/DRAMSys/library/src/configuration/Configuration.cpp index 144d2899..7e67a9f9 100644 --- a/DRAMSys/library/src/configuration/Configuration.cpp +++ b/DRAMSys/library/src/configuration/Configuration.cpp @@ -81,25 +81,86 @@ void Configuration::setParameter(std::string name, nlohmann::json value) { // MCConfig if (name == "PagePolicy") - pagePolicy = value; + { + if (value == "Open") + pagePolicy = PagePolicy::Open; + else if (value == "Closed") + pagePolicy = PagePolicy::Closed; + else if (value == "OpenAdaptive") + pagePolicy = PagePolicy::OpenAdaptive; + else if (value == "ClosedAdaptive") + pagePolicy = PagePolicy::ClosedAdaptive; + else + SC_REPORT_FATAL("Configuration", "Unsupported page policy!"); + } else if (name == "Scheduler") - scheduler = value; + { + if (value == "Fifo") + scheduler = Scheduler::Fifo; + else if (value == "FrFcfs") + scheduler = Scheduler::FrFcfs; + else if (value == "FrFcfsGrp") + scheduler = Scheduler::FrFcfsGrp; + else + SC_REPORT_FATAL("Configuration", "Unsupported scheduler!"); + } else if (name == "SchedulerBuffer") - schedulerBuffer = value; + { + if (value == "Bankwise") + schedulerBuffer = SchedulerBuffer::Bankwise; + else if (value == "ReadWrite") + schedulerBuffer = SchedulerBuffer::ReadWrite; + else + SC_REPORT_FATAL("Configuration", "Unsupported scheduler buffer!"); + } else if (name == "RequestBufferSize") + { requestBufferSize = value; + if (requestBufferSize == 0) + SC_REPORT_FATAL("Configuration", "Minimum request buffer size is 1!"); + } else if (name == "CmdMux") - cmdMux = value; + { + if (value == "Oldest") + cmdMux = CmdMux::Oldest; + else if (value == "Strict") + cmdMux = CmdMux::Strict; + else + SC_REPORT_FATAL("Configuration", "Unsupported cmd mux!"); + } else if (name == "RespQueue") - respQueue = value; + { + if (value == "Fifo") + respQueue = RespQueue::Fifo; + else if (value == "Reorder") + respQueue = RespQueue::Reorder; + else + SC_REPORT_FATAL("Configuration", "Unsupported response queue!"); + } else if (name == "RefreshPolicy") - refreshPolicy = value; + { + if (value == "NoRefresh") + refreshPolicy = RefreshPolicy::NoRefresh; + else if (value == "Rankwise") + refreshPolicy = RefreshPolicy::Rankwise; + else if (value == "Bankwise") + refreshPolicy = RefreshPolicy::Bankwise; + else + SC_REPORT_FATAL("Configuration", "Unsupported refresh policy!"); + } else if (name == "RefreshMaxPostponed") refreshMaxPostponed = value; else if (name == "RefreshMaxPulledin") refreshMaxPulledin = value; else if (name == "PowerDownPolicy") - powerDownPolicy = value; + { + if (value == "NoPowerDown") + powerDownPolicy = PowerDownPolicy::NoPowerDown; + else if (value == "Staggered") + powerDownPolicy = PowerDownPolicy::Staggered; + else + SC_REPORT_FATAL("Configuration", "Unsupported power down policy!"); + } else if (name == "PowerDownTimeout") powerDownTimeout = value; //SimConfig------------------------------------------------ @@ -115,9 +176,7 @@ void Configuration::setParameter(std::string name, nlohmann::json value) { windowSize = value; if (windowSize == 0) - SC_REPORT_FATAL("Configuration", - ("Invalid value for parameter " + name + - ". This parameter must be at least one.").c_str()); + SC_REPORT_FATAL("Configuration", "Minimum window size is 1"); } else if (name == "Debug") debug = value; @@ -126,26 +185,37 @@ void Configuration::setParameter(std::string name, nlohmann::json value) else if (name == "SimulationProgressBar") simulationProgressBar = value; else if (name == "AddressOffset") - { -#ifdef DRAMSYS_GEM5 addressOffset = value; -#else - addressOffset = 0; -#endif - } else if (name == "UseMalloc") useMalloc = value; else if (name == "CheckTLM2Protocol") checkTLM2Protocol = value; else if (name == "ECCControllerMode") - ECCMode = value; + { + if (value == "Disabled") + eccMode = ECCMode::Disabled; + else if (value == "Hamming") + eccMode = ECCMode::Hamming; + else + SC_REPORT_FATAL("Configuration", "Unsupported ECC mode!"); + } // Specification for ErrorChipSeed, ErrorCSVFile path and StoreMode else if (name == "ErrorChipSeed") errorChipSeed = value; else if (name == "ErrorCSVFile") errorCSVFile = value; else if (name == "StoreMode") - storeMode = value; + { + if (value == "NoStorage") + storeMode = StoreMode::NoStorage; + else if (value == "Store") + storeMode = StoreMode::Store; + else if (value == "ErrorModel") + storeMode = StoreMode::ErrorModel; + else + SC_REPORT_FATAL("Configuration", "Unsupported store mode!"); + } + // Temperature Simulation related else if (name == "TemperatureScale") { @@ -192,7 +262,7 @@ void Configuration::setPathToResources(std::string path) std::uint64_t Configuration::getSimMemSizeInBytes() { // 1. Get number of banks, rows, columns and data width in bits for one die (or chip) - std::string type = memSpec->memoryType; + //std::string type = memSpec->memoryType; std::uint64_t ranks = memSpec->numberOfRanks; std::uint64_t bankgroups = memSpec->numberOfBankGroups; std::uint64_t banks = memSpec->numberOfBanks; @@ -209,7 +279,7 @@ std::uint64_t Configuration::getSimMemSizeInBytes() std::cout << headline << std::endl; std::cout << "Per Channel Configuration:" << std::endl << std::endl; - std::cout << " Memory type: " << type << std::endl; + std::cout << " Memory type: " << "dummy" << std::endl; std::cout << " Memory size in bytes: " << memorySize << std::endl; std::cout << " Number of ranks: " << ranks << std::endl; std::cout << " Number of bankgroups: " << bankgroups << std::endl; @@ -245,18 +315,13 @@ unsigned int Configuration::getBytesPerBurst() unsigned int Configuration::adjustNumBytesAfterECC(unsigned nBytes) { // Manipulate the number of bytes only if there is an ECC Controller selected - if (ECCMode == "Disabled") + if (eccMode == ECCMode::Disabled) return nBytes; - else if (ECCMode == "Hamming") + else // if (eccMode == ECCMode::Hamming) { assert(pECC != nullptr); return pECC->AllocationSize(nBytes); } - else - { - SC_REPORT_FATAL("Configuration", ("ECC mode " + ECCMode + " unsupported").c_str()); - return 0; - } } void Configuration::loadSimConfig(Configuration &config, std::string simconfigUri) @@ -287,25 +352,25 @@ void Configuration::loadMemSpec(Configuration &config, std::string memspecUri) json doc = parseJSON(memspecUri); json jMemSpec = doc["memspec"]; - std::string memoryType = jMemSpec["memoryType"]; + std::string stringMemoryType = jMemSpec["memoryType"]; - if (memoryType == "DDR3") + if (stringMemoryType == "DDR3") memSpec = new MemSpecDDR3(jMemSpec); - else if (memoryType == "DDR4") + else if (stringMemoryType == "DDR4") memSpec = new MemSpecDDR4(jMemSpec); - else if (memoryType == "LPDDR4") + else if (stringMemoryType == "LPDDR4") memSpec = new MemSpecLPDDR4(jMemSpec); - else if (memoryType == "WIDEIO_SDR") + else if (stringMemoryType == "WIDEIO_SDR") memSpec = new MemSpecWideIO(jMemSpec); - else if (memoryType == "WIDEIO2") + else if (stringMemoryType == "WIDEIO2") memSpec = new MemSpecWideIO2(jMemSpec); - else if (memoryType == "HBM2") + else if (stringMemoryType == "HBM2") memSpec = new MemSpecHBM2(jMemSpec); - else if (memoryType == "GDDR5") + else if (stringMemoryType == "GDDR5") memSpec = new MemSpecGDDR5(jMemSpec); - else if (memoryType == "GDDR5X") + else if (stringMemoryType == "GDDR5X") memSpec = new MemSpecGDDR5X(jMemSpec); - else if (memoryType == "GDDR6") + else if (stringMemoryType == "GDDR6") memSpec = new MemSpecGDDR6(jMemSpec); else SC_REPORT_FATAL("Configuration", "Unsupported DRAM type"); diff --git a/DRAMSys/library/src/configuration/Configuration.h b/DRAMSys/library/src/configuration/Configuration.h index fa18b382..e8521ec2 100644 --- a/DRAMSys/library/src/configuration/Configuration.h +++ b/DRAMSys/library/src/configuration/Configuration.h @@ -69,16 +69,16 @@ public: std::string pathToResources; // MCConfig: - std::string pagePolicy = "Open"; - std::string scheduler = "Fifo"; - std::string schedulerBuffer = "Bankwise"; - std::string cmdMux = "Oldest"; - std::string respQueue = "Fifo"; + enum class PagePolicy {Open, Closed, OpenAdaptive, ClosedAdaptive} pagePolicy; + enum class Scheduler {Fifo, FrFcfs, FrFcfsGrp} scheduler; + enum class SchedulerBuffer {Bankwise, ReadWrite} schedulerBuffer; + enum class CmdMux {Oldest, Strict} cmdMux; + enum class RespQueue {Fifo, Reorder} respQueue; unsigned int requestBufferSize = 8; - std::string refreshPolicy = "Rankwise"; + enum class RefreshPolicy {NoRefresh, Rankwise, Bankwise} refreshPolicy; unsigned int refreshMaxPostponed = 0; unsigned int refreshMaxPulledin = 0; - std::string powerDownPolicy = "NoPowerDown"; + enum class PowerDownPolicy {NoPowerDown, Staggered} powerDownPolicy; unsigned int powerDownTimeout = 3; // SimConfig @@ -91,7 +91,7 @@ public: bool thermalSimulation = false; bool simulationProgressBar = false; bool checkTLM2Protocol = false; - std::string ECCMode = "Disabled"; + enum class ECCMode {Disabled, Hamming} eccMode; ECCBaseClass *pECC = nullptr; bool gem5 = false; bool useMalloc = false; @@ -105,7 +105,7 @@ public: //Configs for Seed, csv file and StorageMode unsigned int errorChipSeed; std::string errorCSVFile = "not defined."; - std::string storeMode; + enum class StoreMode {NoStorage, Store, ErrorModel} storeMode; // Temperature Simulation related TemperatureSimConfig temperatureSim; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpec.cpp b/DRAMSys/library/src/configuration/memspec/MemSpec.cpp index 39fd1211..4e0be58f 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpec.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpec.cpp @@ -43,7 +43,7 @@ using namespace tlm; using json = nlohmann::json; -MemSpec::MemSpec(json &memspec, unsigned numberOfChannels, +MemSpec::MemSpec(json &memspec, MemoryType memoryType, unsigned numberOfChannels, unsigned numberOfRanks, unsigned banksPerRank, unsigned groupsPerRank, unsigned banksPerGroup, unsigned numberOfBanks, unsigned numberOfBankGroups, @@ -64,7 +64,7 @@ MemSpec::MemSpec(json &memspec, unsigned numberOfChannels, fCKMHz(parseUdouble(memspec["memtimingspec"]["clkMhz"], "clkMhz")), tCK(sc_time(1.0 / fCKMHz, SC_US)), memoryId(parseString(memspec["memoryId"], "memoryId")), - memoryType(parseString(memspec["memoryType"], "memoryType")), + memoryType(memoryType), burstDuration(tCK * (burstLength / dataRate)) { commandLengthInCycles = std::vector(numberOfCommands(), 1); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpec.h b/DRAMSys/library/src/configuration/memspec/MemSpec.h index 6f0fa875..76d7f19f 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpec.h +++ b/DRAMSys/library/src/configuration/memspec/MemSpec.h @@ -48,26 +48,26 @@ class MemSpec { public: - unsigned numberOfChannels; - unsigned numberOfRanks; - unsigned banksPerRank; - unsigned groupsPerRank; - unsigned banksPerGroup; - unsigned numberOfBanks; - unsigned numberOfBankGroups; - unsigned numberOfDevicesOnDIMM; - unsigned numberOfRows; - unsigned numberOfColumns; - unsigned burstLength; - unsigned dataRate; - unsigned bitWidth; + const unsigned numberOfChannels; + const unsigned numberOfRanks; + const unsigned banksPerRank; + const unsigned groupsPerRank; + const unsigned banksPerGroup; + const unsigned numberOfBanks; + const unsigned numberOfBankGroups; + const unsigned numberOfDevicesOnDIMM; + const unsigned numberOfRows; + const unsigned numberOfColumns; + const unsigned burstLength; + const unsigned dataRate; + const unsigned bitWidth; // Clock - double fCKMHz; - sc_time tCK; + const double fCKMHz; + const sc_time tCK; - std::string memoryId; - std::string memoryType; + const std::string memoryId; + const enum class MemoryType {DDR3, DDR4, LPDDR4, WideIO, WideIO2, GDDR5, GDDR5X, GDDR6, HBM2} memoryType; virtual ~MemSpec() {} @@ -80,7 +80,7 @@ public: sc_time getCommandLength(Command) const; protected: - MemSpec(nlohmann::json &memspec, unsigned numberOfChannels, + MemSpec(nlohmann::json &memspec, MemoryType memoryType, unsigned numberOfChannels, unsigned numberOfRanks, unsigned banksPerRank, unsigned groupsPerRank, unsigned banksPerGroup, unsigned numberOfBanks, unsigned numberOfBankGroups, diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp index 427c3f85..ecd04ec8 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecDDR3::MemSpecDDR3(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::DDR3, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp index d3bd513c..33d76ac9 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp @@ -40,7 +40,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecDDR4::MemSpecDDR4(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::DDR4, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp index 3ca42b65..fde667d4 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecGDDR5::MemSpecGDDR5(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::GDDR5, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp index e2fd9855..7d24eef8 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecGDDR5X::MemSpecGDDR5X(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::GDDR5X, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp index a1b6e4e3..493fb3d2 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecGDDR6::MemSpecGDDR6(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::GDDR6, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp index 784b4f99..4f0adcdc 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecHBM2::MemSpecHBM2(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::HBM2, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp index 915c14c4..801d8dbb 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecLPDDR4::MemSpecLPDDR4(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::LPDDR4, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp index 0d8b9be6..2f8e71cd 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecWideIO::MemSpecWideIO(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::WideIO, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp index b74129ba..addae394 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp @@ -39,7 +39,7 @@ using namespace tlm; using json = nlohmann::json; MemSpecWideIO2::MemSpecWideIO2(json &memspec) - : MemSpec(memspec, + : MemSpec(memspec, MemoryType::WideIO2, parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), @@ -69,9 +69,9 @@ MemSpecWideIO2::MemSpecWideIO2(json &memspec) tWTR (tCK * parseUint(memspec["memtimingspec"]["WTR"], "WTR")), tRRD (tCK * parseUint(memspec["memtimingspec"]["RRD"], "RRD")), tFAW (tCK * parseUint(memspec["memtimingspec"]["FAW"], "FAW")), - tREFI (tCK * (unsigned)(parseUint(memspec["memtimingspec"]["REFI"], "REFI") + tREFI (tCK * static_cast(parseUint(memspec["memtimingspec"]["REFI"], "REFI") * parseUdouble(memspec["memtimingspec"]["REFM"], "REFM"))), - tREFIpb (tCK * (unsigned)(parseUint(memspec["memtimingspec"]["REFIPB"], "REFIPB") + tREFIpb (tCK * static_cast(parseUint(memspec["memtimingspec"]["REFIPB"], "REFIPB") * parseUdouble(memspec["memtimingspec"]["REFM"], "REFM"))), tRFCab (tCK * parseUint(memspec["memtimingspec"]["RFCAB"], "RFCAB")), tRFCpb (tCK * parseUint(memspec["memtimingspec"]["RFCPB"], "RFCPB")), diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index 4176929e..ece6abce 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -75,74 +75,64 @@ Controller::Controller(sc_module_name name) : readyCommands.reserve(memSpec->numberOfBanks); // instantiate timing checker - if (memSpec->memoryType == "DDR3") + if (memSpec->memoryType == MemSpec::MemoryType::DDR3) checker = new CheckerDDR3(); - else if (memSpec->memoryType == "DDR4") + else if (memSpec->memoryType == MemSpec::MemoryType::DDR4) checker = new CheckerDDR4(); - else if (memSpec->memoryType == "WIDEIO_SDR") + else if (memSpec->memoryType == MemSpec::MemoryType::WideIO) checker = new CheckerWideIO(); - else if (memSpec->memoryType == "LPDDR4") + else if (memSpec->memoryType == MemSpec::MemoryType::LPDDR4) checker = new CheckerLPDDR4(); - else if (memSpec->memoryType == "WIDEIO2") + else if (memSpec->memoryType == MemSpec::MemoryType::WideIO2) checker = new CheckerWideIO2(); - else if (memSpec->memoryType == "HBM2") + else if (memSpec->memoryType == MemSpec::MemoryType::HBM2) checker = new CheckerHBM2(); - else if (memSpec->memoryType == "GDDR5") + else if (memSpec->memoryType == MemSpec::MemoryType::GDDR5) checker = new CheckerGDDR5(); - else if (memSpec->memoryType == "GDDR5X") + else if (memSpec->memoryType == MemSpec::MemoryType::GDDR5X) checker = new CheckerGDDR5X(); - else if (memSpec->memoryType == "GDDR6") + else if (memSpec->memoryType == MemSpec::MemoryType::GDDR6) checker = new CheckerGDDR6(); - else - SC_REPORT_FATAL("Controller", "Unsupported DRAM type!"); // instantiate scheduler and command mux - if (config.scheduler == "Fifo") + if (config.scheduler == Configuration::Scheduler::Fifo) scheduler = new SchedulerFifo(); - else if (config.scheduler == "FrFcfs") + else if (config.scheduler == Configuration::Scheduler::FrFcfs) scheduler = new SchedulerFrFcfs(); - else if (config.scheduler == "FrFcfsGrp") + else if (config.scheduler == Configuration::Scheduler::FrFcfsGrp) scheduler = new SchedulerFrFcfsGrp(); - else - SC_REPORT_FATAL("Controller", "Selected scheduler not supported!"); - if (config.cmdMux == "Oldest") + if (config.cmdMux == Configuration::CmdMux::Oldest) cmdMux = new CmdMuxOldest(); - else if (config.cmdMux == "Strict") + else if (config.cmdMux == Configuration::CmdMux::Strict) cmdMux = new CmdMuxStrict(); - else - SC_REPORT_FATAL("Controller", "Selected cmdmux not supported!"); - if (config.respQueue == "Fifo") + if (config.respQueue == Configuration::RespQueue::Fifo) respQueue = new RespQueueFifo(); - else if (config.respQueue == "Reorder") + else if (config.respQueue == Configuration::RespQueue::Reorder) respQueue = new RespQueueReorder(); - else - SC_REPORT_FATAL("Controller", "Selected respqueue not supported!"); // instantiate bank machines (one per bank) - if (config.pagePolicy == "Open") + if (config.pagePolicy == Configuration::PagePolicy::Open) { for (unsigned bankID = 0; bankID < memSpec->numberOfBanks; bankID++) bankMachines.push_back(new BankMachineOpen(scheduler, checker, Bank(bankID))); } - else if (config.pagePolicy == "OpenAdaptive") + else if (config.pagePolicy == Configuration::PagePolicy::OpenAdaptive) { for (unsigned bankID = 0; bankID < memSpec->numberOfBanks; bankID++) bankMachines.push_back(new BankMachineOpenAdaptive(scheduler, checker, Bank(bankID))); } - else if (config.pagePolicy == "Closed") + else if (config.pagePolicy == Configuration::PagePolicy::Closed) { for (unsigned bankID = 0; bankID < memSpec->numberOfBanks; bankID++) bankMachines.push_back(new BankMachineClosed(scheduler, checker, Bank(bankID))); } - else if (config.pagePolicy == "ClosedAdaptive") + else if (config.pagePolicy == Configuration::PagePolicy::ClosedAdaptive) { for (unsigned bankID = 0; bankID < memSpec->numberOfBanks; bankID++) bankMachines.push_back(new BankMachineClosedAdaptive(scheduler, checker, Bank(bankID))); } - else - SC_REPORT_FATAL("Controller", "Selected page policy not supported!"); for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { @@ -151,7 +141,7 @@ Controller::Controller(sc_module_name name) : } // instantiate power-down managers (one per rank) - if (config.powerDownPolicy == "NoPowerDown") + if (config.powerDownPolicy == Configuration::PowerDownPolicy::NoPowerDown) { for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { @@ -159,7 +149,7 @@ Controller::Controller(sc_module_name name) : powerDownManagers.push_back(manager); } } - else if (config.powerDownPolicy == "Staggered") + else if (config.powerDownPolicy == Configuration::PowerDownPolicy::Staggered) { for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { @@ -167,16 +157,14 @@ Controller::Controller(sc_module_name name) : powerDownManagers.push_back(manager); } } - else - SC_REPORT_FATAL("Controller", "Selected power-down mode not supported!"); // instantiate refresh managers (one per rank) - if (config.refreshPolicy == "NoRefresh") + if (config.refreshPolicy == Configuration::RefreshPolicy::NoRefresh) { for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) refreshManagers.push_back(new RefreshManagerDummy()); } - else if (config.refreshPolicy == "Rankwise") + else if (config.refreshPolicy == Configuration::RefreshPolicy::Rankwise) { for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { @@ -185,7 +173,7 @@ Controller::Controller(sc_module_name name) : refreshManagers.push_back(manager); } } - else if (config.refreshPolicy == "Bankwise") + else if (config.refreshPolicy == Configuration::RefreshPolicy::Bankwise) { for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp index 7b81977b..ab9fa81e 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFifo.cpp @@ -44,12 +44,10 @@ SchedulerFifo::SchedulerFifo() Configuration &config = Configuration::getInstance(); localBuffer = std::vector>(config.memSpec->numberOfBanks); - if (config.schedulerBuffer == "Bankwise") + if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise) buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); - else if (Configuration::getInstance().schedulerBuffer == "ReadWrite") + else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite) buffer = new BufferReadWrite(config.requestBufferSize); - else - SC_REPORT_FATAL("Scheduler", "Unsupported scheduler buffer!"); } bool SchedulerFifo::hasBufferSpace() const diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp index e3b11ff0..8c0b02c8 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfs.cpp @@ -44,12 +44,10 @@ SchedulerFrFcfs::SchedulerFrFcfs() Configuration &config = Configuration::getInstance(); localBuffer = std::vector>(config.memSpec->numberOfBanks); - if (config.schedulerBuffer == "Bankwise") + if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise) buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); - else if (Configuration::getInstance().schedulerBuffer == "ReadWrite") + else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite) buffer = new BufferReadWrite(config.requestBufferSize); - else - SC_REPORT_FATAL("Scheduler", "Unsupported scheduler buffer!"); } bool SchedulerFrFcfs::hasBufferSpace() const diff --git a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp index cebaf7fe..b9cb739d 100644 --- a/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp +++ b/DRAMSys/library/src/controller/scheduler/SchedulerFrFcfsGrp.cpp @@ -44,12 +44,10 @@ SchedulerFrFcfsGrp::SchedulerFrFcfsGrp() Configuration &config = Configuration::getInstance(); localBuffer = std::vector>(config.memSpec->numberOfBanks); - if (config.schedulerBuffer == "Bankwise") + if (config.schedulerBuffer == Configuration::SchedulerBuffer::Bankwise) buffer = new BufferBankwise(config.requestBufferSize, config.memSpec->numberOfBanks); - else if (Configuration::getInstance().schedulerBuffer == "ReadWrite") + else if (config.schedulerBuffer == Configuration::SchedulerBuffer::ReadWrite) buffer = new BufferReadWrite(config.requestBufferSize); - else - SC_REPORT_FATAL("Scheduler", "Unsupported scheduler buffer!"); } bool SchedulerFrFcfsGrp::hasBufferSpace() const diff --git a/DRAMSys/library/src/simulation/DRAMSys.cpp b/DRAMSys/library/src/simulation/DRAMSys.cpp index f890734f..86a5a90c 100644 --- a/DRAMSys/library/src/simulation/DRAMSys.cpp +++ b/DRAMSys/library/src/simulation/DRAMSys.cpp @@ -183,24 +183,23 @@ void DRAMSys::instantiateModules(const std::string &pathToResources, // The first call to getInstance() creates the Temperature Controller. // The same instance will be accessed by all other modules. TemperatureController::getInstance(); + Configuration &config = Configuration::getInstance(); // Create new ECC Controller - if (Configuration::getInstance().ECCMode == "Hamming") + if (config.eccMode == Configuration::ECCMode::Hamming) ecc = new ECCHamming("ECCHamming"); - else if (Configuration::getInstance().ECCMode == "Disabled") + else if (config.eccMode == Configuration::ECCMode::Disabled) ecc = nullptr; - else - SC_REPORT_FATAL("DRAMSys", "Unsupported ECC mode"); // Save ECC Controller into the configuration struct to adjust it dynamically - Configuration::getInstance().pECC = ecc; + config.pECC = ecc; // Create arbiter arbiter = new Arbiter("arbiter", pathToResources + "configs/amconfigs/" + amconfig); // Create controllers and DRAMs - std::string memoryType = Configuration::getInstance().memSpec->memoryType; - for (size_t i = 0; i < Configuration::getInstance().memSpec->numberOfChannels; i++) + MemSpec::MemoryType memoryType = config.memSpec->memoryType; + for (size_t i = 0; i < config.memSpec->numberOfChannels; i++) { std::string str = "controller" + std::to_string(i); @@ -210,26 +209,24 @@ void DRAMSys::instantiateModules(const std::string &pathToResources, str = "dram" + std::to_string(i); Dram *dram; - if (memoryType == "DDR3") + if (memoryType == MemSpec::MemoryType::DDR3) dram = new DramDDR3(str.c_str()); - else if (memoryType == "WIDEIO_SDR") - dram = new DramWideIO(str.c_str()); - else if (memoryType == "DDR4") + else if (memoryType == MemSpec::MemoryType::DDR4) dram = new DramDDR4(str.c_str()); - else if (memoryType == "LPDDR4") + else if (memoryType == MemSpec::MemoryType::WideIO) + dram = new DramWideIO(str.c_str()); + else if (memoryType == MemSpec::MemoryType::LPDDR4) dram = new DramLPDDR4(str.c_str()); - else if (memoryType == "WIDEIO2") + else if (memoryType == MemSpec::MemoryType::WideIO2) dram = new DramWideIO2(str.c_str()); - else if (memoryType == "HBM2") + else if (memoryType == MemSpec::MemoryType::HBM2) dram = new DramHBM2(str.c_str()); - else if (memoryType == "GDDR5") + else if (memoryType == MemSpec::MemoryType::GDDR5) dram = new DramGDDR5(str.c_str()); - else if (memoryType == "GDDR5X") + else if (memoryType == MemSpec::MemoryType::GDDR5X) dram = new DramGDDR5X(str.c_str()); - else if (memoryType == "GDDR6") + else if (memoryType == MemSpec::MemoryType::GDDR6) dram = new DramGDDR6(str.c_str()); - else - SC_REPORT_FATAL("DRAMSys", "Unsupported DRAM type"); drams.push_back(dram); @@ -245,21 +242,21 @@ void DRAMSys::instantiateModules(const std::string &pathToResources, void DRAMSys::bindSockets() { + Configuration &config = Configuration::getInstance(); + // If ECC Controller enabled, put it between Trace and arbiter - if (Configuration::getInstance().ECCMode == "Hamming") + if (config.eccMode == Configuration::ECCMode::Hamming) { assert(ecc != nullptr); tSocket.bind(ecc->t_socket); ecc->i_socket.bind(arbiter->tSocket); } - else if (Configuration::getInstance().ECCMode == "Disabled") + else if (config.eccMode == Configuration::ECCMode::Disabled) tSocket.bind(arbiter->tSocket); - else - SC_REPORT_FATAL("DRAMSys", "Unsupported ECC mode"); - if (Configuration::getInstance().checkTLM2Protocol) + if (config.checkTLM2Protocol) { - for (size_t i = 0; i < Configuration::getInstance().memSpec->numberOfChannels; i++) + for (size_t i = 0; i < config.memSpec->numberOfChannels; i++) { arbiter->iSocket.bind(controllersTlmCheckers[i]->target_socket); controllersTlmCheckers[i]->initiator_socket.bind(controllers[i]->tSocket); @@ -268,7 +265,7 @@ void DRAMSys::bindSockets() } else { - for (size_t i = 0; i < Configuration::getInstance().memSpec->numberOfChannels; i++) + for (size_t i = 0; i < config.memSpec->numberOfChannels; i++) { arbiter->iSocket.bind(controllers[i]->tSocket); controllers[i]->iSocket.bind(drams[i]->tSocket); diff --git a/DRAMSys/library/src/simulation/DRAMSysRecordable.cpp b/DRAMSys/library/src/simulation/DRAMSysRecordable.cpp index 93b92a33..57a97ff3 100644 --- a/DRAMSys/library/src/simulation/DRAMSysRecordable.cpp +++ b/DRAMSys/library/src/simulation/DRAMSysRecordable.cpp @@ -120,27 +120,27 @@ void DRAMSysRecordable::instantiateModules(const std::string &traceName, // The same instance will be accessed by all other modules. TemperatureController::getInstance(); + Configuration &config = Configuration::getInstance(); + // Create and properly initialize TLM recorders. // They need to be ready before creating some modules. setupTlmRecorders(traceName, pathToResources); // Create new ECC Controller - if (Configuration::getInstance().ECCMode == "Hamming") + if (config.eccMode == Configuration::ECCMode::Hamming) ecc = new ECCHamming("ECCHamming"); - else if (Configuration::getInstance().ECCMode == "Disabled") + else if (config.eccMode == Configuration::ECCMode::Disabled) ecc = nullptr; - else - SC_REPORT_FATAL("DRAMSys", "Unsupported ECC mode"); // Save ECC Controller into the configuration struct to adjust it dynamically - Configuration::getInstance().pECC = ecc; + config.pECC = ecc; // Create arbiter arbiter = new Arbiter("arbiter", pathToResources + "configs/amconfigs/" + amconfig); // Create controllers and DRAMs - std::string memoryType = Configuration::getInstance().memSpec->memoryType; - for (size_t i = 0; i < Configuration::getInstance().memSpec->numberOfChannels; i++) + MemSpec::MemoryType memoryType = config.memSpec->memoryType; + for (size_t i = 0; i < config.memSpec->numberOfChannels; i++) { std::string str = "controller" + std::to_string(i); @@ -150,30 +150,28 @@ void DRAMSysRecordable::instantiateModules(const std::string &traceName, str = "dram" + std::to_string(i); Dram *dram; - if (memoryType == "DDR3") + if (memoryType == MemSpec::MemoryType::DDR3) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "WIDEIO_SDR") - dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "DDR4") + else if (memoryType == MemSpec::MemoryType::DDR4) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "LPDDR4") + else if (memoryType == MemSpec::MemoryType::WideIO) + dram = new DramRecordable(str.c_str(), tlmRecorders[i]); + else if (memoryType == MemSpec::MemoryType::LPDDR4) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "WIDEIO2") + else if (memoryType == MemSpec::MemoryType::WideIO2) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "HBM2") + else if (memoryType == MemSpec::MemoryType::HBM2) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "GDDR5") + else if (memoryType == MemSpec::MemoryType::GDDR5) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "GDDR5X") + else if (memoryType == MemSpec::MemoryType::GDDR5X) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else if (memoryType == "GDDR6") + else if (memoryType == MemSpec::MemoryType::GDDR6) dram = new DramRecordable(str.c_str(), tlmRecorders[i]); - else - SC_REPORT_FATAL("DRAMSys", "Unsupported DRAM type"); drams.push_back(dram); - if (Configuration::getInstance().checkTLM2Protocol) + if (config.checkTLM2Protocol) { str = "TLMCheckerController" + std::to_string(i); tlm_utils::tlm2_base_protocol_checker<> *controllerTlmChecker = @@ -185,21 +183,21 @@ void DRAMSysRecordable::instantiateModules(const std::string &traceName, void DRAMSysRecordable::bindSockets() { + Configuration &config = Configuration::getInstance(); + // If ECC Controller enabled, put it between Trace and arbiter - if (Configuration::getInstance().ECCMode == "Hamming") + if (config.eccMode == Configuration::ECCMode::Hamming) { assert(ecc != nullptr); tSocket.bind(ecc->t_socket); ecc->i_socket.bind(arbiter->tSocket); } - else if (Configuration::getInstance().ECCMode == "Disabled") + else if (config.eccMode == Configuration::ECCMode::Disabled) tSocket.bind(arbiter->tSocket); - else - SC_REPORT_FATAL("DRAMSys", "Unsupported ECC mode"); - if (Configuration::getInstance().checkTLM2Protocol) + if (config.checkTLM2Protocol) { - for (size_t i = 0; i < Configuration::getInstance().memSpec->numberOfChannels; i++) + for (size_t i = 0; i < config.memSpec->numberOfChannels; i++) { arbiter->iSocket.bind(controllersTlmCheckers[i]->target_socket); controllersTlmCheckers[i]->initiator_socket.bind(controllers[i]->tSocket); @@ -208,7 +206,7 @@ void DRAMSysRecordable::bindSockets() } else { - for (size_t i = 0; i < Configuration::getInstance().memSpec->numberOfChannels; i++) + for (size_t i = 0; i < config.memSpec->numberOfChannels; i++) { arbiter->iSocket.bind(controllers[i]->tSocket); controllers[i]->iSocket.bind(drams[i]->tSocket); diff --git a/DRAMSys/library/src/simulation/dram/Dram.cpp b/DRAMSys/library/src/simulation/dram/Dram.cpp index 8238195c..9164745a 100644 --- a/DRAMSys/library/src/simulation/dram/Dram.cpp +++ b/DRAMSys/library/src/simulation/dram/Dram.cpp @@ -69,19 +69,12 @@ Dram::Dram(sc_module_name name) : sc_module(name), tSocket("socket") // Adjust number of bytes per burst dynamically to the selected ecc controller bytesPerBurst = config.adjustNumBytesAfterECC(bytesPerBurst); - if (config.storeMode == "NoStorage") - storeMode = StorageMode::NoStorage; - else if (config.storeMode == "Store") - storeMode = StorageMode::Store; - else if (config.storeMode == "ErrorModel") - storeMode = StorageMode::ErrorModel; - else - SC_REPORT_FATAL(this->name(), "Unsupported storage mode"); + storeMode = config.storeMode; - uint64_t memorySize = Configuration::getInstance().getSimMemSizeInBytes(); - if (storeMode == StorageMode::Store) + uint64_t memorySize = config.getSimMemSizeInBytes(); + if (storeMode == Configuration::StoreMode::Store) { - if (Configuration::getInstance().useMalloc) + if (config.useMalloc) { memory = (unsigned char *)malloc(memorySize); if (!memory) @@ -151,7 +144,7 @@ tlm_sync_enum Dram::nb_transport_fw(tlm_generic_payload &payload, DRAMPower->doCommand(phaseToDRAMPowerCommand(phase), bank, cycle); } - if (storeMode == StorageMode::Store) + if (storeMode == Configuration::StoreMode::Store) { if (phase == BEGIN_RD || phase == BEGIN_RDA) { @@ -173,7 +166,7 @@ unsigned int Dram::transport_dbg(tlm_generic_payload &trans) PRINTDEBUGMESSAGE(name(), "transport_dgb"); // TODO: This part is not tested yet, neither with traceplayers nor with GEM5 coupling - if (storeMode == StorageMode::NoStorage) + if (storeMode == Configuration::StoreMode::NoStorage) { SC_REPORT_FATAL("DRAM", "Debug Transport is used in combination with NoStorage"); @@ -190,7 +183,7 @@ unsigned int Dram::transport_dbg(tlm_generic_payload &trans) if (cmd == TLM_READ_COMMAND) { - if (storeMode == StorageMode::Store) + if (storeMode == Configuration::StoreMode::Store) { // Use Storage unsigned char *phyAddr = memory + trans.get_address(); memcpy(ptr, phyAddr, trans.get_data_length()); @@ -203,7 +196,7 @@ unsigned int Dram::transport_dbg(tlm_generic_payload &trans) } else if (cmd == TLM_WRITE_COMMAND) { - if (storeMode == StorageMode::Store) + if (storeMode == Configuration::StoreMode::Store) { // Use Storage unsigned char *phyAddr = memory + trans.get_address(); memcpy(phyAddr, ptr, trans.get_data_length()); diff --git a/DRAMSys/library/src/simulation/dram/Dram.h b/DRAMSys/library/src/simulation/dram/Dram.h index d39d07b6..5716c667 100644 --- a/DRAMSys/library/src/simulation/dram/Dram.h +++ b/DRAMSys/library/src/simulation/dram/Dram.h @@ -60,7 +60,7 @@ protected: MemSpec *memSpec = Configuration::getInstance().memSpec; // Data Storage: - enum class StorageMode {NoStorage, Store, ErrorModel} storeMode; + Configuration::StoreMode storeMode; unsigned char *memory; diff --git a/DRAMSys/library/src/simulation/dram/DramDDR3.cpp b/DRAMSys/library/src/simulation/dram/DramDDR3.cpp index da039524..66e491df 100644 --- a/DRAMSys/library/src/simulation/dram/DramDDR3.cpp +++ b/DRAMSys/library/src/simulation/dram/DramDDR3.cpp @@ -44,7 +44,7 @@ using namespace DRAMPower; DramDDR3::DramDDR3(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramDDR3", "Error Model not supported for DDR3"); if (Configuration::getInstance().powerAnalysis) @@ -134,7 +134,7 @@ DramDDR3::DramDDR3(sc_module_name name) : Dram(name) MemorySpecification powerSpec; powerSpec.id = memSpec->memoryId; - powerSpec.memoryType = memSpec->memoryType; + powerSpec.memoryType = MemoryType::DDR3; powerSpec.memTimingSpec = memTimingSpec; powerSpec.memPowerSpec = memPowerSpec; powerSpec.memArchSpec = memArchSpec; diff --git a/DRAMSys/library/src/simulation/dram/DramDDR4.cpp b/DRAMSys/library/src/simulation/dram/DramDDR4.cpp index 751f4e30..82255616 100644 --- a/DRAMSys/library/src/simulation/dram/DramDDR4.cpp +++ b/DRAMSys/library/src/simulation/dram/DramDDR4.cpp @@ -44,7 +44,7 @@ using namespace DRAMPower; DramDDR4::DramDDR4(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramDDR4", "Error Model not supported for DDR4"); if (Configuration::getInstance().powerAnalysis) @@ -134,7 +134,7 @@ DramDDR4::DramDDR4(sc_module_name name) : Dram(name) MemorySpecification powerSpec; powerSpec.id = memSpec->memoryId; - powerSpec.memoryType = memSpec->memoryType; + powerSpec.memoryType = MemoryType::DDR4; powerSpec.memTimingSpec = memTimingSpec; powerSpec.memPowerSpec = memPowerSpec; powerSpec.memArchSpec = memArchSpec; diff --git a/DRAMSys/library/src/simulation/dram/DramGDDR5.cpp b/DRAMSys/library/src/simulation/dram/DramGDDR5.cpp index 552ff81d..e3fe6014 100644 --- a/DRAMSys/library/src/simulation/dram/DramGDDR5.cpp +++ b/DRAMSys/library/src/simulation/dram/DramGDDR5.cpp @@ -42,7 +42,7 @@ DramGDDR5::DramGDDR5(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramGDDR5", "Error Model not supported for GDDR5"); if (Configuration::getInstance().powerAnalysis) diff --git a/DRAMSys/library/src/simulation/dram/DramGDDR5X.cpp b/DRAMSys/library/src/simulation/dram/DramGDDR5X.cpp index 7db5f265..3c767638 100644 --- a/DRAMSys/library/src/simulation/dram/DramGDDR5X.cpp +++ b/DRAMSys/library/src/simulation/dram/DramGDDR5X.cpp @@ -42,7 +42,7 @@ DramGDDR5X::DramGDDR5X(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramGDDR5X", "Error Model not supported for GDDR5X"); if (Configuration::getInstance().powerAnalysis) diff --git a/DRAMSys/library/src/simulation/dram/DramGDDR6.cpp b/DRAMSys/library/src/simulation/dram/DramGDDR6.cpp index a144c211..24fbed6f 100644 --- a/DRAMSys/library/src/simulation/dram/DramGDDR6.cpp +++ b/DRAMSys/library/src/simulation/dram/DramGDDR6.cpp @@ -42,7 +42,7 @@ DramGDDR6::DramGDDR6(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramGDDR6", "Error Model not supported for GDDR6"); if (Configuration::getInstance().powerAnalysis) diff --git a/DRAMSys/library/src/simulation/dram/DramHBM2.cpp b/DRAMSys/library/src/simulation/dram/DramHBM2.cpp index a803d1a6..1dec6977 100644 --- a/DRAMSys/library/src/simulation/dram/DramHBM2.cpp +++ b/DRAMSys/library/src/simulation/dram/DramHBM2.cpp @@ -42,7 +42,7 @@ DramHBM2::DramHBM2(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramHBM2", "Error Model not supported for HBM2"); if (Configuration::getInstance().powerAnalysis) diff --git a/DRAMSys/library/src/simulation/dram/DramLPDDR4.cpp b/DRAMSys/library/src/simulation/dram/DramLPDDR4.cpp index de60b0da..503d2774 100644 --- a/DRAMSys/library/src/simulation/dram/DramLPDDR4.cpp +++ b/DRAMSys/library/src/simulation/dram/DramLPDDR4.cpp @@ -42,7 +42,7 @@ DramLPDDR4::DramLPDDR4(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramLPDDR4", "Error Model not supported for LPDDR4"); if (Configuration::getInstance().powerAnalysis) diff --git a/DRAMSys/library/src/simulation/dram/DramWideIO.cpp b/DRAMSys/library/src/simulation/dram/DramWideIO.cpp index eeb78d01..1f9b7a79 100644 --- a/DRAMSys/library/src/simulation/dram/DramWideIO.cpp +++ b/DRAMSys/library/src/simulation/dram/DramWideIO.cpp @@ -135,7 +135,7 @@ DramWideIO::DramWideIO(sc_module_name name) : Dram(name) MemorySpecification powerSpec; powerSpec.id = memSpec->memoryId; - powerSpec.memoryType = memSpec->memoryType; + powerSpec.memoryType = MemoryType::WIDEIO_SDR; powerSpec.memTimingSpec = memTimingSpec; powerSpec.memPowerSpec = memPowerSpec; powerSpec.memArchSpec = memArchSpec; @@ -143,7 +143,7 @@ DramWideIO::DramWideIO(sc_module_name name) : Dram(name) DRAMPower = new libDRAMPower(powerSpec, 0); // For each bank in a channel a error Model is created: - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) { for (unsigned i = 0; i < memSpec->numberOfBanks; i++) { @@ -156,7 +156,7 @@ DramWideIO::DramWideIO(sc_module_name name) : Dram(name) } else { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) { for (unsigned i = 0; i < memSpec->numberOfBanks; i++) { @@ -188,7 +188,7 @@ tlm_sync_enum DramWideIO::nb_transport_fw(tlm_generic_payload &payload, DRAMPower->doCommand(phaseToDRAMPowerCommand(phase), bank, cycle); } - if (storeMode == StorageMode::Store) + if (storeMode == Configuration::StoreMode::Store) { if (phase == BEGIN_RD || phase == BEGIN_RDA) { @@ -201,7 +201,7 @@ tlm_sync_enum DramWideIO::nb_transport_fw(tlm_generic_payload &payload, memcpy(phyAddr, payload.get_data_ptr(), payload.get_data_length()); } } - else if (storeMode == StorageMode::ErrorModel) + else if (storeMode == Configuration::StoreMode::ErrorModel) { unsigned bank = DramExtension::getExtension(payload).getBank().ID(); diff --git a/DRAMSys/library/src/simulation/dram/DramWideIO2.cpp b/DRAMSys/library/src/simulation/dram/DramWideIO2.cpp index aba04086..2dbce0cc 100644 --- a/DRAMSys/library/src/simulation/dram/DramWideIO2.cpp +++ b/DRAMSys/library/src/simulation/dram/DramWideIO2.cpp @@ -42,7 +42,7 @@ DramWideIO2::DramWideIO2(sc_module_name name) : Dram(name) { - if (storeMode == StorageMode::ErrorModel) + if (storeMode == Configuration::StoreMode::ErrorModel) SC_REPORT_FATAL("DramWideIO2", "Error Model not supported for WideIO2"); if (Configuration::getInstance().powerAnalysis) diff --git a/DRAMSys/simulator/MemoryManager.cpp b/DRAMSys/simulator/MemoryManager.cpp index 361b3f68..694dfc9c 100644 --- a/DRAMSys/simulator/MemoryManager.cpp +++ b/DRAMSys/simulator/MemoryManager.cpp @@ -44,7 +44,7 @@ using namespace tlm; MemoryManager::MemoryManager() : numberOfAllocations(0), numberOfFrees(0) { - if (Configuration::getInstance().storeMode == "NoStorage") + if (Configuration::getInstance().storeMode == Configuration::StoreMode::NoStorage) storageEnabled = false; else storageEnabled = true; diff --git a/DRAMSys/simulator/TracePlayer.cpp b/DRAMSys/simulator/TracePlayer.cpp index 69e8b16a..dfdcf848 100644 --- a/DRAMSys/simulator/TracePlayer.cpp +++ b/DRAMSys/simulator/TracePlayer.cpp @@ -49,7 +49,7 @@ TracePlayer::TracePlayer(sc_module_name name, TraceSetup *setup) : SC_METHOD(nextPayload); iSocket.register_nb_transport_bw(this, &TracePlayer::nb_transport_bw); - if (Configuration::getInstance().storeMode == "NoStorage") + if (Configuration::getInstance().storeMode == Configuration::StoreMode::NoStorage) storageEnabled = false; else storageEnabled = true;