From 60b2bcbffa6cc533ae97f4c9d44681fe37c5e4c4 Mon Sep 17 00:00:00 2001
From: Derek Christ <derek.christ@iese.fraunhofer.de>
Date: Tue, 11 Apr 2023 14:08:32 +0200
Subject: [PATCH] Fix DDR5 write-to-write delay in TimingChecker

---
 .../controller/checker/CheckerDDR5.cpp        | 47 ++++++++++++++-----
 1 file changed, 35 insertions(+), 12 deletions(-)

diff --git a/extensions/standards/DDR5/DRAMSys/controller/checker/CheckerDDR5.cpp b/extensions/standards/DDR5/DRAMSys/controller/checker/CheckerDDR5.cpp
index 15d53f92..0eb80250 100644
--- a/extensions/standards/DDR5/DRAMSys/controller/checker/CheckerDDR5.cpp
+++ b/extensions/standards/DDR5/DRAMSys/controller/checker/CheckerDDR5.cpp
@@ -453,14 +453,25 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, const tlm_generic
             {
                 if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_L_WR_slr);
-                else
-                    earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_L_WR2_slr);
             }
             else
             {
                 if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_L_WR_slr);
-                else
+            }
+        }
+
+        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankGroup.ID()];
+        if (lastCommandStart != sc_max_time())
+        {
+            if (lastBurstLengthByCommandAndBankGroup[Command::WR][bankGroup.ID()] == 32)
+            {
+                if (!(burstLength == 16 && memSpec->bitWidth == 4)) // no RMW
+                    earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_L_WR2_slr);
+            }
+            else
+            {
+                if (!(burstLength == 16 && memSpec->bitWidth == 4)) // no RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_L_WR2_slr);
             }
         }
@@ -513,11 +524,14 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, const tlm_generic
         lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()];
         if (lastCommandStart != sc_max_time())
         {
-            if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
+            if (lastBurstLengthByCommandAndBank[Command::WRA][bank.ID()] == 32)
             {
-                if (lastBurstLengthByCommandAndBank[Command::WRA][bank.ID()] == 32)
+                if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_L_WR_slr);
-                else
+            }
+            else
+            {
+                if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_L_WR_slr);
             }
         }
@@ -527,20 +541,29 @@ sc_time CheckerDDR5::timeToSatisfyConstraints(Command command, const tlm_generic
         {
             if (lastBurstLengthByCommandAndBankGroup[Command::WRA][bankGroup.ID()] == 32)
             {
-                if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
-                    earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_M_WR_slr);
-                else
+                if (!(burstLength == 16 && memSpec->bitWidth == 4)) // no RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_L_WR2_slr);
             }
             else
             {
-                if (burstLength == 16 && memSpec->bitWidth == 4) // second WR requires RMW
-                    earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_M_WR_slr);
-                else
+                if (!(burstLength == 16 && memSpec->bitWidth == 4)) // no RMW
                     earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_L_WR2_slr);
             }
         }
 
+        lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankGroup.ID()];
+        if (lastCommandStart != sc_max_time())
+        {
+            if (lastBurstLengthByCommandAndBankGroup[Command::WRA][bankGroup.ID()] == 32)
+            {
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tBURST16 + memSpec->tCCD_M_WR_slr);
+            }
+            else
+            {
+                earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_M_WR_slr);
+            }
+        }
+
         lastCommandStart = lastScheduledByCommandAndLogicalRank[Command::WRA][logicalRank.ID()];
         if (lastCommandStart != sc_max_time())
             earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD_S_WR_slr);