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Move refresh mode to DDR4 memspec.

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This commit is contained in:
Lukas Steiner
2020-07-02 11:28:44 +02:00
parent 74c219ebdc
commit 603f9b6bdd
18 changed files with 73 additions and 86 deletions
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1
DRAMSys/library/resources/configs/mcconfigs/fifo.json
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@@ -6,7 +6,6 @@
"CmdMux": "Oldest", "CmdMux": "Oldest",
"RespQueue": "Fifo", "RespQueue": "Fifo",
"RefreshPolicy": "Rankwise", "RefreshPolicy": "Rankwise",
"RefreshMode": 1,
"RefreshMaxPostponed": 8, "RefreshMaxPostponed": 8,
"RefreshMaxPulledin": 8, "RefreshMaxPulledin": 8,
"PowerDownPolicy": "NoPowerDown", "PowerDownPolicy": "NoPowerDown",

1
DRAMSys/library/resources/configs/mcconfigs/fifoStrict.json
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@@ -6,7 +6,6 @@
"CmdMux": "Strict", "CmdMux": "Strict",
"RespQueue": "Fifo", "RespQueue": "Fifo",
"RefreshPolicy": "Rankwise", "RefreshPolicy": "Rankwise",
"RefreshMode": 1,
"RefreshMaxPostponed": 8, "RefreshMaxPostponed": 8,
"RefreshMaxPulledin": 8, "RefreshMaxPulledin": 8,
"PowerDownPolicy": "NoPowerDown", "PowerDownPolicy": "NoPowerDown",

1
DRAMSys/library/resources/configs/mcconfigs/fr_fcfs.json
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@@ -6,7 +6,6 @@
"CmdMux": "Oldest", "CmdMux": "Oldest",
"RespQueue": "Fifo", "RespQueue": "Fifo",
"RefreshPolicy": "Rankwise", "RefreshPolicy": "Rankwise",
"RefreshMode": 1,
"RefreshMaxPostponed": 8, "RefreshMaxPostponed": 8,
"RefreshMaxPulledin": 8, "RefreshMaxPulledin": 8,
"PowerDownPolicy": "NoPowerDown", "PowerDownPolicy": "NoPowerDown",

3
DRAMSys/library/resources/configs/mcconfigs/fr_fcfs_grp.json
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@@ -3,10 +3,9 @@
"PagePolicy": "Open", "PagePolicy": "Open",
"Scheduler": "FrFcfsGrp", "Scheduler": "FrFcfsGrp",
"RequestBufferSize": 8, "RequestBufferSize": 8,
"CmdMux": "Oldest", "CmdMux": "Oldest",
"RespQueue": "Fifo", "RespQueue": "Fifo",
"RefreshPolicy": "Rankwise", "RefreshPolicy": "Rankwise",
"RefreshMode": 1,
"RefreshMaxPostponed": 8, "RefreshMaxPostponed": 8,
"RefreshMaxPulledin": 8, "RefreshMaxPulledin": 8,
"PowerDownPolicy": "NoPowerDown", "PowerDownPolicy": "NoPowerDown",

1
DRAMSys/library/resources/configs/memspecs/JEDEC_4Gb_DDR4-1866_8bit_A.json
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@@ -43,6 +43,7 @@
"RAS": 32, "RAS": 32,
"RC": 45, "RC": 45,
"RCD": 13, "RCD": 13,
"REFM": 1,
"REFI": 7280, "REFI": 7280,
"RFC": 243, "RFC": 243,
"RFC2": 150, "RFC2": 150,

1
DRAMSys/library/resources/configs/memspecs/JEDEC_4Gb_DDR4-2400_8bit_A.json
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@@ -43,6 +43,7 @@
"RAS": 39, "RAS": 39,
"RC": 55, "RC": 55,
"RCD": 16, "RCD": 16,
"REFM": 1,
"REFI": 9360, "REFI": 9360,
"RFC": 312, "RFC": 312,
"RFC2": 192, "RFC2": 192,

1
DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
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@@ -43,6 +43,7 @@
"RAS": 32, "RAS": 32,
"RC": 45, "RC": 45,
"RCD": 13, "RCD": 13,
"REFM": 1,
"REFI": 3644, "REFI": 3644,
"RFC": 243, "RFC": 243,
"RL": 13, "RL": 13,

1
DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.json
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@@ -43,6 +43,7 @@
"RAS": 39, "RAS": 39,
"RC": 55, "RC": 55,
"RCD": 16, "RCD": 16,
"REFM": 1,
"REFI": 4680, "REFI": 4680,
"RFC": 313, "RFC": 313,
"RL": 16, "RL": 16,

2
DRAMSys/library/src/configuration/Configuration.cpp
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@@ -92,8 +92,6 @@ void Configuration::setParameter(std::string name, nlohmann::json value)
respQueue = value; respQueue = value;
else if (name == "RefreshPolicy") else if (name == "RefreshPolicy")
refreshPolicy = value; refreshPolicy = value;
else if (name == "RefreshMode")
refreshMode = value;
else if (name == "RefreshMaxPostponed") else if (name == "RefreshMaxPostponed")
refreshMaxPostponed = value; refreshMaxPostponed = value;
else if (name == "RefreshMaxPulledin") else if (name == "RefreshMaxPulledin")

1
DRAMSys/library/src/configuration/Configuration.h
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@@ -75,7 +75,6 @@ public:
std::string respQueue = "Fifo"; std::string respQueue = "Fifo";
unsigned int requestBufferSize = 8; unsigned int requestBufferSize = 8;
std::string refreshPolicy = "Rankwise"; std::string refreshPolicy = "Rankwise";
unsigned int refreshMode = 1;
unsigned int refreshMaxPostponed = 0; unsigned int refreshMaxPostponed = 0;
unsigned int refreshMaxPulledin = 0; unsigned int refreshMaxPulledin = 0;
std::string powerDownPolicy = "NoPowerDown"; std::string powerDownPolicy = "NoPowerDown";

18
DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
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@@ -68,16 +68,16 @@ MemSpecDDR4::MemSpecDDR4(json &memspec)
tCCD_S (tCK * parseUint(memspec["memtimingspec"]["CCD_S"], "CCD_S")), tCCD_S (tCK * parseUint(memspec["memtimingspec"]["CCD_S"], "CCD_S")),
tCCD_L (tCK * parseUint(memspec["memtimingspec"]["CCD_L"], "CCD_L")), tCCD_L (tCK * parseUint(memspec["memtimingspec"]["CCD_L"], "CCD_L")),
tFAW (tCK * parseUint(memspec["memtimingspec"]["FAW"], "FAW")), tFAW (tCK * parseUint(memspec["memtimingspec"]["FAW"], "FAW")),
tREFI ((Configuration::getInstance().refreshMode == 1) ? tREFI ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 4) ?
(tCK * parseUint(memspec["memtimingspec"]["REFI"], "REFI")) : (tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 4)) :
((Configuration::getInstance().refreshMode == 2) ? ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 2) ?
(tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 2)) : (tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 2)) :
(tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 4)))), (tCK * parseUint(memspec["memtimingspec"]["REFI"], "REFI")))),
tRFC ((Configuration::getInstance().refreshMode == 1) ? tRFC ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 4) ?
(tCK * parseUint(memspec["memtimingspec"]["RFC"], "RFC")) : (tCK * parseUint(memspec["memtimingspec"]["RFC4"], "RFC4")) :
((Configuration::getInstance().refreshMode == 2) ? ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 2) ?
(tCK * (parseUint(memspec["memtimingspec"]["RFC2"], "RFC2") / 2)) : (tCK * parseUint(memspec["memtimingspec"]["RFC2"], "RFC2")) :
(tCK * (parseUint(memspec["memtimingspec"]["RFC4"], "RFC4") / 4)))), (tCK * parseUint(memspec["memtimingspec"]["RFC"], "RFC")))),
tRP (tCK * parseUint(memspec["memtimingspec"]["RP"], "RP")), tRP (tCK * parseUint(memspec["memtimingspec"]["RP"], "RP")),
tRRD_S (tCK * parseUint(memspec["memtimingspec"]["RRD_S"], "RRD_S")), tRRD_S (tCK * parseUint(memspec["memtimingspec"]["RRD_S"], "RRD_S")),
tRRD_L (tCK * parseUint(memspec["memtimingspec"]["RRD_L"], "RRD_L")), tRRD_L (tCK * parseUint(memspec["memtimingspec"]["RRD_L"], "RRD_L")),

2
DRAMSys/library/src/simulation/dram/DramRecordable.cpp
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@@ -57,7 +57,7 @@ DramRecordable<BaseDram>::DramRecordable(sc_module_name name, TlmRecorder *tlmRe
{ {
// Create a thread that is triggered every $powerWindowSize // Create a thread that is triggered every $powerWindowSize
// to generate a Power over Time plot in the Trace analyzer: // to generate a Power over Time plot in the Trace analyzer:
if (Configuration::getInstance().powerAnalysis) if (Configuration::getInstance().powerAnalysis && Configuration::getInstance().enableWindowing)
SC_THREAD(powerWindow); SC_THREAD(powerWindow);
} }

1
DRAMSys/tests/DDR4/configs/mcconfigs/fr_fcfs.json
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@@ -5,7 +5,6 @@
"CmdMux": "Oldest", "CmdMux": "Oldest",
"RespQueue": "Fifo", "RespQueue": "Fifo",
"RefreshPolicy": "Rankwise", "RefreshPolicy": "Rankwise",
"RefreshMode": 1,
"RefreshMaxPostponed": 8, "RefreshMaxPostponed": 8,
"RefreshMaxPulledin": 8, "RefreshMaxPulledin": 8,
"PowerDownPolicy": "NoPowerDown", "PowerDownPolicy": "NoPowerDown",

1
DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
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@@ -43,6 +43,7 @@
"RAS": 32, "RAS": 32,
"RC": 45, "RC": 45,
"RCD": 13, "RCD": 13,
"REFM": 1,
"REFI": 3644, "REFI": 3644,
"RFC": 243, "RFC": 243,
"RL": 13, "RL": 13,

25
DRAMSys/tests/HBM2/configs/mcconfigs/fifoStrict.json
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@@ -1,11 +1,14 @@
{"mcconfig": {"PagePolicy": "Closed", {
"Scheduler": "Fifo", "mcconfig": {
"RequestBufferSize": 8, "PagePolicy": "Closed",
"CmdMux": "Strict", "Scheduler": "Fifo",
"RespQueue": "Fifo", "RequestBufferSize": 8,
"RefreshPolicy": "Rankwise", "CmdMux": "Strict",
"RefreshMode": 1, "RespQueue": "Fifo",
"RefreshMaxPostponed": 0, "RefreshPolicy": "Rankwise",
"RefreshMaxPulledin": 0, "RefreshMaxPostponed": 0,
"PowerDownPolicy": "NoPowerDown", "RefreshMaxPulledin": 0,
"PowerDownTimeout": 100}} "PowerDownPolicy": "NoPowerDown",
"PowerDownTimeout": 100
}
}

26
DRAMSys/tests/ddr3_multirank/configs/mcconfigs/fr_fcfs_grp.json
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@@ -1,12 +1,14 @@
{"mcconfig": {
{"PagePolicy": "Open", "mcconfig": {
"Scheduler": "FrFcfsGrp", "PagePolicy": "Open",
"RequestBufferSize": 8, "Scheduler": "FrFcfsGrp",
"CmdMux": "Oldest", "RequestBufferSize": 8,
"RespQueue": "Fifo", "CmdMux": "Oldest",
"RefreshPolicy": "Rankwise", "RespQueue": "Fifo",
"RefreshMode": 1, "RefreshPolicy": "Rankwise",
"RefreshMaxPostponed": 0, "RefreshMaxPostponed": 0,
"RefreshMaxPulledin": 0, "RefreshMaxPulledin": 0,
"PowerDownPolicy": "Staggered", "PowerDownPolicy": "Staggered",
"PowerDownTimeout": 100}} "PowerDownTimeout": 100
}
}

25
DRAMSys/tests/lpddr4/configs/mcconfigs/fifo.json
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@@ -1,11 +1,14 @@
{"mcconfig": {"PagePolicy": "OpenAdaptive", {
"Scheduler": "Fifo", "mcconfig": {
"RequestBufferSize": 8, "PagePolicy": "OpenAdaptive",
"CmdMux": "Oldest", "Scheduler": "Fifo",
"RespQueue": "Fifo", "RequestBufferSize": 8,
"RefreshPolicy": "Bankwise", "CmdMux": "Oldest",
"RefreshMode": 1, "RespQueue": "Fifo",
"RefreshMaxPostponed": 8, "RefreshPolicy": "Bankwise",
"RefreshMaxPulledin": 8, "RefreshMaxPostponed": 8,
"PowerDownPolicy": "NoPowerDown", "RefreshMaxPulledin": 8,
"PowerDownTimeout": 100}} "PowerDownPolicy": "NoPowerDown",
"PowerDownTimeout": 100
}
}

48
README.md
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@@ -91,23 +91,14 @@ The JSON code below shows an example configuration:
} }
} }
``` ```
Fields Description Fields Description:
- "simulationid": Simulation file identifier - "simulationid": Simulation file identifier
- "simconfig": Configuration file for the DRAMSys Simulator - "simconfig": Configuration file for the DRAMSys Simulator
- "thermalconfig": Temperature Simulator Configuration File - "thermalconfig": Temperature Simulator Configuration File
- "memspec": Memory Device Specification File - "memspec": Memory Device Specification File
- "addressmapping": Addressmapping Configuration of the Memory Controller File. - "addressmapping": Addressmapping Configuration of the Memory Controller File.
- "mcconfig": Memory Controller Configuration File. - "mcconfig": Memory Controller Configuration File.
- "tracesetup": The trace setup is only used in standalone mode. In library mode the trace setup is ignored. Each device should be added as a json object inside the "tracesetup" array.
- "tracesetup": The trace setup is only used in standalone mode. In library mode the trace setup is ignored.
Each device should be added as a json object inside the "tracesetup" array.
Each **trace setup** device configuration consists of two parameters, **clkMhz** (operation frequency of the **trace player**) and a trace file **name**. Most configuration fields reference other JSON files which contain more specialized chunks of the configuration like a memory specification, an address mapping and a memory controller configuration. Each **trace setup** device configuration consists of two parameters, **clkMhz** (operation frequency of the **trace player**) and a trace file **name**. Most configuration fields reference other JSON files which contain more specialized chunks of the configuration like a memory specification, an address mapping and a memory controller configuration.
@@ -251,11 +242,9 @@ The content of [config.json](DRAMSys/library/resources/configs/thermalsim/config
- "Celsius" - "Celsius"
- "Fahrenheit" - "Fahrenheit"
- "Kelvin" - "Kelvin"
- *StaticTemperatureDefaultValue* (int) - *StaticTemperatureDefaultValue* (int)
- Temperature value for simulations with static temperature - Temperature value for simulations with static temperature
- *ThermalSimPeriod* (double) - *ThermalSimPeriod* (double)
- Period of the thermal simulation - Period of the thermal simulation
- *ThermalSimUnit* (string) - *ThermalSimUnit* (string)
- "s": seconds - "s": seconds
@@ -264,20 +253,15 @@ The content of [config.json](DRAMSys/library/resources/configs/thermalsim/config
- "ns": nanoseconds - "ns": nanoseconds
- "ps": picoseconds - "ps": picoseconds
- "fs": femtoseconds - "fs": femtoseconds
- *PowerInfoFile* (string) - *PowerInfoFile* (string)
- File containing power related information: devices identifiers, initial power values and power thresholds. - File containing power related information: devices identifiers, initial power values and power thresholds.
- *IceServerIp* (string) - *IceServerIp* (string)
- 3D-ICE server IP address - 3D-ICE server IP address
- *IceServerPort* (unsigned int) - *IceServerPort* (unsigned int)
- 3D-ICE server port - 3D-ICE server port
- *SimPeriodAdjustFactor* (unsigned int) - *SimPeriodAdjustFactor* (unsigned int)
- When substantial changes in power occur (i.e., changes that exceed the thresholds), then the simulation period will be divided by this number causing the thermal simulation to be executed more often. - When substantial changes in power occur (i.e., changes that exceed the thresholds), then the simulation period will be divided by this number causing the thermal simulation to be executed more often.
- *NPowStableCyclesToIncreasePeriod* (unsigned int) - *NPowStableCyclesToIncreasePeriod* (unsigned int)
- Wait this number of thermal simulation cycles with power stability (i.e., changes that do not exceed the thresholds) to start increasing the simulation period back to its configured value. - Wait this number of thermal simulation cycles with power stability (i.e., changes that do not exceed the thresholds) to start increasing the simulation period back to its configured value.
- *GenerateTemperatureMap* (boolean) - *GenerateTemperatureMap* (boolean)
- true: generate temperature map files during thermal simulation - true: generate temperature map files during thermal simulation
@@ -289,16 +273,14 @@ The content of [config.json](DRAMSys/library/resources/configs/thermalsim/config
##### Memory Specification ##### Memory Specification
A file with memory specifications. Timings and currents come from data sheets and measurements, and usually do not change. A file with memory specifications. Timings and currents come from data sheets and measurements, and usually do not change.
The fields inside "mempowerspec" can be written directly as a **double** type. "memoryId" and "memoryType" are **string**. The others are **unsigned int**. The fields inside "mempowerspec" can be written directly as a **double** type. "memoryId" and "memoryType" are **string**. The others are **unsigned int**.
##### Address Mapping ##### Address Mapping
DRAMSys uses the **ConGen** [TODO congen source] format for address mappings. It provides bit-wise granularity. It also provides the possibility to XOR address bits in order to map page misses to different banks and reduce latencies. DRAMSys uses the **ConGen** [7] format for address mappings. It provides bit-wise granularity. It also provides the possibility to XOR address bits in order to map page misses to different banks and reduce latencies.
Used fields:
Used fields:
- "XOR": Defines an XOR connection of a "FIRST" and a "SECOND" bit - "XOR": Defines an XOR connection of a "FIRST" and a "SECOND" bit
- "BYTE_BIT": Address bits that are connected to the byte bits in ascending order - "BYTE_BIT": Address bits that are connected to the byte bits in ascending order
- "COLUMN_BIT": Address bits that are connected to the column bits in ascending order - "COLUMN_BIT": Address bits that are connected to the column bits in ascending order
@@ -339,7 +321,6 @@ An example follows.
"CmdMux": "Oldest", "CmdMux": "Oldest",
"RespQueue": "Fifo", "RespQueue": "Fifo",
"RefreshPolicy": "Rankwise", "RefreshPolicy": "Rankwise",
"RefreshMode": 1,
"RefreshMaxPostponed": 8, "RefreshMaxPostponed": 8,
"RefreshMaxPulledin": 8, "RefreshMaxPulledin": 8,
"PowerDownPolicy": "NoPowerDown", "PowerDownPolicy": "NoPowerDown",
@@ -369,8 +350,6 @@ An example follows.
- "NoRefresh": refresh disabled - "NoRefresh": refresh disabled
- "Rankwise": all-bank refresh commands, issued per rank - "Rankwise": all-bank refresh commands, issued per rank
- "Bankwise": per-bank refresh commands (only supported by LPDDR4, Wide I/O 2, GDDR5/5X/6, HBM2) - "Bankwise": per-bank refresh commands (only supported by LPDDR4, Wide I/O 2, GDDR5/5X/6, HBM2)
- *RefreshMode* (unsigned int) [TODO: move refresh mode to memspec]
- special refresh modes of DDR4, 1 ≙ x1, 2 ≙ x2, 4 ≙ x4
- *RefreshMaxPostponed* - *RefreshMaxPostponed*
- maximum number of refresh commands that can be postponed (usually 8, with per-bank refresh the number is automatically multiplied by the number of banks) - maximum number of refresh commands that can be postponed (usually 8, with per-bank refresh the number is automatically multiplied by the number of banks)
- *RefreshMaxPulledin* - *RefreshMaxPulledin*
@@ -499,3 +478,6 @@ M. Jung, M. Sadri, C. Weis, N. Wehn, L. Benini. VLSI-SoC, October, 2014, Playa d
[6] Retention Time Measurements and Modelling of Bit Error Rates of WIDE-I/O DRAM in MPSoCs [6] Retention Time Measurements and Modelling of Bit Error Rates of WIDE-I/O DRAM in MPSoCs
C. Weis, M. Jung, P. Ehses, C. Santos, P. Vivet, S. Goossens, M. Koedam, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2015, Grenoble, France. C. Weis, M. Jung, P. Ehses, C. Santos, P. Vivet, S. Goossens, M. Koedam, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2015, Grenoble, France.
[7] ConGen: An Application Specific DRAM Memory Controller Generator
M. Jung, I. Heinrich, M. Natale, D. M. Mathew, C. Weis, S. Krumke, N. Wehn. International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.