diff --git a/DRAMSys/library/src/simulation/AddressDecoder.cpp b/DRAMSys/library/src/simulation/AddressDecoder.cpp
index cd9321de..4179ca70 100644
--- a/DRAMSys/library/src/simulation/AddressDecoder.cpp
+++ b/DRAMSys/library/src/simulation/AddressDecoder.cpp
@@ -101,14 +101,44 @@ AddressDecoder::AddressDecoder(const Configuration& config, const DRAMSysConfigu
     maximumAddress = static_cast<uint64_t>(bytes) * columns * rows * banks
             * bankGroups * ranks * channels - 1;
 
+    auto totalAddressBits = static_cast<unsigned>(std::log2(maximumAddress));
+    for (unsigned bitPosition = 0; bitPosition < totalAddressBits; bitPosition++)
+    {
+        if (std::count(vChannelBits.begin(), vChannelBits.end(), bitPosition)
+                + std::count(vRankBits.begin(), vRankBits.end(), bitPosition)
+                + std::count(vBankGroupBits.begin(), vBankGroupBits.end(), bitPosition)
+                + std::count(vBankBits.begin(), vBankBits.end(), bitPosition)
+                + std::count(vRowBits.begin(), vRowBits.end(), bitPosition)
+                + std::count(vColumnBits.begin(), vColumnBits.end(), bitPosition)
+                + std::count(vByteBits.begin(), vByteBits.end(), bitPosition)
+                != 1)
+            SC_REPORT_FATAL("AddressDecoder", "Not all address bits occur exactly once");
+    }
+
+    const MemSpec& memSpec = *config.memSpec;
+
+    unsigned highestByteBit = *std::max_element(vByteBits.begin(), vByteBits.end());
+
+    for (unsigned bitPosition = 0; bitPosition <= highestByteBit; bitPosition++)
+    {
+        if (std::find(vByteBits.begin(), vByteBits.end(), bitPosition) == vByteBits.end())
+            SC_REPORT_FATAL("AddressDecoder", "Byte bits are not continuous starting from 0");
+    }
+
+    auto maxBurstLengthBits = static_cast<unsigned>(std::log2(memSpec.maxBurstLength));
+
+    for (unsigned bitPosition = highestByteBit + 1; bitPosition < highestByteBit + 1 + maxBurstLengthBits; bitPosition++)
+    {
+        if (std::find(vColumnBits.begin(), vColumnBits.end(), bitPosition) == vColumnBits.end())
+            SC_REPORT_FATAL("AddressDecoder", "No continuous column bits for maximum burst length");
+    }
+
     bankgroupsPerRank = bankGroups;
     bankGroups = bankgroupsPerRank * ranks;
 
     banksPerGroup = banks;
     banks = banksPerGroup * bankGroups;
 
-    const MemSpec& memSpec = *config.memSpec;
-
     if (memSpec.numberOfChannels != channels || memSpec.ranksPerChannel != ranks
         || memSpec.bankGroupsPerChannel != bankGroups || memSpec.banksPerChannel != banks
         || memSpec.rowsPerBank != rows || memSpec.columnsPerRow != columns
diff --git a/DRAMSys/library/src/simulation/Arbiter.cpp b/DRAMSys/library/src/simulation/Arbiter.cpp
index 57c545bf..39a911e6 100644
--- a/DRAMSys/library/src/simulation/Arbiter.cpp
+++ b/DRAMSys/library/src/simulation/Arbiter.cpp
@@ -139,6 +139,7 @@ tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload,
         payload.set_address(adjustedAddress);
 
         unsigned channel = addressDecoder.decodeChannel(adjustedAddress);
+        assert(addressDecoder.decodeChannel(adjustedAddress + payload.get_data_length() - 1) == channel);
         ArbiterExtension::setAutoExtension(payload, Thread(id), Channel(channel));
         payload.acquire();
     }