Merge branch 'config_refactor' into 'develop'

Configuration Refactoring

See merge request ems/astdm/modeling.dram/dram.sys.5!63
This commit is contained in:
Lukas Steiner
2024-02-23 14:29:06 +00:00
117 changed files with 2557 additions and 3035 deletions

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@@ -36,7 +36,6 @@
#include <gtest/gtest.h>
#include <DRAMSys/simulation/DRAMSys.h>
#include <DRAMSys/simulation/dram/Dram.h>
class SystemCTest : public testing::Test
{
@@ -92,7 +91,7 @@ struct BlockingInitiator : sc_core::sc_module
sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
iSocket->b_transport(payload, delay);
EXPECT_EQ(delay, dramSys.getConfig().blockingReadDelay);
EXPECT_EQ(delay, dramSys.getMcConfig().blockingReadDelay);
}
void writeAccess()
@@ -105,7 +104,7 @@ struct BlockingInitiator : sc_core::sc_module
sc_core::sc_time delay = sc_core::SC_ZERO_TIME;
iSocket->b_transport(payload, delay);
EXPECT_EQ(delay, dramSys.getConfig().blockingWriteDelay);
EXPECT_EQ(delay, dramSys.getMcConfig().blockingWriteDelay);
}
};

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@@ -138,8 +138,6 @@
"DatabaseRecording": true,
"Debug": false,
"EnableWindowing": false,
"ErrorCSVFile": "",
"ErrorChipSeed": 42,
"PowerAnalysis": false,
"SimulationName": "example",
"SimulationProgressBar": true,

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@@ -136,8 +136,6 @@
"DatabaseRecording": true,
"Debug": false,
"EnableWindowing": false,
"ErrorCSVFile": "",
"ErrorChipSeed": 42,
"PowerAnalysis": false,
"SimulationName": "example",
"SimulationProgressBar": true,