diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 700ec923..9011e4ab 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -19,8 +19,8 @@ build:
         - rm -rf build
         - mkdir -p build
         - cd build
-        - qmake ../DRAMSys/DRAMSys.pro
-        - make -j4
+        - cmake ../DRAMSys
+        - make -j16
         - find . -name "*.o" -type f -delete
         - rm -rf ${CI_PROJECT_DIR}/coverage
         - mkdir -p ${CI_PROJECT_DIR}/coverage
diff --git a/DRAMSys/CMakeLists.txt b/DRAMSys/CMakeLists.txt
index 9ce35df7..12373237 100644
--- a/DRAMSys/CMakeLists.txt
+++ b/DRAMSys/CMakeLists.txt
@@ -39,22 +39,16 @@ project(DRAMSys)
 set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version")
 set(DCMAKE_SH "CMAKE_SH-NOTFOUND" CACHE STRING "Ignore sh.exe error on Windows")
 
-# Add sqlite3 Dependency:
-set(BUILD_ENABLE_RTREE ON CACHE BOOL "Enable R-Tree Feature")
-set(BUILD_ENABLE_RTREE ON)
-add_subdirectory(library/src/common/third_party/sqlite-amalgamation)
-
 # Add DRAMSysLibrary:
 add_subdirectory(library)
 
 # Add TraceAnalyzer:
 add_subdirectory(traceAnalyzer)
 
-# Build:
-add_executable(DRAMSys simulator/main.cpp)
-target_include_directories(DRAMSys
-    PUBLIC library/src/simulation/
-    PUBLIC library/src/common/third_party/sqlite-amalgamation/
-)
-target_link_libraries(DRAMSys sqlite3::sqlite3 systemc DRAMSysLibrary)
+# Add DRAMSysSimulator:
+add_subdirectory(simulator)
 
+# Add DRAMSysgem5
+if(DEFINED ENV{GEM5})
+    add_subdirectory(gem5)
+endif()
diff --git a/DRAMSys/gem5/CMakeLists.txt b/DRAMSys/gem5/CMakeLists.txt
new file mode 100644
index 00000000..8be2455d
--- /dev/null
+++ b/DRAMSys/gem5/CMakeLists.txt
@@ -0,0 +1,70 @@
+# Copyright (c) 2020, Technische Universität Kaiserslautern
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+#    this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+#    contributors may be used to endorse or promote products derived from
+#    this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Author: Lukas Steiner
+
+cmake_minimum_required(VERSION 3.10)
+
+set(GEM5_ARCH ARM) # ARM, X86, ALPHA
+set(GEM5_VARIANT opt) # opt, fast
+
+# Configuration:
+set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version")
+set(DCMAKE_SH="CMAKE_SH-NOTFOUND")
+
+find_library(GEM5_LIBRARY gem5_${GEM5_VARIANT} PATH $ENV{GEM5}/build/${GEM5_ARCH}/)
+
+add_executable(DRAMSys_gem5 
+    main.cpp
+    $ENV{GEM5}/util/systemc/sc_logger.cc
+    $ENV{GEM5}/util/systemc/sc_module.cc
+    $ENV{GEM5}/util/systemc/stats.cc
+    $ENV{GEM5}/util/tlm/src/sc_master_port.cc
+    $ENV{GEM5}/util/tlm/src/sc_slave_port.cc
+    $ENV{GEM5}/util/tlm/src/slave_transactor.cc
+    $ENV{GEM5}/util/tlm/src/sc_ext.cc
+    $ENV{GEM5}/util/tlm/src/sc_mm.cc
+    $ENV{GEM5}/util/tlm/src/sim_control.cc
+)
+
+target_include_directories(DRAMSys_gem5
+    PRIVATE $ENV{GEM5}/build/ARM/
+    PRIVATE $ENV{GEM5}/util/tlm/examples/slave_port/
+    PRIVATE $ENV{GEM5}/util/tlm/examples/common/
+    PRIVATE $ENV{GEM5}/util/tlm/src/
+    PRIVATE $ENV{GEM5}/util/systemc/
+    PRIVATE ../library/src/simulation/
+)
+
+target_link_libraries(DRAMSys_gem5 
+    ${SYSTEMC_LIBRARY} 
+    DRAMSysLibrary 
+    ${GEM5_LIBRARY}
+)
diff --git a/DRAMSys/gem5/gem5.pro b/DRAMSys/gem5/gem5.pro
deleted file mode 100644
index 031a3e86..00000000
--- a/DRAMSys/gem5/gem5.pro
+++ /dev/null
@@ -1,167 +0,0 @@
-TARGET = DRAMSys_gem5
-TEMPLATE = app
-CONFIG += console
-CONFIG -= app_bundle
-CONFIG -= qt
-
-# gem5 parameters:
-gem5_arch = 'ARM'
-gem5_variant = 'opt'
-gem5_root = $$(GEM5)
-
-systemc_home = $$(SYSTEMC_HOME)
-isEmpty(systemc_home) {
-    systemc_home = /opt/systemc
-}
-message(SystemC home is $${systemc_home})
-
-systemc_target_arch = $$(SYSTEMC_TARGET_ARCH)
-isEmpty(systemc_target_arch) {
-    systemc_target_arch = linux64
-}
-
-message(SystemC target architecture is $${systemc_target_arch})
-
-unix:!macx {
-        message(Building on a GNU/Linux)
-        QMAKE_RPATHDIR += $${systemc_home}/lib-$${systemc_target_arch}
-        QMAKE_RPATHDIR += $${gem5_root}/build/$${gem5_arch}
-        message(Linker options QMAKE_RPATHDIR is $${QMAKE_RPATHDIR})
-}
-
-DEFINES += TIXML_USE_STL
-DEFINES += SC_INCLUDE_DYNAMIC_PROCESSES
-DEFINES += DRAMSYS_GEM5
-
-dramsys_disable_coverage_check = $$(DRAMSYS_DISABLE_COVERAGE_CHECK)
-isEmpty(dramsys_disable_coverage_check) {
-	coverage_check = true
-    message(Coverage check ENABLED)
-} else {
-	coverage_check = false
-    message(Coverage check DISABLED)
-}
-
-unix:!macx {
-	QMAKE_CXXFLAGS += -std=c++11 -O0 -g
-	$$eval(coverage_check) {
-		QMAKE_CXXFLAGS += -fprofile-arcs -ftest-coverage -fPIC -O0
-		QMAKE_LFLAGS += -lgcov --coverage
-	}
-}
-
-macx: {
-	CONFIG += c++11
-	QMAKE_CXXFLAGS += -std=c++0x -stdlib=libc++ -O0 -g
-	$$eval(coverage_check) {
-		QMAKE_CXXFLAGS += --coverage
-		QMAKE_LFLAGS += --coverage
-	}
-}
-
-INCLUDEPATH += ../library/src/simulation/
-INCLUDEPATH += $${systemc_home}/include
-INCLUDEPATH += ../library/src/common/third_party/DRAMPower/src
-INCLUDEPATH += ../library/src/common/third_party/DRAMPower/src/libdrampower
-INCLUDEPATH += $${gem5_root}/build/$${gem5_arch}/
-INCLUDEPATH += $${gem5_root}/util/tlm/examples/slave_port
-INCLUDEPATH += $${gem5_root}/util/tlm/examples/common
-INCLUDEPATH += $${gem5_root}/util/tlm/src/
-INCLUDEPATH += $${gem5_root}/util/systemc
-
-LIBS += -L$${systemc_home}/lib-$${systemc_target_arch} -lsystemc
-LIBS += ../library/libDRAMSys.a
-LIBS += ../../DRAMSys/library/src/common/third_party/DRAMPower/src/libdrampower.a
-LIBS += -lsqlite3
-LIBS += -L$${gem5_root}/build/$${gem5_arch} -lgem5_$${gem5_variant}
-
-SOURCES += $${gem5_root}/util/systemc/sc_gem5_control.cc
-SOURCES += $${gem5_root}/util/systemc/sc_logger.cc
-SOURCES += $${gem5_root}/util/systemc/sc_module.cc
-SOURCES += $${gem5_root}/util/systemc/stats.cc
-SOURCES += $${gem5_root}/util/tlm/examples/common/cli_parser.cc
-SOURCES += $${gem5_root}/util/tlm/examples/common/report_handler.cc
-SOURCES += $${gem5_root}/util/tlm/src/master_transactor.cc
-SOURCES += $${gem5_root}/util/tlm/src/sc_master_port.cc
-SOURCES += $${gem5_root}/util/tlm/src/sc_slave_port.cc
-SOURCES += $${gem5_root}/util/tlm/src/slave_transactor.cc
-SOURCES += $${gem5_root}/util/tlm/src/sc_ext.cc
-SOURCES += $${gem5_root}/util/tlm/src/sc_mm.cc
-SOURCES += $${gem5_root}/util/tlm/src/sim_control.cc
-
-SOURCES += main.cpp
-
-DISTFILES += ../DRAMSys.astylerc
-
-DISTFILES += etrace_single/config.ini
-DISTFILES += etrace_single_L2/HPCG-47MB/config.ini
-DISTFILES += etrace_single_L2/Pathfinder/config.ini
-DISTFILES += etrace_single_L2/hpcc-linpack/config.ini
-DISTFILES += etrace_single_L2/hpcc-fft/config.ini
-DISTFILES += etrace_single_L2/config.ini
-DISTFILES += etrace_single_L2/hpcc-dgemm/config.ini
-DISTFILES += etrace_single_L2/hpcc-gups/config.ini
-DISTFILES += configs/singleElasticTraceReplayWithL2.ini
-DISTFILES += configs/nvdimmp.ini
-DISTFILES += configs/hello.ini
-DISTFILES += configs/dualElasticTraceReplay.ini
-DISTFILES += configs/singleElasticTraceReplay.ini
-DISTFILES += configs/boot_linux.ini
-DISTFILES += gem5_fs/stream/config.ini
-DISTFILES += gem5_fs/stream/stream_1_cores.rcS
-DISTFILES += gem5_fs/parsec/simmedium/fluidanimate/fluidanimate_simmedium_2.rcS
-DISTFILES += gem5_fs/parsec/simmedium/fluidanimate/config.ini
-DISTFILES += gem5_fs/parsec/simmedium/ferret/config.ini
-DISTFILES += gem5_fs/parsec/simmedium/ferret/ferret_simmedium_2.rcS
-DISTFILES += gem5_fs/parsec/simmedium/blackscholes/blackscholes_simmedium_2.rcS
-DISTFILES += gem5_fs/parsec/simmedium/blackscholes/config.ini
-DISTFILES += gem5_fs/parsec/simlarge/streamcluster/config.ini
-DISTFILES += gem5_fs/parsec/simlarge/streamcluster/streamcluster_simlarge_2.rcS
-DISTFILES += gem5_fs/parsec/simsmall/fluidanimate/fluidanimate_simsmall_2.rcS
-DISTFILES += gem5_fs/parsec/simsmall/fluidanimate/config.ini
-DISTFILES += gem5_fs/parsec/simsmall/bodytrack/bodytrack_simsmall_2.rcS
-DISTFILES += gem5_fs/parsec/simsmall/bodytrack/config.ini
-DISTFILES += gem5_fs/parsec/simsmall/ferret/config.ini
-DISTFILES += gem5_fs/parsec/simsmall/ferret/ferret_simsmall_2.rcS
-DISTFILES += gem5_fs/parsec/simsmall/blackscholes/config.ini
-DISTFILES += gem5_fs/parsec/simsmall/blackscholes/blackscholes_simsmall_2.rcS
-DISTFILES += gem5_fs/parsec/simdev/fluidanimate/config.ini
-DISTFILES += gem5_fs/parsec/simdev/fluidanimate/fluidanimate_simdev_2.rcS
-DISTFILES += gem5_fs/parsec/simdev/blackscholes/blackscholes_simdev_2.rcS
-DISTFILES += gem5_fs/parsec/simdev/blackscholes/config.ini
-DISTFILES += examples/tlm_elastic_slave.py
-DISTFILES += examples/tlm_elastic_slave_mc_direct.py
-DISTFILES += examples/tlm_elastic_slave_with_l2.py
-DISTFILES += gem5_se/almabench/config.ini
-DISTFILES += gem5_se/fldry/config.ini
-DISTFILES += gem5_se/Queens/config.ini
-DISTFILES += gem5_se/chomp/config.ini
-DISTFILES += gem5_se/l1_cache/Queens/config.ini
-DISTFILES += gem5_se/l1_cache/chomp/config.ini
-DISTFILES += gem5_se/l1_cache/Puzzle/config.ini
-DISTFILES += gem5_se/l1_cache/RealMM/config.ini
-DISTFILES += gem5_se/l1_cache/Perm/config.ini
-DISTFILES += gem5_se/l1_cache/Treesort/config.ini
-DISTFILES += gem5_se/l1_cache/Bubblesort/config.ini
-DISTFILES += gem5_se/l1_cache/misr/config.ini
-DISTFILES += gem5_se/l1_cache/exptree/config.ini
-DISTFILES += gem5_se/l1_cache/Quicksort/config.ini
-DISTFILES += gem5_se/l1_cache/IntMM/config.ini
-DISTFILES += gem5_se/l1_cache/Oscar/config.ini
-DISTFILES += gem5_se/l1_cache/FloatMM/config.ini
-DISTFILES += gem5_se/l1_cache/Towers/config.ini
-DISTFILES += gem5_se/run.sh
-DISTFILES += gem5_se/Puzzle/config.ini
-DISTFILES += gem5_se/RealMM/config.ini
-DISTFILES += gem5_se/Perm/config.ini
-DISTFILES += gem5_se/Treesort/config.ini
-DISTFILES += gem5_se/Bubblesort/config.ini
-DISTFILES += gem5_se/misr/config.ini
-DISTFILES += gem5_se/lpbench/config.ini
-DISTFILES += gem5_se/8_cores/config.ini
-DISTFILES += gem5_se/exptree/config.ini
-DISTFILES += gem5_se/Quicksort/config.ini
-DISTFILES += gem5_se/IntMM/config.ini
-DISTFILES += gem5_se/Oscar/config.ini
-DISTFILES += gem5_se/FloatMM/config.ini
-DISTFILES += gem5_se/Towers/config.ini
diff --git a/DRAMSys/gem5/main.cpp b/DRAMSys/gem5/main.cpp
index 80a5b82a..fd521ef3 100644
--- a/DRAMSys/gem5/main.cpp
+++ b/DRAMSys/gem5/main.cpp
@@ -51,6 +51,7 @@
 #include "stats.hh"
 
 using namespace std;
+using namespace tlm;
 
 class Gem5SimControlDRAMsys: public Gem5SystemC::Gem5SimControl
 {
diff --git a/DRAMSys/library/CMakeLists.txt b/DRAMSys/library/CMakeLists.txt
index 1b7ce7d4..9d7f2d43 100644
--- a/DRAMSys/library/CMakeLists.txt
+++ b/DRAMSys/library/CMakeLists.txt
@@ -35,6 +35,15 @@ cmake_minimum_required(VERSION 3.10)
 # Project Name
 project(DRAMSysLibrary)
 
+# Configuration:
+set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version")
+set(DCMAKE_SH="CMAKE_SH-NOTFOUND")
+
+# Add sqlite3 Dependency:
+set(BUILD_ENABLE_RTREE ON CACHE BOOL "Enable R-Tree Feature")
+set(BUILD_ENABLE_RTREE ON)
+add_subdirectory(src/common/third_party/sqlite-amalgamation)
+
 # Add DRAMPower:
 add_subdirectory(src/common/third_party/DRAMPower)
 
@@ -42,12 +51,18 @@ add_subdirectory(src/common/third_party/DRAMPower)
 add_subdirectory(src/common/third_party/nlohmann)
 
 # Add SystemC:
-set(BUILD_SHARED_LIBS OFF CACHE BOOL "Build Shared Libs")
-add_subdirectory(src/common/third_party/systemc)
-
-# Configuration:
-set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version")
-set(DCMAKE_SH="CMAKE_SH-NOTFOUND")
+if(DEFINED ENV{SYSTEMC_HOME})
+    find_library(SYSTEMC_LIBRARY 
+        NAMES systemc SnpsVP 
+        PATHS $ENV{SYSTEMC_HOME}/lib-$ENV{SYSTEMC_TARGET_ARCH}/ $ENV{SYSTEMC_HOME}/lib-linux64/ $ENV{SYSTEMC_HOME}/libso-$ENV{COWARE_CXX_COMPILER}/
+    )
+    message("Building with external SystemC located in $ENV{SYSTEMC_HOME}")
+else()
+    set(BUILD_SHARED_LIBS OFF CACHE BOOL "Build Shared Libs")
+    add_subdirectory(src/common/third_party/systemc)
+    set(SYSTEMC_LIBRARY systemc)
+    message("Building with SystemC submodule")
+endif()
 
 include_directories(
     src/common
@@ -165,11 +180,14 @@ add_library(DRAMSysLibrary
 
 # Build:
 target_include_directories(DRAMSysLibrary
-    PUBLIC src/common/third_party/DRAMPower/src
+    PUBLIC src/common/third_party/DRAMPower/src/
     PUBLIC src/common/third_party/sqlite-amalgamation/
+    PUBLIC $ENV{SYSTEMC_HOME}/include/
+    PUBLIC $ENV{SYSTEMC_HOME}/include/tlm/
 )
+
 target_link_libraries(DRAMSysLibrary
-    SystemC::systemc
+    ${SYSTEMC_LIBRARY}    
     sqlite3::sqlite3
     DRAMPower
 )
diff --git a/DRAMSys/library/src/controller/Command.cpp b/DRAMSys/library/src/controller/Command.cpp
index 88e64544..9b43125c 100644
--- a/DRAMSys/library/src/controller/Command.cpp
+++ b/DRAMSys/library/src/controller/Command.cpp
@@ -43,7 +43,7 @@ using namespace DRAMPower;
 
 std::string commandToString(Command command)
 {  
-    assert(command >= 0 && command <= 15);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
     static std::array<std::string, 16> stringOfCommand =
             {"NOP",
             "RD",
@@ -71,7 +71,7 @@ unsigned numberOfCommands()
 
 tlm_phase commandToPhase(Command command)
 {
-    assert(command >= 0 && command <= 15);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
     static std::array<tlm_phase, 16> phaseOfCommand =
             {UNINITIALIZED_PHASE,
             BEGIN_RD,
@@ -94,7 +94,7 @@ tlm_phase commandToPhase(Command command)
 
 Command phaseToCommand(tlm_phase phase)
 {
-    assert(phase >= 5 && phase <= 19);
+    assert(phase >= BEGIN_RD && phase <= END_SREF);
     static std::array<Command, 16> commandOfPhase =
             {Command::RD,
             Command::WR,
@@ -111,12 +111,12 @@ Command phaseToCommand(tlm_phase phase)
             Command::PDXP,
             Command::SREFEN,
             Command::SREFEX};
-    return commandOfPhase[phase - 5];
+    return commandOfPhase[phase - BEGIN_RD];
 }
 
 MemCommand::cmds phaseToDRAMPowerCommand(tlm_phase phase)
 {
-    assert(phase >= 5 && phase <= 19);
+    assert(phase >= BEGIN_RD && phase <= END_SREF);
     static std::array<MemCommand::cmds, 16> phaseOfCommand =
             {MemCommand::RD,
             MemCommand::WR,
@@ -133,40 +133,40 @@ MemCommand::cmds phaseToDRAMPowerCommand(tlm_phase phase)
             MemCommand::PUP_PRE,
             MemCommand::SREN,
             MemCommand::SREX};
-    return phaseOfCommand[phase - 5];
+    return phaseOfCommand[phase - BEGIN_RD];
 }
 
 bool phaseNeedsEnd(tlm_phase phase)
 {
-    return (phase >= 5 && phase <= 13);
+    return (phase >= BEGIN_RD && phase <= BEGIN_REFA);
 }
 
 tlm_phase getEndPhase(tlm_phase phase)
 {
-    assert(phase >= 5 && phase <= 13);
+    assert(phase >= BEGIN_RD && phase <= BEGIN_REFA);
     return (phase + 15);
 }
 
 bool isBankCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command <= 7);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command <= Command::REFB);
 }
 
 bool isRankCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command >= 8);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command >= Command::PREA);
 }
 
 bool isCasCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command <= 4);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command <= Command::WRA);
 }
 
 bool isRasCommand(Command command)
 {
-    assert(command >= 0 && command <= 15);
-    return (command >= 5);
+    assert(command >= Command::NOP && command <= Command::SREFEX);
+    return (command >= Command::PRE);
 }
diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp
index e0190723..dfaf36fc 100644
--- a/DRAMSys/library/src/controller/Controller.cpp
+++ b/DRAMSys/library/src/controller/Controller.cpp
@@ -333,18 +333,16 @@ void Controller::controllerMethod()
 tlm_sync_enum Controller::nb_transport_fw(tlm_generic_payload &trans,
                               tlm_phase &phase, sc_time &delay)
 {
-    sc_time notificationDelay = delay;
+    sc_time notificationDelay = delay + Configuration::getInstance().memSpec->tCK;
 
     if (phase == BEGIN_REQ)
     {
-        notificationDelay += Configuration::getInstance().memSpec->tCK;
         payloadToAcquire = &trans;
         timeToAcquire = sc_time_stamp() + notificationDelay;
         beginReqEvent.notify(notificationDelay);
     }
     else if (phase = END_RESP)
     {
-        notificationDelay += Configuration::getInstance().memSpec->tCK;
         timeToRelease = sc_time_stamp() + notificationDelay;
         endRespEvent.notify(notificationDelay);
     }
@@ -364,10 +362,9 @@ tlm_sync_enum Controller::nb_transport_bw(tlm_generic_payload &,
     return TLM_ACCEPTED;
 }
 
-unsigned int Controller::transport_dbg(tlm_generic_payload &)
+unsigned int Controller::transport_dbg(tlm_generic_payload &trans)
 {
-    SC_REPORT_FATAL("Controller", "Debug Transport not supported");
-    return 0;
+    return iSocket->transport_dbg(trans);
 }
 
 void Controller::finishBeginReq()
diff --git a/DRAMSys/library/src/controller/ControllerRecordable.cpp b/DRAMSys/library/src/controller/ControllerRecordable.cpp
index bcfbc836..638803fa 100644
--- a/DRAMSys/library/src/controller/ControllerRecordable.cpp
+++ b/DRAMSys/library/src/controller/ControllerRecordable.cpp
@@ -44,11 +44,11 @@ tlm_sync_enum ControllerRecordable::nb_transport_fw(tlm_generic_payload &trans,
     return Controller::nb_transport_fw(trans, phase, delay);
 }
 
-tlm_sync_enum ControllerRecordable::nb_transport_bw(tlm_generic_payload &trans,
-                              tlm_phase &phase, sc_time &delay)
+tlm_sync_enum ControllerRecordable::nb_transport_bw(tlm_generic_payload &,
+                              tlm_phase &, sc_time &)
 {
-    recordPhase(trans, phase, delay);
-    return Controller::nb_transport_bw(trans, phase, delay);
+    SC_REPORT_FATAL("Controller", "nb_transport_bw of controller must not be called");
+    return TLM_ACCEPTED;
 }
 
 void ControllerRecordable::sendToFrontend(tlm_generic_payload *payload, tlm_phase phase)
diff --git a/DRAMSys/library/src/simulation/Arbiter.cpp b/DRAMSys/library/src/simulation/Arbiter.cpp
index 73810df7..b273485d 100644
--- a/DRAMSys/library/src/simulation/Arbiter.cpp
+++ b/DRAMSys/library/src/simulation/Arbiter.cpp
@@ -76,6 +76,7 @@ tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload,
 
     if (phase == BEGIN_REQ)
     {
+        // TODO: do not adjust address permanently
         // adjust address offset:
         payload.set_address(payload.get_address() -
                             Configuration::getInstance().addressOffset);
@@ -87,8 +88,8 @@ tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload,
     }
     else if (phase == END_RESP)
     {
+        // TODO: why one additional cycle???
         notDelay += Configuration::getInstance().memSpec->tCK;
-        payload.release();
     }
 
     PRINTDEBUGMESSAGE(name(), "[fw] " + phaseNameToString(phase) + " notification in " +
@@ -103,8 +104,7 @@ tlm_sync_enum Arbiter::nb_transport_bw(int channelId, tlm_generic_payload &paylo
                               tlm_phase &phase, sc_time &bwDelay)
 {
     // Check channel ID
-    if ((unsigned int)channelId != DramExtension::getExtension(payload).getChannel().ID())
-        SC_REPORT_FATAL("Arbiter", "Payload extension was corrupted");
+    assert((unsigned int)channelId == DramExtension::getExtension(payload).getChannel().ID());
 
     PRINTDEBUGMESSAGE(name(), "[bw] " + phaseNameToString(phase) + " notification in " +
                       bwDelay.to_string());
@@ -124,39 +124,51 @@ unsigned int Arbiter::transport_dbg(int /*id*/, tlm::tlm_generic_payload &trans)
 
 void Arbiter::peqCallback(tlm_generic_payload &payload, const tlm_phase &phase)
 {
-    unsigned int initiatorSocket = DramExtension::getExtension(
-                                       payload).getThread().ID();
+    unsigned int threadId = DramExtension::getExtension(payload).getThread().ID();
     unsigned int channelId = DramExtension::getExtension(payload).getChannel().ID();
 
-    // Check the valid range of initiatorSocket ID and channel Id
-    // TODO: initiatorSocket ID not checked
+    // Check the valid range of thread ID and channel Id
+    // TODO: thread ID not checked
     assert(channelId < Configuration::getInstance().numberOfMemChannels);
 
     // Phases initiated by the intiator side from arbiter's point of view (devices performing memory requests to the arbiter)
     if (phase == BEGIN_REQ)
     {
-        if (channelIsFree[channelId]) {
+        if (channelIsFree[channelId])
+        {
             // This channel was available. Forward the new transaction to the memory controller.
             channelIsFree[channelId] = false;
-            sendToChannel(channelId, payload, phase, SC_ZERO_TIME);
-        } else {
+            tlm_phase tPhase = BEGIN_REQ;
+            sc_time tDelay = SC_ZERO_TIME;
+            iSocket[channelId]->nb_transport_fw(payload, tPhase, tDelay);
+            // TODO: early completion of channel controller!!!
+        }
+        else
+        {
             // This channel is busy. Enqueue the new transaction which phase is BEGIN_REQ.
             pendingRequests[channelId].push(&payload);
         }
     }
     // Phases initiated by the target side from arbiter's point of view (memory side)
-    else if (phase == END_REQ) {
+    else if (phase == END_REQ)
+    {
         channelIsFree[channelId] = true;
 
         // The arbiter receives a transaction which phase is END_REQ from memory controller and forwards it to the requester device.
-        sendToInitiator(initiatorSocket, payload, phase, SC_ZERO_TIME);
+        tlm_phase tPhase = END_REQ;
+        sc_time tDelay = SC_ZERO_TIME;
+        tSocket[threadId]->nb_transport_bw(payload, tPhase, tDelay);
 
         // This channel is now free! Dispatch a new transaction (phase is BEGIN_REQ) from the queue, if any. Send it to the memory controller.
-        if (!pendingRequests[channelId].empty()) {
-            tlm_generic_payload *payloadToSend = pendingRequests[channelId].front();
-            pendingRequests[channelId].pop();
+        if (!pendingRequests[channelId].empty())
+        {
             // Send ONE of the enqueued new transactions (phase is BEGIN_REQ) through this channel.
-            sendToChannel(channelId, *payloadToSend, BEGIN_REQ, SC_ZERO_TIME);
+            tlm_generic_payload &payloadToSend = *pendingRequests[channelId].front();
+            pendingRequests[channelId].pop();
+            tlm_phase tPhase = BEGIN_REQ;
+            sc_time tDelay = SC_ZERO_TIME;
+            iSocket[channelId]->nb_transport_fw(payloadToSend, tPhase, tDelay);
+            // TODO: early completion of channel controller
             // Mark the channel as busy again.
             channelIsFree[channelId] = false;
         }
@@ -166,26 +178,48 @@ void Arbiter::peqCallback(tlm_generic_payload &payload, const tlm_phase &phase)
         // The arbiter receives a transaction in BEGIN_RESP phase
         // (that came from the memory side) and forwards it to the requester
         // device
-        if (receivedResponses[initiatorSocket].empty()) {
-            sendToInitiator(initiatorSocket, payload, phase, SC_ZERO_TIME);
+        if (pendingResponses[threadId].empty())
+        {
+            tlm_phase tPhase = BEGIN_RESP;
+            sc_time tDelay = SC_ZERO_TIME;
+            tlm_sync_enum returnValue = tSocket[threadId]->nb_transport_bw(payload, tPhase, tDelay);
+            if (returnValue != TLM_ACCEPTED)
+            {
+                tPhase = END_RESP;
+                payloadEventQueue.notify(payload, tPhase, tDelay);
+            }
         }
+
         // Enqueue the transaction in BEGIN_RESP phase until the initiator
-        // device acknowledge it (phase changes to END_RESP).
-        receivedResponses[initiatorSocket].push(&payload);
+        // device acknowledges it (phase changes to END_RESP).
+        pendingResponses[threadId].push(&payload);
     }
     else if (phase == END_RESP)
     {
         // Send the END_RESP message to the memory
-        sendToChannel(channelId, payload, phase, SC_ZERO_TIME);
+        {
+            tlm_phase tPhase = END_RESP;
+            sc_time tDelay = SC_ZERO_TIME;
+            iSocket[channelId]->nb_transport_fw(payload, tPhase, tDelay);
+        }
         // Drop one element of the queue of BEGIN_RESP from memory to this device
-        receivedResponses[initiatorSocket].pop();
+        pendingResponses[threadId].pop();
+        payload.release();
 
         // Check if there are queued transactoins with phase BEGIN_RESP from memory to this device
-        if (!receivedResponses[initiatorSocket].empty()) {
+        if (!pendingResponses[threadId].empty())
+        {
             // The queue is not empty.
-            tlm_generic_payload *payloadToSend = receivedResponses[initiatorSocket].front();
+            tlm_generic_payload &payloadToSend = *pendingResponses[threadId].front();
             // Send ONE extra BEGIN_RESP to the device
-            sendToInitiator(initiatorSocket, *payloadToSend, BEGIN_RESP, SC_ZERO_TIME);
+            tlm_phase tPhase = BEGIN_RESP;
+            sc_time tDelay = SC_ZERO_TIME;
+            tlm_sync_enum returnValue = tSocket[threadId]->nb_transport_bw(payloadToSend, tPhase, tDelay);
+            if (returnValue != TLM_ACCEPTED)
+            {
+                tPhase = END_RESP;
+                payloadEventQueue.notify(payloadToSend, tPhase, tDelay);
+            }
         }
     }
     else
@@ -193,22 +227,6 @@ void Arbiter::peqCallback(tlm_generic_payload &payload, const tlm_phase &phase)
             "Payload event queue in arbiter was triggered with unknown phase");
 }
 
-void Arbiter::sendToChannel(unsigned int channelId, tlm_generic_payload &payload,
-                   const tlm_phase &phase, const sc_time &delay)
-{
-    tlm_phase TPhase = phase;
-    sc_time TDelay = delay;
-    iSocket[channelId]->nb_transport_fw(payload, TPhase, TDelay);
-}
-
-void Arbiter::sendToInitiator(unsigned int id, tlm_generic_payload &payload,
-                     const tlm_phase &phase, const sc_time &delay)
-{
-    tlm_phase TPhase = phase;
-    sc_time TDelay = delay;
-    tSocket[id]->nb_transport_bw(payload, TPhase, TDelay);
-}
-
 void Arbiter::appendDramExtension(int socketId, tlm_generic_payload &payload)
 {
     // Append Generation Extension
diff --git a/DRAMSys/library/src/simulation/Arbiter.h b/DRAMSys/library/src/simulation/Arbiter.h
index 2e0ab39d..1bb12de7 100644
--- a/DRAMSys/library/src/simulation/Arbiter.h
+++ b/DRAMSys/library/src/simulation/Arbiter.h
@@ -71,7 +71,7 @@ private:
     std::vector<std::queue<tlm::tlm_generic_payload *>> pendingRequests;
     // used to account for the response_accept_delay in the initiators (traceplayer, core etc.)
     // This is a queue of responses comming from the memory side. The phase of these transactions is BEGIN_RESP.
-    std::map<unsigned int, std::queue<tlm::tlm_generic_payload *>> receivedResponses;
+    std::map<unsigned int, std::queue<tlm::tlm_generic_payload *>> pendingResponses;
 
     // Initiated by initiator side
     // This function is called when an arbiter's target socket receives a transaction from a device
@@ -87,12 +87,6 @@ private:
 
     void peqCallback(tlm::tlm_generic_payload &payload, const tlm::tlm_phase &phase);
 
-    void sendToChannel(unsigned int channelId, tlm::tlm_generic_payload &payload,
-                       const tlm::tlm_phase &phase, const sc_time &delay);
-
-    void sendToInitiator(unsigned int id, tlm::tlm_generic_payload &payload,
-                         const tlm::tlm_phase &phase, const sc_time &delay);
-
     void appendDramExtension(int socketId, tlm::tlm_generic_payload &payload);
     std::vector<uint64_t> nextPayloadID;
 };
diff --git a/DRAMSys/pct/buildDRAMSys.sh b/DRAMSys/pct/buildDRAMSys.sh
deleted file mode 100755
index 7b578cc9..00000000
--- a/DRAMSys/pct/buildDRAMSys.sh
+++ /dev/null
@@ -1,9 +0,0 @@
-#!/bin/sh
-
-JOBS=$(nproc --all)
-
-rm -rf lib
-mkdir lib
-cd lib
-DRAMSYS_PCT=true qmake ../../simulator/library.pro
-DRAMSYS_PCT=true make -j$JOBS
diff --git a/DRAMSys/pct/createPlatform.tcl b/DRAMSys/pct/createPlatform.tcl
index d90015b5..d6a1c661 100644
--- a/DRAMSys/pct/createPlatform.tcl
+++ b/DRAMSys/pct/createPlatform.tcl
@@ -47,9 +47,10 @@
 ::pct::create_instance Project:DRAMSys /HARDWARE i_DRAMSys DRAMSys {DRAMSys(simulationToRun, pathToResources)}
 
 # Add DRAMSys Library // ../[glob -type d ../../build*]/simulator/
-::pct::set_simulation_build_project_setting Debug Libraries "sqlite3 DRAMSys drampower"
-::pct::set_simulation_build_project_setting Debug {Library Search Paths} [concat ../lib/ /usr/lib64/ ../../simulator/src/common/third_party/DRAMPower/src/]
+::pct::set_simulation_build_project_setting Debug Libraries "sqlite3 DRAMSysLibrary DRAMPower"
+::pct::set_simulation_build_project_setting Debug {Library Search Paths} [concat ../../../build/library/ ../../../build/library/src/common/third_party/DRAMPower]
 ::pct::set_simulation_build_project_setting Debug {Defined Symbols} SC_INCLUDE_DYNAMIC_PROCESSES=1
+::pct::set_simulation_build_project_setting Debug {Compiler Flags} {-std=c++11}
 
 # Disable Fast Linking and Caching and Elaboration
 ::pct::set_simulation_build_project_setting Debug {Cache Objects} false
@@ -59,8 +60,8 @@
 ::pct::set_simulation_build_project_setting Debug {Make Jobs} 16 
 
 # Configure DDR3 Example:
-::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} pathToResources ../../simulator/resources/
-::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../simulator/resources/simulations/ddr3-example.xml
+::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} pathToResources ../../library/resources/
+::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../library/resources/simulations/ddr3-example.xml
 
 # Build Rest of the Example system:
 ::pct::open_library "GFRBM"
@@ -71,7 +72,7 @@
 ::pct::create_connection C_1 /HARDWARE /HARDWARE/i_ClockGenerator/CLK /HARDWARE/i_GFRBM_TLM2/CLK
 
 # Configure GFRBM:
-::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Scml Properties} InputFile ../../simulator/resources/traces/pct.stl
+::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Scml Properties} InputFile ../../library/resources/traces/pct.stl
 ::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Template Arguments} NUM_IN_IRQ 0
 ::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Template Arguments} NUM_OUT_IRQ 0
 ::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Extra properties} /all_encaps/LogFile foo.log
diff --git a/DRAMSys/simulator/CMakeLists.txt b/DRAMSys/simulator/CMakeLists.txt
new file mode 100644
index 00000000..034efaf5
--- /dev/null
+++ b/DRAMSys/simulator/CMakeLists.txt
@@ -0,0 +1,49 @@
+# Copyright (c) 2020, Fraunhofer IESE
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+#    this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+#    contributors may be used to endorse or promote products derived from
+#    this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
+# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Author: Matthias Jung
+
+cmake_minimum_required(VERSION 3.10)
+
+# Project Name
+project(DRAMSysSimulator)
+
+# Configuration:
+set(CMAKE_CXX_STANDARD 11 CACHE STRING "C++ Version")
+set(DCMAKE_SH="CMAKE_SH-NOTFOUND")
+
+add_executable(DRAMSys main.cpp)
+target_include_directories(DRAMSys
+    PUBLIC ../library/src/simulation/
+)
+target_link_libraries(DRAMSys 
+    ${SYSTEMC_LIBRARY}    
+    DRAMSysLibrary
+)
diff --git a/DRAMSys/simulator/main.cpp b/DRAMSys/simulator/main.cpp
index 5d020eaa..d966e174 100644
--- a/DRAMSys/simulator/main.cpp
+++ b/DRAMSys/simulator/main.cpp
@@ -66,14 +66,14 @@ int sc_main(int argc, char **argv)
     if (argc == 1) {
         // Get path of resources:
         resources = pathOfFile(argv[0])
-                    + std::string("/../DRAMSys/library/resources/");
-        SimulationJSON = resources + "simulations/ddr3-example.json";
+                    + std::string("/../../DRAMSys/library/resources/");
+        SimulationJSON = resources + "simulations/ddr3-example.json"; 
     }
     // Run with specific config but default resource folders:
     else if (argc == 2) {
         // Get path of resources:
         resources = pathOfFile(argv[0])
-                    + std::string("/../DRAMSys/library/resources/");
+                    + std::string("/../../DRAMSys/library/resources/");
         SimulationJSON = argv[1];
     }
     // Run with spefific config and specific resource folder:
diff --git a/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml b/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml
index 39d66692..b2c3af48 100644
--- a/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml
+++ b/DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml
@@ -1,25 +1,34 @@
-<!-- 
-DDR3 Example:
-1GB x64 DIMM with: 8 * 1 Gb x8 Devices (e.g. Micron MT41J128M8) with Page Size: 1KB
-
-Device Characteristics:
-
-Rows: 16 K [13:0]  -> 14 bit
-Bank: 8    [2:0]   -> 3  bit
-Cols: 1 K  [9:0]   -> 10 bit
-
-Due to the DIMM we have a Byte Offset Y
-       
-2 2 2 | 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1 
-9 8 7 | 6 5 4 3 2 1 0 9 8 7 6 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
-B B B | R R R R R R R R R R R R R R | C C C C C C C C C C | Y Y Y
--->
-
-<addressmapping>
-    <channel from="128"  to="128"  /> <!-- only one channel -->
-    <bank    from="27"   to="29"   />
-    <row     from="13"   to="26"   />
-    <column  from="3"    to="12"   />
-    <bytes   from="0"    to="2"    />
-</addressmapping>
-
+<CONGEN>
+    <SOLUTION ID="0">
+        <BYTE_BIT>0</BYTE_BIT>
+        <BYTE_BIT>1</BYTE_BIT>
+        <BYTE_BIT>2</BYTE_BIT>
+        <COLUMN_BIT>3</COLUMN_BIT>
+        <COLUMN_BIT>4</COLUMN_BIT>
+        <COLUMN_BIT>5</COLUMN_BIT>
+        <COLUMN_BIT>6</COLUMN_BIT>
+        <COLUMN_BIT>7</COLUMN_BIT>
+        <COLUMN_BIT>8</COLUMN_BIT>
+        <COLUMN_BIT>9</COLUMN_BIT>
+        <COLUMN_BIT>10</COLUMN_BIT>
+        <COLUMN_BIT>11</COLUMN_BIT>
+        <COLUMN_BIT>12</COLUMN_BIT>
+        <ROW_BIT>13</ROW_BIT>
+        <ROW_BIT>14</ROW_BIT>
+        <ROW_BIT>15</ROW_BIT>
+        <ROW_BIT>16</ROW_BIT>
+        <ROW_BIT>17</ROW_BIT>
+        <ROW_BIT>18</ROW_BIT>
+        <ROW_BIT>19</ROW_BIT>
+        <ROW_BIT>20</ROW_BIT>
+        <ROW_BIT>21</ROW_BIT>
+        <ROW_BIT>22</ROW_BIT>
+        <ROW_BIT>23</ROW_BIT>
+        <ROW_BIT>24</ROW_BIT>
+        <ROW_BIT>25</ROW_BIT>
+        <ROW_BIT>26</ROW_BIT>
+        <BANK_BIT>27</BANK_BIT>
+        <BANK_BIT>28</BANK_BIT>
+        <BANK_BIT>29</BANK_BIT>
+    </SOLUTION>
+</CONGEN>
\ No newline at end of file
diff --git a/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml b/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml
index ed869b57..44bf294e 100644
--- a/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml
+++ b/DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml
@@ -1,50 +1,20 @@
 <mcconfig>
-    <OpenPagePolicy value="1" />
-    <MaxNrOfTransactions value="8" />
-    <Scheduler value="FifoStrict" />
-    <Capsize value="5" />
-    <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
-    <PowerDownMode value="NoPowerDown" />
+	<!-- Open, OpenAdaptive, Closed, ClosedAdaptive -->
+	<PagePolicy value="Open" />
+	<!-- Fifo, FrFcfs, FrFcfsGrp -->
+    <Scheduler value="Fifo" />
+	<RequestBufferSize value="8" />
+	<!-- Oldest, Strict -->
+	<CmdMux value="Strict" />
+	<!-- Fifo, Reorder -->
+	<RespQueue value="Fifo" />
+	<!-- NoRefresh, Rankwise, Bankwise -->
+	<RefreshPolicy value="Rankwise" />
+	<!-- 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
+	<RefreshMode value="1" />
+	<RefreshMaxPostponed value="0"/>
+    <RefreshMaxPulledin value="0"/>
+    <!-- NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+    <PowerDownPolicy value="NoPowerDown" />
     <PowerDownTimeout value="100" />
-	<!-- Bankwise -->
-    <BankwiseLogic value="0"/>
-	<!-- Refresh yes, no -->
-    <ControllerCoreRefDisable value="0"/>
-	<!-- Refresh Mode. 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
-    <ControllerCoreRefMode value="1"/>
-    <!-- Number of AR commands in a tREFI in 1X mode -->
-    <ControllerCoreRefNumARCmdsIntREFI value="8192"/>
-	<!-- RGR -->
-    <ControllerCoreRGR value="0"/>
-    <ControllerCoreRGRRowInc value="1"/>
-	<!-- Banks to be refreshed in RGR mode. 1: yes, 0: no (max. 16 banks) -->
-    <ControllerCoreRGRB0  value="1"/>
-    <ControllerCoreRGRB1  value="1"/>
-    <ControllerCoreRGRB2  value="1"/>
-    <ControllerCoreRGRB3  value="1"/>
-    <ControllerCoreRGRB4  value="1"/>
-    <ControllerCoreRGRB5  value="1"/>
-    <ControllerCoreRGRB6  value="1"/>
-    <ControllerCoreRGRB7  value="1"/>
-    <ControllerCoreRGRB8  value="0"/>
-    <ControllerCoreRGRB9  value="0"/>
-    <ControllerCoreRGRB10 value="0"/>
-    <ControllerCoreRGRB11 value="0"/>
-    <ControllerCoreRGRB12 value="0"/>
-    <ControllerCoreRGRB13 value="0"/>
-    <ControllerCoreRGRB14 value="0"/>
-    <ControllerCoreRGRB15 value="0"/>
-	<!-- Timings for RGR normal or optimal values -->
-    <ControllerCoreRGRtRASBInClkCycles value="22"/>
-    <ControllerCoreRGRtRRDB_LInClkCycles value="2"/>
-    <ControllerCoreRGRtRRDB_SInClkCycles value="2"/>
-    <ControllerCoreRGRtRPBInClkCycles value="15"/>
-    <ControllerCoreRGRtRCBInClkCycles value="37"/>
-    <ControllerCoreRGRtFAWBInClkCycles value="0"/>
-	<!-- Postpone, pull-in -->
-    <ControllerCoreRefEnablePostpone value="0"/>
-    <ControllerCoreRefEnablePullIn value="0"/>
-    <ControllerCoreRefMaxPostponed value="8"/>
-    <ControllerCoreRefMaxPulledIn value="8"/>
-    <ControllerCoreRefForceMaxPostponeBurst value="0"/>
 </mcconfig>
diff --git a/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml b/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml
index 20db08cd..7240485d 100644
--- a/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml
+++ b/DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml
@@ -1,50 +1,20 @@
 <mcconfig>
-    <OpenPagePolicy value="1" />
-    <MaxNrOfTransactions value="8" />
+	<!-- Open, OpenAdaptive, Closed, ClosedAdaptive -->
+	<PagePolicy value="Open" />
+	<!-- Fifo, FrFcfs, FrFcfsGrp -->
     <Scheduler value="FrFcfs" />
-    <Capsize value="5" />
-    <!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
-    <PowerDownMode value="NoPowerDown" />
+	<RequestBufferSize value="8" />
+	<!-- Oldest, Strict -->
+	<CmdMux value="Oldest" />
+	<!-- Fifo, Reorder -->
+	<RespQueue value="Fifo" />
+	<!-- NoRefresh, Rankwise, Bankwise -->
+	<RefreshPolicy value="Rankwise" />
+	<!-- 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
+	<RefreshMode value="1" />
+	<RefreshMaxPostponed value="0"/>
+    <RefreshMaxPulledin value="0"/>
+    <!-- NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
+    <PowerDownPolicy value="NoPowerDown" />
     <PowerDownTimeout value="100" />
-	<!-- Bankwise -->
-    <BankwiseLogic value="0"/>
-	<!-- Refresh yes, no -->
-    <ControllerCoreRefDisable value="0"/>
-	<!-- Refresh Mode. 1: 1X, 2: 2X, 4: 4X (e.g., DDR4) -->
-    <ControllerCoreRefMode value="1"/>
-    <!-- Number of AR commands in a tREFI in 1X mode -->
-    <ControllerCoreRefNumARCmdsIntREFI value="8192"/>
-	<!-- RGR -->
-    <ControllerCoreRGR value="0"/>
-    <ControllerCoreRGRRowInc value="1"/>
-	<!-- Banks to be refreshed in RGR mode. 1: yes, 0: no (max. 16 banks) -->
-    <ControllerCoreRGRB0  value="1"/>
-    <ControllerCoreRGRB1  value="1"/>
-    <ControllerCoreRGRB2  value="1"/>
-    <ControllerCoreRGRB3  value="1"/>
-    <ControllerCoreRGRB4  value="1"/>
-    <ControllerCoreRGRB5  value="1"/>
-    <ControllerCoreRGRB6  value="1"/>
-    <ControllerCoreRGRB7  value="1"/>
-    <ControllerCoreRGRB8  value="0"/>
-    <ControllerCoreRGRB9  value="0"/>
-    <ControllerCoreRGRB10 value="0"/>
-    <ControllerCoreRGRB11 value="0"/>
-    <ControllerCoreRGRB12 value="0"/>
-    <ControllerCoreRGRB13 value="0"/>
-    <ControllerCoreRGRB14 value="0"/>
-    <ControllerCoreRGRB15 value="0"/>
-	<!-- Timings for RGR normal or optimal values -->
-    <ControllerCoreRGRtRASBInClkCycles value="22"/>
-    <ControllerCoreRGRtRRDB_LInClkCycles value="2"/>
-    <ControllerCoreRGRtRRDB_SInClkCycles value="2"/>
-    <ControllerCoreRGRtRPBInClkCycles value="15"/>
-    <ControllerCoreRGRtRCBInClkCycles value="37"/>
-    <ControllerCoreRGRtFAWBInClkCycles value="0"/>
-	<!-- Postpone, pull-in -->
-    <ControllerCoreRefEnablePostpone value="0"/>
-    <ControllerCoreRefEnablePullIn value="0"/>
-    <ControllerCoreRefMaxPostponed value="8"/>
-    <ControllerCoreRefMaxPulledIn value="8"/>
-    <ControllerCoreRefForceMaxPostponeBurst value="0"/>
 </mcconfig>
diff --git a/DRAMSys/tests/DDR3/scripts/createTraceDB.sql b/DRAMSys/tests/DDR3/scripts/createTraceDB.sql
index 1ba6c3aa..7a127fac 100644
--- a/DRAMSys/tests/DDR3/scripts/createTraceDB.sql
+++ b/DRAMSys/tests/DDR3/scripts/createTraceDB.sql
@@ -1,5 +1,6 @@
 DROP TABLE IF EXISTS Phases;
 DROP TABLE IF EXISTS GeneralInfo;
+DROP TABLE IF EXISTS CommandLengths;
 DROP TABLE IF EXISTS Comments;
 DROP TABLE IF EXISTS ranges;
 DROP TABLE IF EXISTS Transactions;
@@ -17,6 +18,7 @@ CREATE TABLE Phases(
 CREATE TABLE GeneralInfo(
         NumberOfTransactions INTEGER,
         TraceEnd INTEGER,
+		NumberOfRanks INTEGER,
         NumberOfBanks INTEGER,
         clk INTEGER,
         UnitOfTime TEXT,
@@ -29,6 +31,24 @@ CREATE TABLE GeneralInfo(
         ControllerThread INTEGER
 );
 
+CREATE TABLE CommandLengths(
+        ACT INTEGER,
+        PRE INTEGER,
+        PREA INTEGER,
+        RD INTEGER,
+        RDA INTEGER,
+        WR INTEGER,
+        WRA INTEGER,
+        REFA INTEGER,
+        REFB INTEGER,
+        PDEA INTEGER,
+        PDXA INTEGER,
+        PDEP INTEGER,
+        PDXP INTEGER,
+        SREFEN INTEGER,
+        SREFEX INTEGER
+);
+
 CREATE TABLE Power(
         time DOUBLE,
         AveragePower DOUBLE
@@ -58,8 +78,9 @@ CREATE TABLE Transactions(
         Burstlength INTEGER,
         TThread INTEGER,
         TChannel INTEGER,
-        TBank INTEGER,
+        TRank INTEGER,
         TBankgroup INTEGER,
+        TBank INTEGER,
         TRow INTEGER,
         TColumn INTEGER,
         DataStrobeBegin INTEGER,
diff --git a/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql b/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql
index 1ba6c3aa..7a127fac 100644
--- a/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql
+++ b/DRAMSys/tests/WIDEIO/scripts/createTraceDB.sql
@@ -1,5 +1,6 @@
 DROP TABLE IF EXISTS Phases;
 DROP TABLE IF EXISTS GeneralInfo;
+DROP TABLE IF EXISTS CommandLengths;
 DROP TABLE IF EXISTS Comments;
 DROP TABLE IF EXISTS ranges;
 DROP TABLE IF EXISTS Transactions;
@@ -17,6 +18,7 @@ CREATE TABLE Phases(
 CREATE TABLE GeneralInfo(
         NumberOfTransactions INTEGER,
         TraceEnd INTEGER,
+		NumberOfRanks INTEGER,
         NumberOfBanks INTEGER,
         clk INTEGER,
         UnitOfTime TEXT,
@@ -29,6 +31,24 @@ CREATE TABLE GeneralInfo(
         ControllerThread INTEGER
 );
 
+CREATE TABLE CommandLengths(
+        ACT INTEGER,
+        PRE INTEGER,
+        PREA INTEGER,
+        RD INTEGER,
+        RDA INTEGER,
+        WR INTEGER,
+        WRA INTEGER,
+        REFA INTEGER,
+        REFB INTEGER,
+        PDEA INTEGER,
+        PDXA INTEGER,
+        PDEP INTEGER,
+        PDXP INTEGER,
+        SREFEN INTEGER,
+        SREFEX INTEGER
+);
+
 CREATE TABLE Power(
         time DOUBLE,
         AveragePower DOUBLE
@@ -58,8 +78,9 @@ CREATE TABLE Transactions(
         Burstlength INTEGER,
         TThread INTEGER,
         TChannel INTEGER,
-        TBank INTEGER,
+        TRank INTEGER,
         TBankgroup INTEGER,
+        TBank INTEGER,
         TRow INTEGER,
         TColumn INTEGER,
         DataStrobeBegin INTEGER,
diff --git a/DRAMSys/traceAnalyzer/CMakeLists.txt b/DRAMSys/traceAnalyzer/CMakeLists.txt
index 3db02a3b..474c2c0f 100644
--- a/DRAMSys/traceAnalyzer/CMakeLists.txt
+++ b/DRAMSys/traceAnalyzer/CMakeLists.txt
@@ -30,25 +30,20 @@
 #
 # Author: Matthias Jung
 
-cmake_minimum_required(VERSION 3.10)
+cmake_minimum_required(VERSION 3.12)
 
 # Project Name:
 project(TraceAnalyzer)
 
-# Add Python Dependency:
-find_library(PYTHON3_LIBRARY NAMES Python3)
-
-# Add sqlite3 Dependency:
-find_package(PythonLibs REQUIRED)
+# Add Python3 Dependency:
+find_package(Python3 COMPONENTS Development)
 
 # Add QWT Dependency:
-find_library(QWT_LIBRARY NAMES "qwt-qt5" "qwt")
-find_path (QWT_INCLUDE_DIRS NAMES "qwt_plot.h" PATHS
+find_library(QWT_LIBRARY NAMES "qwt-qt5" "qwt" PATHS "$ENV{QWT_HOME}/lib")
+find_path(QWT_INCLUDE_DIRS NAMES "qwt_plot.h" PATHS
     "/usr/include/qwt-qt5"
     "/usr/include/qwt"
-    "C:\\Qwt\\"
-    "C:\\Qwt-6.1.4\\"
-    "C:\\Users\\jung\\Zeugs\\qwt\\qwt-614-install\\include"
+    "$ENV{QWT_HOME}/include"
 )
 
 # Add QT Library:
@@ -59,12 +54,12 @@ set(CMAKE_AUTORCC ON)
 set(CMAKE_INCLUDE_CURRENT_DIR ON)
 
 # Configure:
-set (CMAKE_CXX_STANDARD 11)
+set(CMAKE_CXX_STANDARD 11)
 set(DCMAKE_SH="CMAKE_SH-NOTFOUND")
 
 include_directories(
 	${QWT_INCLUDE_DIRS}
-	${PYTHON_INCLUDE_DIRS}
+	${Python3_INCLUDE_DIRS}
 	./
 	businessObjects/
 	businessObjects/phases/
@@ -86,7 +81,7 @@ add_executable(TraceAnalyzer
     gototimedialog.cpp
     presentation/traceplot.cpp
     tracefiletab.cpp
-    presentation/pornotracescroller.cpp
+    presentation/tracescroller.cpp
     traceanalyzer.cpp
     presentation/transactiontreewidget.cpp
     presentation/commenttreewidget.cpp
@@ -115,7 +110,7 @@ add_executable(TraceAnalyzer
 
 # Build:
 target_link_libraries(TraceAnalyzer
-	${PYTHON_LIBRARIES}
+	${Python3_LIBRARIES}
 	${QWT_LIBRARY}
 )
 qt5_use_modules(TraceAnalyzer Widgets Sql)
diff --git a/DRAMSys/traceAnalyzer/mainwindow.cpp b/DRAMSys/traceAnalyzer/mainwindow.cpp
index 9bdc2565..0e911285 100644
--- a/DRAMSys/traceAnalyzer/mainwindow.cpp
+++ b/DRAMSys/traceAnalyzer/mainwindow.cpp
@@ -52,7 +52,7 @@ MainWindow::MainWindow(QWidget *parent) :
     db = new TraceDB("tpr.tdb", true);
     traceNavigator = new TraceNavigator(db->getGeneralInfo(), this);
     ui->tracePlot->init(traceNavigator, db);
-    ui->pornoTraceScroller->init(traceNavigator, db, ui->tracePlot);
+    ui->traceScroller->init(traceNavigator, db, ui->tracePlot);
     phases = db->getPhasesInTimespan(
                  traceNavigator->GeneralTraceInfo().TraceSpan());
     transactions = db->getTransactionsInTimespan(
diff --git a/DRAMSys/traceAnalyzer/presentation/pornotracescroller.cpp b/DRAMSys/traceAnalyzer/presentation/tracescroller.cpp
similarity index 91%
rename from DRAMSys/traceAnalyzer/presentation/pornotracescroller.cpp
rename to DRAMSys/traceAnalyzer/presentation/tracescroller.cpp
index 8b66efd2..64506edf 100644
--- a/DRAMSys/traceAnalyzer/presentation/pornotracescroller.cpp
+++ b/DRAMSys/traceAnalyzer/presentation/tracescroller.cpp
@@ -38,11 +38,11 @@
 #include <qwt_plot_zoneitem.h>
 #include <QWheelEvent>
 #include <QMouseEvent>
-#include "pornotracescroller.h"
+#include "tracescroller.h"
 #include "traceplotitem.h"
 #include "util/engineeringScaleDraw.h"
 
-PornoTraceScroller::PornoTraceScroller(QWidget *parent):
+TraceScroller::TraceScroller(QWidget *parent):
     QwtPlot(parent), isInitialized(false), drawingProperties(false, false,
                                                              ColorGrouping::PhaseType)
 {
@@ -53,7 +53,7 @@ PornoTraceScroller::PornoTraceScroller(QWidget *parent):
     canvasClip->attach(this);
 }
 
-void PornoTraceScroller::init(TraceNavigator *navigator, TracePlot *tracePlot)
+void TraceScroller::init(TraceNavigator *navigator, TracePlot *tracePlot)
 {
     Q_ASSERT(isInitialized == false);
     isInitialized = true;
@@ -76,7 +76,7 @@ void PornoTraceScroller::init(TraceNavigator *navigator, TracePlot *tracePlot)
 }
 
 
-void PornoTraceScroller::setUpTracePlotItem()
+void TraceScroller::setUpTracePlotItem()
 {
     TracePlotItem *tracePlotItem = new TracePlotItem(transactions, *navigator,
                                                      drawingProperties);
@@ -84,7 +84,7 @@ void PornoTraceScroller::setUpTracePlotItem()
     tracePlotItem->attach(this);
 }
 
-void PornoTraceScroller::setUpDrawingProperties()
+void TraceScroller::setUpDrawingProperties()
 {
     drawingProperties.numberOfRanks = navigator->GeneralTraceInfo().numberOfRanks;
     drawingProperties.numberOfBanks =  navigator->GeneralTraceInfo().numberOfBanks;
@@ -96,14 +96,14 @@ void PornoTraceScroller::setUpDrawingProperties()
 }
 
 
-void PornoTraceScroller::setUpAxis()
+void TraceScroller::setUpAxis()
 {
     setAxisScale(yLeft, -1, navigator->GeneralTraceInfo().numberOfBanks + 2, 1.0);
     axisScaleDraw(yLeft)->enableComponent(QwtAbstractScaleDraw::Labels, false );
     axisScaleDraw(yLeft)->enableComponent(QwtAbstractScaleDraw::Ticks, false );
 }
 
-void PornoTraceScroller::connectNavigatorQ_SIGNALS()
+void TraceScroller::connectNavigatorQ_SIGNALS()
 {
     QObject::connect(navigator, SIGNAL(currentTraceTimeChanged()), this,
                      SLOT(currentTraceTimeChanged()));
@@ -113,15 +113,15 @@ void PornoTraceScroller::connectNavigatorQ_SIGNALS()
                      SLOT(selectedTransactionsChanged()));
 }
 
-Timespan PornoTraceScroller::GetCurrentTimespan()
+Timespan TraceScroller::GetCurrentTimespan()
 {
     traceTime deltaOnTracePlot = navigator->GeneralTraceInfo().span.End() -
                                  tracePlot->ZoomLevel();
-    traceTime deltaOnPornoTraceScroller = navigator->GeneralTraceInfo().span.End() -
+    traceTime deltaOnTraceScroller = navigator->GeneralTraceInfo().span.End() -
                                           zoomLevel;
 
     traceTime newBegin = static_cast<traceTime>
-                         (tracePlot->GetCurrentTimespan().Begin() * (1.0 * deltaOnPornoTraceScroller) /
+                         (tracePlot->GetCurrentTimespan().Begin() * (1.0 * deltaOnTraceScroller) /
                           deltaOnTracePlot);
     Timespan span(newBegin, newBegin + zoomLevel);
 
@@ -133,7 +133,7 @@ Timespan PornoTraceScroller::GetCurrentTimespan()
 }
 
 
-void PornoTraceScroller::getAndDrawComments()
+void TraceScroller::getAndDrawComments()
 {
     for (const auto &pair : navigator->getComments()) {
         const Comment &comment = pair.second;
@@ -151,18 +151,18 @@ void PornoTraceScroller::getAndDrawComments()
  *
  */
 
-void PornoTraceScroller::selectedTransactionsChanged()
+void TraceScroller::selectedTransactionsChanged()
 {
     replot();
 }
 
-void PornoTraceScroller::colorGroupingChanged(ColorGrouping colorGrouping)
+void TraceScroller::colorGroupingChanged(ColorGrouping colorGrouping)
 {
     drawingProperties.colorGrouping = colorGrouping;
     replot();
 }
 
-void PornoTraceScroller::currentTraceTimeChanged()
+void TraceScroller::currentTraceTimeChanged()
 {
     Timespan spanOnTracePlot = tracePlot->GetCurrentTimespan();
     canvasClip->setInterval(spanOnTracePlot.Begin(), spanOnTracePlot.End());
@@ -172,21 +172,21 @@ void PornoTraceScroller::currentTraceTimeChanged()
     replot();
 }
 
-void PornoTraceScroller::commentsChanged()
+void TraceScroller::commentsChanged()
 {
     detachItems(QwtPlotItem::Rtti_PlotMarker);
     getAndDrawComments();
     replot();
 }
 
-void PornoTraceScroller::tracePlotZoomChanged()
+void TraceScroller::tracePlotZoomChanged()
 {
     zoomLevel = tracePlot->ZoomLevel() * tracePlotEnlargementFactor;
     if (zoomLevel > navigator->GeneralTraceInfo().span.timeCovered())
         zoomLevel = navigator->GeneralTraceInfo().span.timeCovered();
 }
 
-bool PornoTraceScroller::eventFilter( QObject *object, QEvent *event )
+bool TraceScroller::eventFilter( QObject *object, QEvent *event )
 {
     if (object == canvas()) {
         static bool clipDragged = false;
diff --git a/DRAMSys/traceAnalyzer/presentation/pornotracescroller.h b/DRAMSys/traceAnalyzer/presentation/tracescroller.h
similarity index 93%
rename from DRAMSys/traceAnalyzer/presentation/pornotracescroller.h
rename to DRAMSys/traceAnalyzer/presentation/tracescroller.h
index 98f5a97b..b9166f2e 100644
--- a/DRAMSys/traceAnalyzer/presentation/pornotracescroller.h
+++ b/DRAMSys/traceAnalyzer/presentation/tracescroller.h
@@ -35,8 +35,8 @@
  *    Matthias Jung
  */
 
-#ifndef PORNOTRACESCROLLER_H
-#define PORNOTRACESCROLLER_H
+#ifndef TRACESCROLLER_H
+#define TRACESCROLLER_H
 
 #include <qwt_plot.h>
 #include <qwt_plot_zoneitem.h>
@@ -45,7 +45,7 @@
 #include "traceplot.h"
 
 
-class PornoTraceScroller : public QwtPlot
+class TraceScroller : public QwtPlot
 {
     Q_OBJECT
 private:
@@ -67,7 +67,7 @@ private:
     TraceDrawingProperties drawingProperties;
 
 public:
-    PornoTraceScroller(QWidget *parent = NULL);
+    TraceScroller(QWidget *parent = NULL);
     void init(TraceNavigator *navigator, TracePlot *tracePlot);
     Timespan GetCurrentTimespan();
 
@@ -80,4 +80,4 @@ public Q_SLOTS:
 
 };
 
-#endif // PORNOTRACESCROLLER_H
+#endif // TraceScroller_H
diff --git a/DRAMSys/traceAnalyzer/scripts/metrics.py b/DRAMSys/traceAnalyzer/scripts/metrics.py
index ea47bd61..e915afb8 100644
--- a/DRAMSys/traceAnalyzer/scripts/metrics.py
+++ b/DRAMSys/traceAnalyzer/scripts/metrics.py
@@ -462,7 +462,9 @@ def time_in_SREFB_percent(connection):
 @metric
 def time_in_power_down_states_in_ns(connection):
     mcconfig = MCConfig(connection)
-    bankwiseLogic = 0
+    #bankwiseLogic = mcconfig.getValue("BankwiseLogic")
+    bankwiseLogic = "0"
+    
     if bankwiseLogic == "0":
         totalTimeInPDNA = time_in_PDNA_in_ns(connection)
         totalTimeInPDNP = time_in_PDNP_in_ns(connection)
@@ -480,7 +482,8 @@ def time_in_power_down_states_in_ns(connection):
 @metric
 def time_in_power_down_states_percent(connection):
     mcconfig = MCConfig(connection)
-    bankwiseLogic = 0
+    #bankwiseLogic = mcconfig.getValue("BankwiseLogic")
+    bankwiseLogic = "0"
     if bankwiseLogic == "0":
         totalTimeAllBanks = trace_length_in_ns(connection)
     else:
@@ -538,7 +541,8 @@ def getMetrics(pathToTrace):
     connection = sqlite3.connect(pathToTrace)
 
     mcconfig = MCConfig(connection)
-    bankwiseLogic = 0
+    #bankwiseLogic = mcconfig.getValue("BankwiseLogic")
+    bankwiseLogic = "0"
 
     if bankwiseLogic == "0":
         pdnMetrics = [time_in_PDNA_in_ns, time_in_PDNA_percent, time_in_PDNP_in_ns, time_in_PDNP_percent, time_in_SREF_in_ns, time_in_SREF_percent]
@@ -572,7 +576,8 @@ def calculateMetrics(pathToTrace, selectedMetrics=[]):
     connection = sqlite3.connect(pathToTrace)
 
     mcconfig = MCConfig(connection)
-    bankwiseLogic = 0
+    #bankwiseLogic = mcconfig.getValue("BankwiseLogic")
+    bankwiseLogic = "0"
 
     if bankwiseLogic == "0":
         pdnMetrics = [time_in_PDNA_in_ns, time_in_PDNA_percent,
diff --git a/DRAMSys/traceAnalyzer/tracefiletab.cpp b/DRAMSys/traceAnalyzer/tracefiletab.cpp
index bf0ff6ef..a0d638f5 100644
--- a/DRAMSys/traceAnalyzer/tracefiletab.cpp
+++ b/DRAMSys/traceAnalyzer/tracefiletab.cpp
@@ -75,9 +75,9 @@ void TraceFileTab::initNavigatorAndItsDependentWidgets(QString path)
 
     ui->traceplot->init(navigator);
 
-    ui->pornoTraceScroller->init(navigator, ui->traceplot);
+    ui->traceScroller->init(navigator, ui->traceplot);
     connect(this, SIGNAL(colorGroupingChanged(ColorGrouping)),
-            ui->pornoTraceScroller, SLOT(colorGroupingChanged(ColorGrouping)));
+            ui->traceScroller, SLOT(colorGroupingChanged(ColorGrouping)));
 
     ui->selectedTransactionTree->init(navigator);
     //ui->debugMessages->init(navigator,ui->traceplot);
diff --git a/DRAMSys/traceAnalyzer/tracefiletab.h b/DRAMSys/traceAnalyzer/tracefiletab.h
index 3bef247c..5629a6c5 100644
--- a/DRAMSys/traceAnalyzer/tracefiletab.h
+++ b/DRAMSys/traceAnalyzer/tracefiletab.h
@@ -43,7 +43,7 @@
 #include <QFileSystemWatcher>
 #include "presentation/tracenavigator.h"
 #include "presentation/traceplot.h"
-#include "presentation/pornotracescroller.h"
+#include "presentation/tracescroller.h"
 
 namespace Ui {
 class TraceFileTab;
diff --git a/DRAMSys/traceAnalyzer/tracefiletab.ui b/DRAMSys/traceAnalyzer/tracefiletab.ui
index e3d18d6f..d6951f1b 100644
--- a/DRAMSys/traceAnalyzer/tracefiletab.ui
+++ b/DRAMSys/traceAnalyzer/tracefiletab.ui
@@ -38,7 +38,7 @@
         </widget>
        </item>
        <item>
-        <widget class="PornoTraceScroller" name="pornoTraceScroller">
+        <widget class="TraceScroller" name="traceScroller">
          <property name="sizePolicy">
           <sizepolicy hsizetype="Expanding" vsizetype="Expanding">
            <horstretch>4</horstretch>
@@ -162,9 +162,9 @@
    <header>presentation/traceplot.h</header>
   </customwidget>
   <customwidget>
-   <class>PornoTraceScroller</class>
+   <class>TraceScroller</class>
    <extends>QListView</extends>
-   <header>presentation/pornotracescroller.h</header>
+   <header>presentation/tracescroller.h</header>
   </customwidget>
   <customwidget>
    <class>CommentTreeWidget</class>
diff --git a/README.md b/README.md
index 61ebaf6a..788b43f6 100644
--- a/README.md
+++ b/README.md
@@ -982,11 +982,11 @@ running before starting. For more information about 3D-ICE visit the [official w
 
 #### Installing the lastest 3D-ICE version
 
-[Download](http://esl.epfl.ch/3d-ice/download.html) the lastest version. Make sure you got version 2.2.6 or greater:
+[Download](https://www.epfl.ch/labs/esl/open-source-software-projects/3d-ice/3d-ice-download/) the lastest version. Make sure you got version 2.2.6 or greater:
 
 ```bash
-$ wget http://esl.epfl.ch/files/content/sites/esl/files/3dice/releases/3d-ice-latest.zip
-$ tar -xvzf 3d-ice-latest.zip
+$ wget https://www.epfl.ch/labs/esl/wp-content/uploads/2018/12/3d-ice-latest.zip
+$ unzip 3d-ice-latest.zip
 ```
 
 Install [SuperLU](http://crd-legacy.lbl.gov/~xiaoye/SuperLU/superlu_5.2.1.tar.gz) dependencies: