diff --git a/tests/tests_regression/CMakeLists.txt b/tests/tests_regression/CMakeLists.txt
index 875fb59c..394ecc5c 100644
--- a/tests/tests_regression/CMakeLists.txt
+++ b/tests/tests_regression/CMakeLists.txt
@@ -53,46 +53,48 @@ set(TABLES_TO_COMPARE
     Power
 )
 
-function(test_standard standard base_config resource_dir output_filename)
+function(test_standard standard test_name base_config resource_dir output_filename)
     # Put all the generated files into a subdirectory
-    file(MAKE_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${standard})
+    file(MAKE_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${test_name})
 
-    configure_file(compare.sh ${standard}/compare.sh)
+    configure_file(compare.sh ${test_name}/compare.sh)
 
     # Test to create database
     add_test(
-        NAME Regression${standard}.CreateDatabase
-        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${standard}
+        NAME Regression${test_name}.CreateDatabase
+        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${test_name}
         COMMAND $<TARGET_FILE:DRAMSys> ${base_config} ${resource_dir}
     )
-    set_tests_properties(Regression${standard}.CreateDatabase PROPERTIES FIXTURES_SETUP Regression${standard}.CreateDatabase)
+    set_tests_properties(Regression${test_name}.CreateDatabase PROPERTIES FIXTURES_SETUP Regression${test_name}.CreateDatabase)
 
     # Test to diff the whole database. This test should not fail.
     # The purpose of this test is solely to output the differences of the two databases
     # so that they can be inspected easily.
     add_test(
-        NAME Regression${standard}.SqlDiff
-        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${standard}
+        NAME Regression${test_name}.SqlDiff
+        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${test_name}
         COMMAND compare.sh
     )
-    set_tests_properties(Regression${standard}.SqlDiff PROPERTIES FIXTURES_REQUIRED Regression${standard}.CreateDatabase)
+    set_tests_properties(Regression${test_name}.SqlDiff PROPERTIES FIXTURES_REQUIRED Regression${test_name}.CreateDatabase)
 
     # Tests to diff individual tables
     foreach(table IN LISTS TABLES_TO_COMPARE)
-        configure_file(compare_table.sh ${standard}/compare_table-${table}.sh)
+        configure_file(compare_table.sh ${test_name}/compare_table-${table}.sh)
 
         add_test(
-            NAME Regression${standard}.SqlDiff.${table}
-            WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${standard}
+            NAME Regression${test_name}.SqlDiff.${table}
+            WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}/${test_name}
             COMMAND compare_table-${table}.sh
         )
-        set_tests_properties(Regression${standard}.SqlDiff.${table} PROPERTIES FIXTURES_REQUIRED Regression${standard}.CreateDatabase)
+        set_tests_properties(Regression${test_name}.SqlDiff.${table} PROPERTIES FIXTURES_REQUIRED Regression${test_name}.CreateDatabase)
     endforeach()
 endfunction()
 
-test_standard(DDR3 ${CMAKE_CURRENT_SOURCE_DIR}/DDR3/ddr3-example.json ${CMAKE_CURRENT_SOURCE_DIR}/DDR3 DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb)
-test_standard(DDR4 ${CMAKE_CURRENT_SOURCE_DIR}/DDR4/ddr4-example.json ${CMAKE_CURRENT_SOURCE_DIR}/DDR4 DRAMSys_ddr4-bankgrp_ddr4_ch0.tdb)
-test_standard(LPDDR4 ${CMAKE_CURRENT_SOURCE_DIR}/LPDDR4/lpddr4-example.json ${CMAKE_CURRENT_SOURCE_DIR}/LPDDR4 DRAMSys_lpddr4-example_lpddr4_ch0.tdb)
-test_standard(HBM2.Ch0 ${CMAKE_CURRENT_SOURCE_DIR}/HBM2/hbm2-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM2 DRAMSys_hbm2-example_hbm2_ch0.tdb)
-test_standard(HBM2.Ch1 ${CMAKE_CURRENT_SOURCE_DIR}/HBM2/hbm2-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM2 DRAMSys_hbm2-example_hbm2_ch1.tdb)
-test_standard(HBM3 ${CMAKE_CURRENT_SOURCE_DIR}/HBM3/hbm3-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM3 DRAMSys_hbm3-example_hbm3_ch0.tdb)
+test_standard(DDR3 DDR3 ${CMAKE_CURRENT_SOURCE_DIR}/DDR3/ddr3-example.json ${CMAKE_CURRENT_SOURCE_DIR}/DDR3 DRAMSys_ddr3-dual-rank_ddr3_ch0.tdb)
+test_standard(DDR4 DDR4 ${CMAKE_CURRENT_SOURCE_DIR}/DDR4/ddr4-example.json ${CMAKE_CURRENT_SOURCE_DIR}/DDR4 DRAMSys_ddr4-bankgrp_ddr4_ch0.tdb)
+test_standard(DDR5 DDR5.Ch0 ${CMAKE_CURRENT_SOURCE_DIR}/DDR5/ddr5-example.json ${CMAKE_CURRENT_SOURCE_DIR}/DDR5 DRAMSys_ddr5-example_ddr5_ch0.tdb)
+test_standard(DDR5 DDR5.Ch1 ${CMAKE_CURRENT_SOURCE_DIR}/DDR5/ddr5-example.json ${CMAKE_CURRENT_SOURCE_DIR}/DDR5 DRAMSys_ddr5-example_ddr5_ch1.tdb)
+test_standard(LPDDR4 LPDDR4 ${CMAKE_CURRENT_SOURCE_DIR}/LPDDR4/lpddr4-example.json ${CMAKE_CURRENT_SOURCE_DIR}/LPDDR4 DRAMSys_lpddr4-example_lpddr4_ch0.tdb)
+test_standard(HBM2 HBM2.Ch0 ${CMAKE_CURRENT_SOURCE_DIR}/HBM2/hbm2-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM2 DRAMSys_hbm2-example_hbm2_ch0.tdb)
+test_standard(HBM2 HBM2.Ch1 ${CMAKE_CURRENT_SOURCE_DIR}/HBM2/hbm2-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM2 DRAMSys_hbm2-example_hbm2_ch1.tdb)
+test_standard(HBM3 HBM3 ${CMAKE_CURRENT_SOURCE_DIR}/HBM3/hbm3-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM3 DRAMSys_hbm3-example_hbm3_ch0.tdb)
diff --git a/tests/tests_regression/DDR5/ddr5-example.json b/tests/tests_regression/DDR5/ddr5-example.json
new file mode 100644
index 00000000..f6445f7c
--- /dev/null
+++ b/tests/tests_regression/DDR5/ddr5-example.json
@@ -0,0 +1,165 @@
+{
+    "simulation": {
+        "addressmapping": {
+            "BANKGROUP_BIT": [
+                13,
+                14,
+                15
+            ],
+            "BANK_BIT": [
+                16
+            ],
+            "BYTE_BIT": [
+                0,
+                1
+            ],
+            "CHANNEL_BIT": [
+                33
+            ],
+            "COLUMN_BIT": [
+                2,
+                3,
+                4,
+                5,
+                6,
+                7,
+                8,
+                9,
+                10,
+                11,
+                12
+            ],
+            "ROW_BIT": [
+                17,
+                18,
+                19,
+                20,
+                21,
+                22,
+                23,
+                24,
+                25,
+                26,
+                27,
+                28,
+                29,
+                30,
+                31,
+                32
+            ]
+        },
+        "mcconfig": {
+            "Arbiter": "Simple",
+            "CmdMux": "Oldest",
+            "MaxActiveTransactions": 128,
+            "PagePolicy": "Open",
+            "PowerDownPolicy": "NoPowerDown",
+            "RefreshManagement": false,
+            "RefreshMaxPostponed": 0,
+            "RefreshMaxPulledin": 0,
+            "RefreshPolicy": "AllBank",
+            "RequestBufferSize": 8,
+            "RespQueue": "Fifo",
+            "Scheduler": "FrFcfs",
+            "SchedulerBuffer": "Bankwise"
+        },
+        "memspec": {
+            "memarchitecturespec": {
+                "RAADEC": 16,
+                "RAAIMT": 32,
+                "RAAMMT": 96,
+                "burstLength": 16,
+                "cmdMode": 1,
+                "dataRate": 2,
+                "nbrOfBankGroups": 8,
+                "nbrOfBanks": 16,
+                "nbrOfChannels": 2,
+                "nbrOfColumns": 2048,
+                "nbrOfDIMMRanks": 1,
+                "nbrOfDevices": 8,
+                "nbrOfLogicalRanks": 1,
+                "nbrOfPhysicalRanks": 1,
+                "nbrOfRanks": 1,
+                "nbrOfRows": 65536,
+                "refMode": 1,
+                "width": 4
+            },
+            "memoryId": "JEDEC_2x8x2Gbx4_DDR5-3200A",
+            "memoryType": "DDR5",
+            "memtimingspec": {
+                "ACTPDEN": 2,
+                "CCD_L_WR2_slr": 16,
+                "CCD_L_WR_slr": 32,
+                "CCD_L_slr": 8,
+                "CCD_M_WR_slr": 32,
+                "CCD_M_slr": 8,
+                "CCD_S_WR_slr": 8,
+                "CCD_S_slr": 8,
+                "CCD_WR_dlr": 0,
+                "CCD_WR_dpr": 0,
+                "CCD_dlr": 0,
+                "CPDED": 8,
+                "FAW_dlr": 0,
+                "FAW_slr": 32,
+                "PD": 12,
+                "PPD": 2,
+                "PRPDEN": 2,
+                "RAS": 52,
+                "RCD": 22,
+                "RDDQS": 0,
+                "REFI1": 6240,
+                "REFI2": 3120,
+                "REFISB": 1560,
+                "REFPDEN": 2,
+                "REFSBRD_dlr": 0,
+                "REFSBRD_slr": 48,
+                "RFC1_dlr": 0,
+                "RFC1_dpr": 0,
+                "RFC1_slr": 312,
+                "RFC2_dlr": 0,
+                "RFC2_dpr": 0,
+                "RFC2_slr": 208,
+                "RFCsb_dlr": 0,
+                "RFCsb_slr": 184,
+                "RL": 22,
+                "RP": 22,
+                "RPRE": 1,
+                "RPST": 0,
+                "RRD_L_slr": 8,
+                "RRD_S_slr": 8,
+                "RRD_dlr": 0,
+                "RTP": 12,
+                "RTRS": 2,
+                "WL": 20,
+                "WPRE": 2,
+                "WPST": 0,
+                "WR": 48,
+                "WTR_L": 16,
+                "WTR_M": 16,
+                "WTR_S": 4,
+                "XP": 12,
+                "clkMhz": 1600
+            }
+        },
+        "simconfig": {
+            "AddressOffset": 0,
+            "CheckTLM2Protocol": false,
+            "DatabaseRecording": true,
+            "Debug": false,
+            "EnableWindowing": false,
+            "PowerAnalysis": false,
+            "SimulationName": "ddr5",
+            "SimulationProgressBar": true,
+            "StoreMode": "NoStorage",
+            "UseMalloc": false,
+            "WindowSize": 1000
+        },
+        "simulationid": "ddr5-example",
+        "tracesetup": [
+            {
+                "clkMhz": 933,
+                "name": "trace_test3.stl"
+            }
+        ]
+    }
+}
\ No newline at end of file
diff --git a/tests/tests_regression/DDR5/expected/DRAMSys_ddr5-example_ddr5_ch0.tdb b/tests/tests_regression/DDR5/expected/DRAMSys_ddr5-example_ddr5_ch0.tdb
new file mode 100644
index 00000000..5705dd3e
--- /dev/null
+++ b/tests/tests_regression/DDR5/expected/DRAMSys_ddr5-example_ddr5_ch0.tdb
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:655d10bfd7b648e0f8121cd6d78652a86d2abc899a2181aaac33e87b5bed4833
+size 6045696
diff --git a/tests/tests_regression/DDR5/expected/DRAMSys_ddr5-example_ddr5_ch1.tdb b/tests/tests_regression/DDR5/expected/DRAMSys_ddr5-example_ddr5_ch1.tdb
new file mode 100644
index 00000000..d76dbe0a
--- /dev/null
+++ b/tests/tests_regression/DDR5/expected/DRAMSys_ddr5-example_ddr5_ch1.tdb
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:d919de55d4f608730cf65fe7fa58d61630dca3188f56748a461b57e6c154ca71
+size 94208
diff --git a/tests/tests_regression/DDR5/traces/trace_test3.stl b/tests/tests_regression/DDR5/traces/trace_test3.stl
new file mode 100644
index 00000000..9227758b
--- /dev/null
+++ b/tests/tests_regression/DDR5/traces/trace_test3.stl
@@ -0,0 +1,3 @@
+version https://git-lfs.github.com/spec/v1
+oid sha256:c4d7378afb7d050ffb7c99db95d66f2997e994ef4d41aab4e9e09fb15ff64a46
+size 433662
diff --git a/tests/tests_regression/HBM2/expected/DRAMSys_hbm2-example_hbm2_ch0.tdb b/tests/tests_regression/HBM2/expected/DRAMSys_hbm2-example_hbm2_ch0.tdb
index db33da5a..61bd8510 100644
--- a/tests/tests_regression/HBM2/expected/DRAMSys_hbm2-example_hbm2_ch0.tdb
+++ b/tests/tests_regression/HBM2/expected/DRAMSys_hbm2-example_hbm2_ch0.tdb
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:356f3a4042e88412dd834add20f753a1b26d5743571cd799f3bd07362a4dfab4
+oid sha256:e28815053438678605ceadfd76441dbffb54568b96f09ec458ad6376e5d3f2d4
 size 643072
diff --git a/tests/tests_regression/HBM2/hbm2.txt b/tests/tests_regression/HBM2/hbm2.txt
new file mode 100644
index 00000000..e69de29b
diff --git a/tests/tests_regression/HBM3/expected/DRAMSys_hbm3-example_hbm3_ch0.tdb b/tests/tests_regression/HBM3/expected/DRAMSys_hbm3-example_hbm3_ch0.tdb
index e68e22a4..ef4589ab 100644
--- a/tests/tests_regression/HBM3/expected/DRAMSys_hbm3-example_hbm3_ch0.tdb
+++ b/tests/tests_regression/HBM3/expected/DRAMSys_hbm3-example_hbm3_ch0.tdb
@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:25448feb56b34e07ba079b7561a696eb4be67248b87d709fc50dae8ab8f342fc
-size 1212416
+oid sha256:433b011ba87ca51869cca6694c67fd21e8087048a57b7157f4e0a09204c1c37b
+size 1220608