From 54f3285b17bebbf28580f00034edc6f36c653891 Mon Sep 17 00:00:00 2001
From: scorrea <scorrea@rhrk.uni-kl.de>
Date: Sat, 20 Jun 2020 16:12:35 +0200
Subject: [PATCH] HBM2 test to dual-channel/ DDR2 memspecs updated

---
 .../MICRON_1Gb_DDR2-1066_16bit_H.json         |  1 +
 .../memspecs/MICRON_1Gb_DDR2-800_16bit_H.json |  1 +
 .../configs/amconfigs/am_hbm2_8Gb_pc_brc.json | 23 ++++++++++---------
 DRAMSys/tests/HBM2/configs/memspecs/HBM2.json |  7 +++---
 4 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.json b/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.json
index 60ef5c90..0554838d 100644
--- a/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.json
+++ b/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.json
@@ -8,6 +8,7 @@
             "nbrOfRanks": 1,
             "nbrOfRows": 8192,
             "width": 16,
+       	    "nbrOfDevicesOnDIMM": 4,
             "nbrOfChannels": 1
         },
         "memoryId": "MICRON_1Gb_DDR2-1066_16bit_H",
diff --git a/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-800_16bit_H.json b/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-800_16bit_H.json
index 77317ff8..d54ddb75 100644
--- a/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-800_16bit_H.json
+++ b/DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-800_16bit_H.json
@@ -8,6 +8,7 @@
             "nbrOfRanks": 1,
             "nbrOfRows": 8192,
             "width": 16,
+       	    "nbrOfDevicesOnDIMM": 4,
             "nbrOfChannels": 1
         },
         "memoryId": "MICRON_1Gb_DDR2-800_16bit_H",
diff --git a/DRAMSys/tests/HBM2/configs/amconfigs/am_hbm2_8Gb_pc_brc.json b/DRAMSys/tests/HBM2/configs/amconfigs/am_hbm2_8Gb_pc_brc.json
index 354217a5..c9362ea4 100644
--- a/DRAMSys/tests/HBM2/configs/amconfigs/am_hbm2_8Gb_pc_brc.json
+++ b/DRAMSys/tests/HBM2/configs/amconfigs/am_hbm2_8Gb_pc_brc.json
@@ -1,32 +1,32 @@
 {
     "CONGEN": {
-	"RANK_BIT":[
-	    29
+	"CHANNEL_BIT":[
+	    30
         ],
 	"BANKGROUP_BIT":[
-            27,
-	    28
+            28,
+	    29
         ],
         "BANK_BIT": [
-            25,
-            26
+            26,
+            27
         ],
         "BYTE_BIT": [
             0,
             1,
-            2
+            2,
+	    3
         ],
         "COLUMN_BIT": [
-            3,
             4,
             5,
             6,
             7,
             8,
-            9
+            9,
+	    10
         ],
         "ROW_BIT": [
-            10,
             11,
             12,
             13,
@@ -40,7 +40,8 @@
             21,
             22,
             23,
-            24
+            24,
+	    25
         ]
     }
 }
diff --git a/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json b/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json
index 933baeba..c10d1242 100644
--- a/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json
+++ b/DRAMSys/tests/HBM2/configs/memspecs/HBM2.json
@@ -6,11 +6,10 @@
             "nbrOfBankGroups": 4,
             "nbrOfBanks": 16,
             "nbrOfColumns": 128,
-            "nbrOfRanks": 2,
-            "nbrOfChannels": 1,
+            "nbrOfRanks": 1,
+            "nbrOfChannels": 2,
             "nbrOfRows": 32768,
-            "width": 64,
-            "NumberOfMemChannels": 1
+            "width": 128
         },
         "memoryId": "https://www.computerbase.de/2019-05/amd-memory-tweak-vram-oc/#bilder",
         "memoryType": "HBM2",