diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/common/timedependency.h b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/common/timedependency.h index 708f737f..3a4e081c 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/common/timedependency.h +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/common/timedependency.h @@ -40,15 +40,22 @@ #include "StringMapper.h" class DBPhaseEntryBase; -#define PASSFUNCTIONDECL (const std::shared_ptr thisPhase, const std::shared_ptr otherPhase) -typedef bool (*PassFunction)PASSFUNCTIONDECL; +#define PASSFUNCTIONDECL (const std::shared_ptr thisPhase, const std::shared_ptr otherPhase) +struct PassFunction { + using Fn = std::function; + PassFunction(Fn passFunction) : mPassFn{std::move(passFunction)} {} + + bool execute PASSFUNCTIONDECL { return mPassFn(thisPhase, otherPhase); } + + Fn mPassFn; +}; class TimeDependency { public: TimeDependency() = default; TimeDependency(size_t timeValue, QString phaseDep, DependencyType depType, - QString timeDepName, PassFunction pass=nullptr) + QString timeDepName, std::shared_ptr pass=nullptr) : timeValue{timeValue}, phaseDep{phaseDep}, depType{depType}, timeDepName{timeDepName}, passFunction{pass} {} @@ -56,7 +63,7 @@ public: StringMapper phaseDep; DependencyType depType; QString timeDepName; - PassFunction passFunction; + std::shared_ptr passFunction; bool isPool() { return phaseDep.isPool(); } }; \ No newline at end of file diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR3Configuration.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR3Configuration.cpp index 8887295f..692b264b 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR3Configuration.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR3Configuration.cpp @@ -42,6 +42,10 @@ DDR3Configuration::DDR3Configuration(const TraceDB& tdb) { } QString DDR3Configuration::getQueryStr(const std::vector& commands) const { + // TODO update query text when feature is ready + // QString queryStr = "SELECT Phases.ID, Phases.PhaseName, Phases.PhaseBegin, Phases.PhaseEnd, Phases.Transact, Phases.Bank, Phases.Rank " + // " FROM Phases " + // " WHERE PhaseName IN ("; QString queryStr = "SELECT Phases.*, Transactions.TBank, Transactions.TRank " " FROM Phases " " INNER JOIN Transactions " diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR4Configuration.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR4Configuration.cpp index 88de913c..68f7bc14 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR4Configuration.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR4Configuration.cpp @@ -41,6 +41,10 @@ DDR4Configuration::DDR4Configuration(const TraceDB& tdb) { } QString DDR4Configuration::getQueryStr(const std::vector& commands) const { + // TODO update query text when feature is ready + // QString queryStr = "SELECT Phases.ID, Phases.PhaseName, Phases.PhaseBegin, Phases.PhaseEnd, Phases.Transact, Phases.Bank, Phases.Bankgroup, Phases.Rank " + // " FROM Phases " + // " WHERE PhaseName IN ("; QString queryStr = "SELECT Phases.*, Transactions.TBank, Transactions.TBankgroup, Transactions.TRank " " FROM Phases " " INNER JOIN Transactions " diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR5Configuration.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR5Configuration.cpp index 29710b86..48bad324 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR5Configuration.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/DDR5Configuration.cpp @@ -42,6 +42,10 @@ DDR5Configuration::DDR5Configuration(const TraceDB& tdb) { } QString DDR5Configuration::getQueryStr(const std::vector& commands) const { + // TODO update query text when feature is ready + // QString queryStr = "SELECT Phases.ID, Phases.PhaseName, Phases.PhaseBegin, Phases.PhaseEnd, Phases.Transact, Phases.Bank, Phases.Bankgroup, Phases.Rank, Phases.BurstLength " + // " FROM Phases " + // " WHERE PhaseName IN ("; QString queryStr = "SELECT Phases.*, Transactions.TBank, Transactions.TBankgroup, Transactions.TRank, Transactions.BurstLength " " FROM Phases " " INNER JOIN Transactions " diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/HBM2Configuration.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/HBM2Configuration.cpp index 7efa3804..e35e83d0 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/HBM2Configuration.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/HBM2Configuration.cpp @@ -41,6 +41,10 @@ HBM2Configuration::HBM2Configuration(const TraceDB& tdb) { } QString HBM2Configuration::getQueryStr(const std::vector& commands) const { + // TODO update query text when feature is ready + // QString queryStr = "SELECT Phases.ID, Phases.PhaseName, Phases.PhaseBegin, Phases.PhaseEnd, Phases.Transact, Phases.Bank, Phases.Bankgroup, Phases.Rank " + // " FROM Phases " + // " WHERE PhaseName IN ("; QString queryStr = "SELECT Phases.*, Transactions.TBank, Transactions.TBankgroup, Transactions.TRank " " FROM Phases " " INNER JOIN Transactions " diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR4Configuration.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR4Configuration.cpp index 1d736cfd..c895a7eb 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR4Configuration.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR4Configuration.cpp @@ -42,6 +42,10 @@ LPDDR4Configuration::LPDDR4Configuration(const TraceDB& tdb) { } QString LPDDR4Configuration::getQueryStr(const std::vector& commands) const { + // TODO update query text when feature is ready + // QString queryStr = "SELECT Phases.ID, Phases.PhaseName, Phases.PhaseBegin, Phases.PhaseEnd, Phases.Transact, Phases.Bank, Phases.Rank " + // " FROM Phases " + // " WHERE PhaseName IN ("; QString queryStr = "SELECT Phases.*, Transactions.TBank, Transactions.TRank " " FROM Phases " " INNER JOIN Transactions " diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR5Configuration.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR5Configuration.cpp index dd2155b1..74430065 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR5Configuration.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/configurations/specialized/LPDDR5Configuration.cpp @@ -42,6 +42,10 @@ LPDDR5Configuration::LPDDR5Configuration(const TraceDB& tdb) { } QString LPDDR5Configuration::getQueryStr(const std::vector& commands) const { + // TODO update query text when feature is ready + // QString queryStr = "SELECT Phases.ID, Phases.PhaseName, Phases.PhaseBegin, Phases.PhaseEnd, Phases.Transact, Phases.Bank, Phases.Bankgroup, Phases.Rank, Phases.BurstLength " + // " FROM Phases " + // " WHERE PhaseName IN ("; QString queryStr = "SELECT Phases.*, Transactions.TBank, Transactions.TBankgroup, Transactions.TRank, Transactions.BurstLength " " FROM Phases " " INNER JOIN Transactions " diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/DDR5dbphaseentry.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/DDR5dbphaseentry.cpp index 10c3c517..d80f87cb 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/DDR5dbphaseentry.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/DDR5dbphaseentry.cpp @@ -52,7 +52,7 @@ bool DDR5DBPhaseEntry::potentialDependency(const TimeDependency& dep, const std: auto other = std::dynamic_pointer_cast(otherPhase); if (!other) return false; - if (dep.passFunction && !dep.passFunction(shared_from_this(), other)) return false; + if (dep.passFunction && !dep.passFunction->execute(shared_from_this(), other)) return false; bool isCmdPool = dep.phaseDep == StringMapper::Identifier::CMD_BUS; diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/LPDDR5dbphaseentry.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/LPDDR5dbphaseentry.cpp index 62ec2975..f2d460d3 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/LPDDR5dbphaseentry.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/dbEntries/specialized/LPDDR5dbphaseentry.cpp @@ -51,7 +51,7 @@ bool LPDDR5DBPhaseEntry::potentialDependency(const TimeDependency& dep, const st auto other = std::dynamic_pointer_cast(otherPhase); if (!other) return false; - if (dep.passFunction && !dep.passFunction(shared_from_this(), other)) return false; + if (dep.passFunction && !dep.passFunction->execute(shared_from_this(), other)) return false; bool isCmdPool = dep.phaseDep == StringMapper::Identifier::CMD_BUS; diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.cpp index 11b62f2b..185804ce 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.cpp @@ -86,6 +86,7 @@ void TimeDependenciesInfoDDR5::mInitializeValues() { tWR = tCK * mMemspecJson["memtimingspec"].toObject()["WR"].toInt(); tCCD_L_slr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_L_slr"].toInt(); tCCD_L_WR_slr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_L_WR_slr"].toInt(); + tCCD_L_WR2_slr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_L_WR2_slr"].toInt(); tCCD_S_slr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_S_slr"].toInt(); tCCD_S_WR_slr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_S_WR_slr"].toInt(); tCCD_dlr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_dlr"].toInt(); @@ -138,8 +139,6 @@ void TimeDependenciesInfoDDR5::mInitializeValues() { } cmdLengthDiff = tCK * mMemspecJson["memarchitecturespec"].toObject()["cmdMode"].toInt(); - if (!(burstLength == 16 && bitWidth == 4)) - tCCD_L_WR_slr = tCK * mMemspecJson["memtimingspec"].toObject()["CCD_L_WR2_slr"].toInt(); tBURST16 = 8 * tCK; tBURST32 = 16 * tCK; @@ -236,16 +235,48 @@ const std::vector TimeDependenciesInfoDDR5::getPossiblePhases() { DependencyMap TimeDependenciesInfoDDR5::mSpecializedGetDependencies() const { DependencyMap dmap; - auto passBurstLength16 = [] PASSFUNCTIONDECL { - auto other = std::dynamic_pointer_cast(otherPhase); - if (!other) return false; - return other->tBurstLength == 16; - }; - auto passBurstLength32 = [] PASSFUNCTIONDECL { - auto other = std::dynamic_pointer_cast(otherPhase); - if (!other) return false; - return other->tBurstLength == 32; - }; + auto passBurstLength16 = std::make_shared( + [] PASSFUNCTIONDECL { + auto other = std::dynamic_pointer_cast(otherPhase); + if (!other) return false; + return other->tBurstLength == 16; + } + ); + auto passBurstLength32 = std::make_shared( + [] PASSFUNCTIONDECL { + auto other = std::dynamic_pointer_cast(otherPhase); + if (!other) return false; + return other->tBurstLength == 32; + } + ); + const auto localBitWidth = bitWidth; + auto passThisBL16AndBW4 = std::make_shared( + [localBitWidth] PASSFUNCTIONDECL { + auto thisP = std::dynamic_pointer_cast(thisPhase); + if (!thisP) return false; + return thisP->tBurstLength == 16 && localBitWidth == 4; + } + ); + auto passOtherBL32ThisBL16BW4 = std::make_shared( + [passBurstLength32, passThisBL16AndBW4] PASSFUNCTIONDECL { + return passBurstLength32->execute(thisPhase, otherPhase) && passThisBL16AndBW4->execute(thisPhase, otherPhase); + } + ); + auto passOtherBL32ThisNotBL16BW4 = std::make_shared( + [passBurstLength32, passThisBL16AndBW4] PASSFUNCTIONDECL { + return passBurstLength32->execute(thisPhase, otherPhase) && !passThisBL16AndBW4->execute(thisPhase, otherPhase); + } + ); + auto passOtherBL16ThisBL16BW4 = std::make_shared( + [passBurstLength16, passThisBL16AndBW4] PASSFUNCTIONDECL { + return passBurstLength16->execute(thisPhase, otherPhase) && passThisBL16AndBW4->execute(thisPhase, otherPhase); + } + ); + auto passOtherBL16ThisNotBL16BW4 = std::make_shared( + [passBurstLength16, passThisBL16AndBW4] PASSFUNCTIONDECL { + return passBurstLength16->execute(thisPhase, otherPhase) && !passThisBL16AndBW4->execute(thisPhase, otherPhase); + } + ); dmap.emplace( piecewise_construct, @@ -350,8 +381,10 @@ DependencyMap TimeDependenciesInfoDDR5::mSpecializedGetDependencies() const { {tRDWR_dpr + tBURST16, "RDA", DependencyType::IntraDIMMRank, "tRDWR_dpr + tBURST16", passBurstLength32}, {tRDWR_ddr, "RDA", DependencyType::InterDIMMRank, "tRDWR_ddr", passBurstLength16}, {tRDWR_ddr + tBURST16, "RDA", DependencyType::InterDIMMRank, "tRDWR_ddr + tBURST16", passBurstLength32}, - {tCCD_L_WR_slr, "WR", DependencyType::IntraBankGroup, "tCCD_L_WR_slr", passBurstLength16}, - {tCCD_L_WR_slr + tBURST16, "WR", DependencyType::IntraBankGroup, "tCCD_L_WR_slr + tBURST16", passBurstLength32}, + {tCCD_L_WR_slr, "WR", DependencyType::IntraBankGroup, "tCCD_L_WR_slr", passOtherBL16ThisBL16BW4}, + {tCCD_L_WR_slr + tBURST16, "WR", DependencyType::IntraBankGroup, "tCCD_L_WR_slr + tBURST16", passOtherBL32ThisBL16BW4}, + {tCCD_L_WR2_slr, "WR", DependencyType::IntraBankGroup, "tCCD_L_WR2_slr", passOtherBL16ThisNotBL16BW4}, + {tCCD_L_WR2_slr + tBURST16, "WR", DependencyType::IntraBankGroup, "tCCD_L_WR2_slr + tBURST16", passOtherBL32ThisNotBL16BW4}, {tCCD_S_WR_slr, "WR", DependencyType::IntraLogicalRank, "tCCD_S_WR_slr"}, {tCCD_WR_dlr, "WR", DependencyType::IntraPhysicalRank, "tCCD_WR_dlr", passBurstLength16}, {tBURST32, "WR", DependencyType::IntraPhysicalRank, "tBURST32", passBurstLength32}, @@ -359,8 +392,10 @@ DependencyMap TimeDependenciesInfoDDR5::mSpecializedGetDependencies() const { {tWRWR_dpr + tBURST16, "WR", DependencyType::IntraDIMMRank, "tWRWR_dpr + tBURST16", passBurstLength32}, {tWRWR_ddr, "WR", DependencyType::InterDIMMRank, "tWRWR_ddr", passBurstLength16}, {tWRWR_ddr + tBURST16, "WR", DependencyType::InterDIMMRank, "tWRWR_ddr + tBURST16", passBurstLength32}, - {tCCD_L_WR_slr, "WRA", DependencyType::IntraBankGroup, "tCCD_L_WR_slr", passBurstLength16}, - {tCCD_L_WR_slr + tBURST16, "WRA", DependencyType::IntraBankGroup, "tCCD_L_WR_slr + tBURST16", passBurstLength32}, + {tCCD_L_WR_slr, "WRA", DependencyType::IntraBankGroup, "tCCD_L_WR_slr", passOtherBL16ThisBL16BW4}, + {tCCD_L_WR_slr + tBURST16, "WRA", DependencyType::IntraBankGroup, "tCCD_L_WR_slr + tBURST16", passOtherBL32ThisBL16BW4}, + {tCCD_L_WR2_slr, "WRA", DependencyType::IntraBankGroup, "tCCD_L_WR2_slr", passOtherBL16ThisNotBL16BW4}, + {tCCD_L_WR2_slr + tBURST16, "WRA", DependencyType::IntraBankGroup, "tCCD_L_WR2_slr + tBURST16", passOtherBL32ThisNotBL16BW4}, {tCCD_S_WR_slr, "WRA", DependencyType::IntraLogicalRank, "tCCD_S_WR_slr"}, {tCCD_WR_dlr, "WRA", DependencyType::IntraPhysicalRank, "tCCD_WR_dlr", passBurstLength16}, {tBURST32, "WRA", DependencyType::IntraPhysicalRank, "tBURST32", passBurstLength32}, diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.h b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.h index 69f1d73a..fbd26766 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.h +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoDDR5.h @@ -80,6 +80,7 @@ class TimeDependenciesInfoDDR5 final : public DRAMTimeDependenciesBase { uint tWR; uint tCCD_L_slr; uint tCCD_L_WR_slr; + uint tCCD_L_WR2_slr; uint tCCD_S_slr; uint tCCD_S_WR_slr; uint tCCD_dlr; diff --git a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoLPDDR5.cpp b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoLPDDR5.cpp index 98fef2dd..d0d5ff97 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoLPDDR5.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/dramTimeDependencies/deviceDependencies/specialized/TimeDependenciesInfoLPDDR5.cpp @@ -142,16 +142,20 @@ const std::vector TimeDependenciesInfoLPDDR5::getPossiblePhases() { DependencyMap TimeDependenciesInfoLPDDR5::mSpecializedGetDependencies() const { DependencyMap dmap; - auto passBurstLength16 = [] PASSFUNCTIONDECL { - auto other = std::dynamic_pointer_cast(otherPhase); - if (!other) return false; - return other->tBurstLength == 16; - }; - auto passBurstLength32 = [] PASSFUNCTIONDECL { - auto other = std::dynamic_pointer_cast(otherPhase); - if (!other) return false; - return other->tBurstLength == 32; - }; + auto passBurstLength16 = std::make_shared( + [] PASSFUNCTIONDECL { + auto other = std::dynamic_pointer_cast(otherPhase); + if (!other) return false; + return other->tBurstLength == 16; + } + ); + auto passBurstLength32 = std::make_shared( + [] PASSFUNCTIONDECL { + auto other = std::dynamic_pointer_cast(otherPhase); + if (!other) return false; + return other->tBurstLength == 32; + } + ); dmap.emplace( piecewise_construct,