diff --git a/DRAMSys/traceAnalyzer/businessObjects/pythoncaller.cpp b/DRAMSys/traceAnalyzer/businessObjects/pythoncaller.cpp
index f44f4a16..b99f3141 100644
--- a/DRAMSys/traceAnalyzer/businessObjects/pythoncaller.cpp
+++ b/DRAMSys/traceAnalyzer/businessObjects/pythoncaller.cpp
@@ -67,7 +67,7 @@ PythonCaller::PythonCaller() :
     checkDependenciesModuleName("checkDependencies"),
     vcdExportModuleName("vcdExport"),
     vcdExportFunctionName("dumpVcd"),
-    vcdExportDependenciesFunctionName("checkVcd")
+    vcdExportDependenciesFunctionName("checkVcdExport")
 {
     Py_Initialize();
     PyObject *sysPath = PySys_GetObject((char *)"path");
@@ -93,7 +93,7 @@ PythonCaller::PythonCaller() :
     if (vcdExportDependenciesAvailable())
         pVcdExportFunction = loadFunctionFromModule(vcdExportModuleName, vcdExportFunctionName);
     else
-        std::cerr << "Warning: Python module pyvcd not installed! Exporting as VCD not possible." << std::endl;
+        std::cerr << "Warning: Python module pyvcd or tqdm not installed! Exporting as VCD not possible." << std::endl;
 }
 
 
diff --git a/DRAMSys/traceAnalyzer/scripts/checkDependencies.py b/DRAMSys/traceAnalyzer/scripts/checkDependencies.py
index 3cfe9dfd..bbb78b8c 100755
--- a/DRAMSys/traceAnalyzer/scripts/checkDependencies.py
+++ b/DRAMSys/traceAnalyzer/scripts/checkDependencies.py
@@ -35,8 +35,17 @@
 
 import importlib.util
 
+def checkTqdm():
+    if (spec := importlib.util.find_spec("tqdm")) is not None:
+        return True
+    else:
+        return False
+
 def checkVcd():
     if (spec := importlib.util.find_spec("vcd")) is not None:
         return True
     else:
         return False
+
+def checkVcdExport():
+    return checkVcd() and checkTqdm()
diff --git a/DRAMSys/traceAnalyzer/scripts/vcdExport.py b/DRAMSys/traceAnalyzer/scripts/vcdExport.py
index c1133bd2..15550a49 100755
--- a/DRAMSys/traceAnalyzer/scripts/vcdExport.py
+++ b/DRAMSys/traceAnalyzer/scripts/vcdExport.py
@@ -42,9 +42,10 @@ import math
 import datetime
 from abc import ABC, abstractmethod
 from memUtil import *
+from tqdm import tqdm
 from vcd import VCDWriter
 
-TIME_STEP = 1_000_000_000
+TIME_STEP = 1_000_000
 
 class Signal(ABC):
     def __init__(self, name):
@@ -109,6 +110,9 @@ class TimeWindow():
         else:
             raise StopIteration
 
+    def numberOfIterations(self):
+        return int(self.lastTimestamp / self.windowSize)
+
 def getGranularity(phase):
     if phase == "PRESB" or phase == "REFSB":
         return Granularity.Groupwise
@@ -326,14 +330,11 @@ def dumpVcd(pathToTrace):
                 signalType = signal.getSignalType()
                 variableDict[signal.name] = writer.register_var("DRAMSys", signal.name, signalType, init=neutralValue)
 
-            for windowRange in window:
+            for windowRange in tqdm(window, total=window.numberOfIterations(), desc="VCD export"):
                 eventDict = {}
                 transactionDict = {}
                 transactionRange = []
 
-                progress = min(windowRange[0] / window.lastTimestamp, 1.0) * 100.0
-                print("Export progress: {0:.2f}%".format(progress), file=sys.stderr)
-
                 getTransactionRange(connection, transactionRange, windowRange)
                 getTransactions(connection, transactionDict, transactionRange)
                 getReqAndRespPhases(connection, eventDict, transactionDict, windowRange)
@@ -349,8 +350,6 @@ def dumpVcd(pathToTrace):
                         if value_to_change != None:
                             writer.change(value_to_change, timestamp, event.value)
 
-        print("Export finished.", file=sys.stderr)
-
         f.seek(0)
         return f.read()