diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.xml b/DRAMSys/library/resources/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.xml new file mode 100644 index 00000000..3dddacb7 --- /dev/null +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.xml @@ -0,0 +1,98 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp index 5bfeeef6..c6a37e7e 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp @@ -65,3 +65,18 @@ sc_time MemSpecLPDDR4::getExecutionTime(Command command) const } } +TimeInterval MemSpecLPDDR4::getIntervalOnDataStrobe(Command command) const +{ + if (command == Command::RD || command == Command::RDA) + return TimeInterval(sc_time_stamp() + tRL + tDQSCK /*+ DQSQ*/, + sc_time_stamp() + tRL + tDQSCK /*+ DQSQ*/ + getReadAccessTime()); + else if (command == Command::WR || command == Command::WRA) + return TimeInterval(sc_time_stamp() + tWL /*+ tDQSS + tDQS2DQ*/, + sc_time_stamp() + tWL /*+ tDQSS + tDQS2DQ*/ + getWriteAccessTime()); + else + { + SC_REPORT_FATAL("MemSpecLPDDR4", "Method was called with invalid argument"); + return TimeInterval(); + } +} + diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.h b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.h index cbb86823..65b857c2 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.h +++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.h @@ -59,7 +59,8 @@ struct MemSpecLPDDR4 : public MemSpec double iDD62; double vDD2; - virtual sc_time getExecutionTime(Command) const override; + sc_time getExecutionTime(Command) const override; + TimeInterval getIntervalOnDataStrobe(Command) const override; }; #endif // MEMSPECLPDDR4_H