From 42f38b5789996aa4503742bf66cabfb196197bc4 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Tue, 31 Mar 2020 10:19:57 +0200 Subject: [PATCH] Changed RDA/WRA command execution times to correct values. --- .../src/configuration/ConfigurationLoader.cpp | 2 + .../src/configuration/memspec/MemSpec.cpp | 10 ---- .../src/configuration/memspec/MemSpec.h | 5 +- .../src/configuration/memspec/MemSpecDDR3.cpp | 12 ++--- .../src/configuration/memspec/MemSpecDDR4.cpp | 16 ++++--- .../configuration/memspec/MemSpecGDDR5.cpp | 20 ++++---- .../configuration/memspec/MemSpecGDDR5X.cpp | 20 ++++---- .../configuration/memspec/MemSpecGDDR6.cpp | 16 ++++--- .../src/configuration/memspec/MemSpecHBM2.cpp | 16 ++++--- .../configuration/memspec/MemSpecLPDDR4.cpp | 16 ++++--- .../configuration/memspec/MemSpecWideIO.cpp | 16 ++++--- .../configuration/memspec/MemSpecWideIO2.cpp | 16 ++++--- .../src/controller/checker/CheckerDDR3.cpp | 24 +++++----- .../src/controller/checker/CheckerDDR3.h | 2 - .../src/controller/checker/CheckerDDR4.cpp | 26 +++++------ .../src/controller/checker/CheckerDDR4.h | 2 - .../src/controller/checker/CheckerGDDR5.cpp | 24 +++++----- .../src/controller/checker/CheckerGDDR5.h | 2 - .../src/controller/checker/CheckerGDDR5X.cpp | 24 +++++----- .../src/controller/checker/CheckerGDDR5X.h | 2 - .../src/controller/checker/CheckerGDDR6.cpp | 24 +++++----- .../src/controller/checker/CheckerGDDR6.h | 2 - .../src/controller/checker/CheckerHBM2.cpp | 46 +++++++++---------- .../src/controller/checker/CheckerHBM2.h | 6 +-- .../src/controller/checker/CheckerLPDDR4.cpp | 28 +++++------ .../src/controller/checker/CheckerWideIO.cpp | 38 ++++++++------- .../src/controller/checker/CheckerWideIO.h | 2 - .../src/controller/checker/CheckerWideIO2.cpp | 34 +++++++------- 28 files changed, 223 insertions(+), 228 deletions(-) diff --git a/DRAMSys/library/src/configuration/ConfigurationLoader.cpp b/DRAMSys/library/src/configuration/ConfigurationLoader.cpp index df74db3e..70bb2e2f 100644 --- a/DRAMSys/library/src/configuration/ConfigurationLoader.cpp +++ b/DRAMSys/library/src/configuration/ConfigurationLoader.cpp @@ -224,6 +224,8 @@ void ConfigurationLoader::loadCommons(Configuration &config, XMLElement *xmlSpec XMLElement *timings = xmlSpec->FirstChildElement("memtimingspec"); memSpec->clkMHz = queryDoubleParameter(timings, "clkMhz"); memSpec->clk = sc_time(1.0 / memSpec->clkMHz, SC_US); + + memSpec->burstDuration = memSpec->clk * (memSpec->burstLength / memSpec->dataRate); } void ConfigurationLoader::loadDDR3(Configuration &config, XMLElement *xmlSpec) diff --git a/DRAMSys/library/src/configuration/memspec/MemSpec.cpp b/DRAMSys/library/src/configuration/memspec/MemSpec.cpp index 03ac9b1b..ade57e7b 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpec.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpec.cpp @@ -57,16 +57,6 @@ const std::vector &MemSpec::getBanks() const return banks; } -sc_time MemSpec::getReadAccessTime() const -{ - return clk * (burstLength / dataRate); -} - -sc_time MemSpec::getWriteAccessTime() const -{ - return clk * (burstLength / dataRate); -} - sc_time MemSpec::getCommandLength(Command command) const { return clk * commandLengthInCycles[command]; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpec.h b/DRAMSys/library/src/configuration/memspec/MemSpec.h index f9f4350e..9363c318 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpec.h +++ b/DRAMSys/library/src/configuration/memspec/MemSpec.h @@ -53,9 +53,6 @@ struct MemSpec const std::vector &getBanks() const; - sc_time getWriteAccessTime() const; - sc_time getReadAccessTime() const; - virtual sc_time getRefreshIntervalAB() const = 0; virtual sc_time getRefreshIntervalPB() const = 0; @@ -84,6 +81,8 @@ struct MemSpec double clkMHz; sc_time clk; + sc_time burstDuration; + // Command lengths on bus, usually one clock cycle std::vector commandLengthInCycles; }; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp index 26643e26..53fe1db8 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp @@ -54,13 +54,13 @@ sc_time MemSpecDDR3::getExecutionTime(Command command, const tlm_generic_payload else if (command == Command::ACT) return tRCD; else if (command == Command::RD) - return tRL + getReadAccessTime(); + return tRL + burstDuration; else if (command == Command::RDA) - return tRL + getReadAccessTime(); + return tRTP + tRP; else if (command == Command::WR) - return tWL + getWriteAccessTime(); + return tWL + burstDuration; else if (command == Command::WRA) - return tWL + getWriteAccessTime(); + return tWL + burstDuration + tWR + tRP; else if (command == Command::REFA) return tRFC; else @@ -74,9 +74,9 @@ sc_time MemSpecDDR3::getExecutionTime(Command command, const tlm_generic_payload TimeInterval MemSpecDDR3::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) - return TimeInterval(sc_time_stamp() + tRL, sc_time_stamp() + tRL + getReadAccessTime()); + return TimeInterval(sc_time_stamp() + tRL, sc_time_stamp() + tRL + burstDuration); else if (command == Command::WR || command == Command::WRA) - return TimeInterval(sc_time_stamp() + tWL, sc_time_stamp() + tWL + getWriteAccessTime()); + return TimeInterval(sc_time_stamp() + tWL, sc_time_stamp() + tWL + burstDuration); else { SC_REPORT_FATAL("MemSpec", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp index ec53fd9a..f7e87256 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp @@ -53,10 +53,14 @@ sc_time MemSpecDDR4::getExecutionTime(Command command, const tlm_generic_payload return tRP; else if (command == Command::ACT) return tRCD; - else if (command == Command::RD || command == Command::RDA) - return tRL + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + getWriteAccessTime(); + else if (command == Command::RD) + return tRL + burstDuration; + else if (command == Command::RDA) + return tRTP + tRP; + else if (command == Command::WR) + return tWL + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + tWR + tRP; else if (command == Command::REFA) return tRFC; else @@ -70,9 +74,9 @@ sc_time MemSpecDDR4::getExecutionTime(Command command, const tlm_generic_payload TimeInterval MemSpecDDR4::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) - return TimeInterval(sc_time_stamp() + tRL, sc_time_stamp() + tRL + getReadAccessTime()); + return TimeInterval(sc_time_stamp() + tRL, sc_time_stamp() + tRL + burstDuration); else if (command == Command::WR || command == Command::WRA) - return TimeInterval(sc_time_stamp() + tWL, sc_time_stamp() + tWL + getWriteAccessTime()); + return TimeInterval(sc_time_stamp() + tWL, sc_time_stamp() + tWL + burstDuration); else { SC_REPORT_FATAL("MemSpec", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp index 5bcbcbc6..5c19c5c4 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp @@ -52,14 +52,18 @@ sc_time MemSpecGDDR5::getExecutionTime(Command command, const tlm_generic_payloa else if (command == Command::ACT) { if (payload.get_command() == TLM_READ_COMMAND) - return tRCDRD + clk; + return tRCDRD; else - return tRCDWR + clk; + return tRCDWR; } - else if (command == Command::RD || command == Command::RDA) - return tCL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + getWriteAccessTime(); + else if (command == Command::RD) + return tCL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + burstDuration; + else if (command == Command::RDA) + return tRTP + tRP; + else if (command == Command::WR) + return tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + tWR + tRP; else if (command == Command::REFA) return tRFC; else if (command == Command::REFB) @@ -76,10 +80,10 @@ TimeInterval MemSpecGDDR5::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tCL + tWCK2CKPIN + tWCK2CK + tWCK2DQO, - sc_time_stamp() + tCL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + getReadAccessTime()); + sc_time_stamp() + tCL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + burstDuration); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI, - sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + getWriteAccessTime()); + sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + burstDuration); else { SC_REPORT_FATAL("MemSpecGDDR5", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp index d7e148f6..a42b6b93 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp @@ -52,14 +52,18 @@ sc_time MemSpecGDDR5X::getExecutionTime(Command command, const tlm_generic_paylo else if (command == Command::ACT) { if (payload.get_command() == TLM_READ_COMMAND) - return tRCDRD + clk; + return tRCDRD; else - return tRCDWR + clk; + return tRCDWR; } - else if (command == Command::RD || command == Command::RDA) - return tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + getWriteAccessTime(); + else if (command == Command::RD) + return tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + burstDuration; + else if (command == Command::RDA) + return tRTP + tRP; + else if (command == Command::WR) + return tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + tWR + tRP; else if (command == Command::REFA) return tRFC; else if (command == Command::REFB) @@ -76,10 +80,10 @@ TimeInterval MemSpecGDDR5X::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO, - sc_time_stamp() + tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + getReadAccessTime()); + sc_time_stamp() + tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + burstDuration); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI, - sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + getWriteAccessTime()); + sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + burstDuration); else { SC_REPORT_FATAL("MemSpecGDDR5X", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp index 9be62f01..14befb19 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp @@ -56,10 +56,14 @@ sc_time MemSpecGDDR6::getExecutionTime(Command command, const tlm_generic_payloa else return tRCDWR + clk; } - else if (command == Command::RD || command == Command::RDA) - return tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + getWriteAccessTime(); + else if (command == Command::RD) + return tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + burstDuration; + else if (command == Command::RDA) + return tRTP + tRP; + else if (command == Command::WR) + return tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + tWR + tRP; else if (command == Command::REFA) return tRFC; else if (command == Command::REFB) @@ -76,10 +80,10 @@ TimeInterval MemSpecGDDR6::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO, - sc_time_stamp() + tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + getReadAccessTime()); + sc_time_stamp() + tRL + tWCK2CKPIN + tWCK2CK + tWCK2DQO + burstDuration); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI, - sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + getWriteAccessTime()); + sc_time_stamp() + tWL + tWCK2CKPIN + tWCK2CK + tWCK2DQI + burstDuration); else { SC_REPORT_FATAL("MemSpecGDDR6", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp index 6c8065c4..2b661eea 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp @@ -61,10 +61,14 @@ sc_time MemSpecHBM2::getExecutionTime(Command command, const tlm_generic_payload else return tRCDWR + clk; } - else if (command == Command::RD || command == Command::RDA) - return tRL + tDQSCK + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + getWriteAccessTime(); + else if (command == Command::RD) + return tRL + tDQSCK + burstDuration; + else if (command == Command::RDA) + return tRTP + tRP; + else if (command == Command::WR) + return tWL + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + tWR + tRP; else if (command == Command::REFA) return tRFC; else if (command == Command::REFB) @@ -81,10 +85,10 @@ TimeInterval MemSpecHBM2::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tRL + tDQSCK, - sc_time_stamp() + tRL + tDQSCK + getReadAccessTime()); + sc_time_stamp() + tRL + tDQSCK + burstDuration); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL, - sc_time_stamp() + tWL + getWriteAccessTime()); + sc_time_stamp() + tWL + burstDuration); else { SC_REPORT_FATAL("MemSpecHBM2", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp index d24a9908..6fa0fe2d 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp @@ -68,10 +68,14 @@ sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_paylo return tRPab + clk; else if (command == Command::ACT) return tRCD + 3 * clk; - else if (command == Command::RD || command == Command::RDA) - return tRL + tDQSCK + getReadAccessTime() + 3 * clk; - else if (command == Command::WR || command == Command::WRA) - return tWL + tDQSS + tDQS2DQ + getWriteAccessTime() + 3 * clk; + else if (command == Command::RD) + return tRL + tDQSCK + burstDuration + 3 * clk; + else if (command == Command::RDA) + return burstDuration + tRTP - 5 * clk + tRPpb; + else if (command == Command::WR) + return tWL + tDQSS + tDQS2DQ + burstDuration + 3 * clk; + else if (command == Command::WRA) + return tWL + 4 * clk + burstDuration + tWR + tRPpb; else if (command == Command::REFA) return tRFCab + clk; else if (command == Command::REFB) @@ -88,10 +92,10 @@ TimeInterval MemSpecLPDDR4::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tRL + tDQSCK + 3 * clk, - sc_time_stamp() + tRL + tDQSCK + getReadAccessTime() + 3 * clk); + sc_time_stamp() + tRL + tDQSCK + burstDuration + 3 * clk); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL + tDQSS + tDQS2DQ + 3 * clk, - sc_time_stamp() + tWL + tDQSS + tDQS2DQ + getWriteAccessTime() + 3 * clk); + sc_time_stamp() + tWL + tDQSS + tDQS2DQ + burstDuration + 3 * clk); else { SC_REPORT_FATAL("MemSpecLPDDR4", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp index af3af2b4..6b6200ab 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp @@ -53,10 +53,14 @@ sc_time MemSpecWideIO::getExecutionTime(Command command, const tlm_generic_paylo return tRP; else if (command == Command::ACT) return tRCD; - else if (command == Command::RD || command == Command::RDA) - return tRL + tAC + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + getWriteAccessTime(); + else if (command == Command::RD) + return tRL + tAC + burstDuration; + else if (command == Command::RDA) + return burstDuration + tRP; + else if (command == Command::WR) + return tWL + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration - clk + tWR + tRP; else if (command == Command::REFA) return tRFC; else @@ -71,10 +75,10 @@ TimeInterval MemSpecWideIO::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tRL + tAC, - sc_time_stamp() + tRL + tAC + getReadAccessTime()); + sc_time_stamp() + tRL + tAC + burstDuration); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL, - sc_time_stamp() + tWL + getWriteAccessTime()); + sc_time_stamp() + tWL + burstDuration); else { SC_REPORT_FATAL("MemSpec", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp index 7d122e17..409ffadd 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp @@ -54,10 +54,14 @@ sc_time MemSpecWideIO2::getExecutionTime(Command command, const tlm_generic_payl return tRPab; else if (command == Command::ACT) return tRCD; - else if (command == Command::RD || command == Command::RDA) - return tRL + tDQSCK + getReadAccessTime(); - else if (command == Command::WR || command == Command::WRA) - return tWL + tDQSS + getWriteAccessTime(); + else if (command == Command::RD) + return tRL + tDQSCK + burstDuration; + else if (command == Command::RDA) + return burstDuration - 2 * clk + tRTP + tRPpb; + else if (command == Command::WR) + return tWL + tDQSS + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + clk + tWR + tRPpb; else if (command == Command::REFA) return tRFCab; else if (command == Command::REFB) @@ -74,10 +78,10 @@ TimeInterval MemSpecWideIO2::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) return TimeInterval(sc_time_stamp() + tRL + tDQSCK, - sc_time_stamp() + tRL + tDQSCK + getReadAccessTime()); + sc_time_stamp() + tRL + tDQSCK + burstDuration); else if (command == Command::WR || command == Command::WRA) return TimeInterval(sc_time_stamp() + tWL + tDQSS, - sc_time_stamp() + tWL + tDQSS + getWriteAccessTime()); + sc_time_stamp() + tWL + tDQSS + burstDuration); else { SC_REPORT_FATAL("MemSpec", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp b/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp index 3b9462a9..7fe0dae9 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerDDR3.cpp @@ -48,8 +48,6 @@ CheckerDDR3::CheckerDDR3() lastScheduledByCommand = std::vector(numberOfCommands()); lastActivates = std::vector>(memSpec->numberOfRanks); - - burstClocks = (memSpec->burstLength / memSpec->dataRate) * memSpec->clk; } sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) const @@ -66,7 +64,7 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -123,20 +121,20 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTR); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTR); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -154,12 +152,12 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tRL + burstClocks + 2 * memSpec->clk - memSpec->tWL); + + memSpec->tRL + memSpec->burstDuration + 2 * memSpec->clk - memSpec->tWL); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tRL + burstClocks + 2 * memSpec->clk - memSpec->tWL); + + memSpec->tRL + memSpec->burstDuration + 2 * memSpec->clk - memSpec->tWL); lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) @@ -189,7 +187,7 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -211,12 +209,12 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -235,7 +233,7 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -330,7 +328,7 @@ sc_time CheckerDDR3::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + std::max(memSpec->tWL + 5 * memSpec->clk + memSpec->tWR, memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP)); + + std::max(memSpec->tWL + 5 * memSpec->clk + memSpec->tWR, memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP)); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR3.h b/DRAMSys/library/src/controller/checker/CheckerDDR3.h index 022902e4..bf86b726 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR3.h +++ b/DRAMSys/library/src/controller/checker/CheckerDDR3.h @@ -58,8 +58,6 @@ private: // Four activate window std::vector> lastActivates; - - sc_time burstClocks; }; #endif // CHECKERDDR3_H diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp index 6272c328..adb156b3 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerDDR4.cpp @@ -50,8 +50,6 @@ CheckerDDR4::CheckerDDR4() lastScheduledByCommand = std::vector(numberOfCommands()); lastActivates = std::vector>(memSpec->numberOfRanks); - - burstClocks = (memSpec->burstLength / memSpec->dataRate) * memSpec->clk; } sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGroup bankgroup, Bank bank) const @@ -68,7 +66,7 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -121,30 +119,30 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWTR_L); + + memSpec->burstDuration + memSpec->tWTR_L); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWTR_S); + + memSpec->burstDuration + memSpec->tWTR_S); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWTR_L); + + memSpec->burstDuration + memSpec->tWTR_L); lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWTR_S); + + memSpec->burstDuration + memSpec->tWTR_S); } else if (command == Command::WR || command == Command::WRA) { @@ -154,12 +152,12 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRL - + burstClocks + 2 * memSpec->clk - memSpec->tWL); + + memSpec->burstDuration + 2 * memSpec->clk - memSpec->tWL); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRL - + burstClocks + 2 * memSpec->clk - memSpec->tWL); + + memSpec->burstDuration + 2 * memSpec->clk - memSpec->tWL); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -189,7 +187,7 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWR); + + memSpec->burstDuration + memSpec->tWR); } else if (command == Command::PREA) { @@ -207,12 +205,12 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWR); + + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWR); + + memSpec->burstDuration + memSpec->tWR); } else if (command == Command::REFA) { @@ -227,7 +225,7 @@ sc_time CheckerDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) diff --git a/DRAMSys/library/src/controller/checker/CheckerDDR4.h b/DRAMSys/library/src/controller/checker/CheckerDDR4.h index b3c86a99..3f14d754 100644 --- a/DRAMSys/library/src/controller/checker/CheckerDDR4.h +++ b/DRAMSys/library/src/controller/checker/CheckerDDR4.h @@ -59,8 +59,6 @@ private: // Four activate window std::vector> lastActivates; - - sc_time burstClocks; }; #endif // CHECKERDDR4_H diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp b/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp index a67ed71a..9db728d2 100644 --- a/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerGDDR5.cpp @@ -51,8 +51,6 @@ CheckerGDDR5::CheckerGDDR5() last4Activates = std::vector>(memSpec->numberOfRanks); last32Activates = std::vector>(memSpec->numberOfRanks); - - burstClocks = (memSpec->burstLength / memSpec->dataRate) * memSpec->clk; } sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankGroup bankgroup, Bank bank) const @@ -81,7 +79,7 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -133,30 +131,30 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); } else if (command == Command::WR || command == Command::WRA) { @@ -199,7 +197,7 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -221,12 +219,12 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -245,7 +243,7 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -280,7 +278,7 @@ sc_time CheckerGDDR5::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR5.h b/DRAMSys/library/src/controller/checker/CheckerGDDR5.h index 1ce6a54d..937fd853 100644 --- a/DRAMSys/library/src/controller/checker/CheckerGDDR5.h +++ b/DRAMSys/library/src/controller/checker/CheckerGDDR5.h @@ -61,8 +61,6 @@ private: std::vector> last4Activates; std::vector> last32Activates; - sc_time burstClocks; - unsigned bankwiseRefreshCounter = 0; }; diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp b/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp index d84c715f..4796866b 100644 --- a/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerGDDR5X.cpp @@ -51,8 +51,6 @@ CheckerGDDR5X::CheckerGDDR5X() last4Activates = std::vector>(memSpec->numberOfRanks); last32Activates = std::vector>(memSpec->numberOfRanks); - - burstClocks = (memSpec->burstLength / memSpec->dataRate) * memSpec->clk; } sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, BankGroup bankgroup, Bank bank) const @@ -81,7 +79,7 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -133,30 +131,30 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); } else if (command == Command::WR || command == Command::WRA) { @@ -199,7 +197,7 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -221,12 +219,12 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -245,7 +243,7 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -280,7 +278,7 @@ sc_time CheckerGDDR5X::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR5X.h b/DRAMSys/library/src/controller/checker/CheckerGDDR5X.h index d77b9e5c..8f838914 100644 --- a/DRAMSys/library/src/controller/checker/CheckerGDDR5X.h +++ b/DRAMSys/library/src/controller/checker/CheckerGDDR5X.h @@ -61,8 +61,6 @@ private: std::vector> last4Activates; std::vector> last32Activates; - sc_time burstClocks; - unsigned bankwiseRefreshCounter = 0; }; diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp b/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp index d93c0b71..9ac73b89 100644 --- a/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerGDDR6.cpp @@ -50,8 +50,6 @@ CheckerGDDR6::CheckerGDDR6() lastScheduledByCommand = std::vector(numberOfCommands()); lastActivates = std::vector>(memSpec->numberOfRanks); - - burstClocks = (memSpec->burstLength / memSpec->dataRate) * memSpec->clk; } sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankGroup bankgroup, Bank bank) const @@ -80,7 +78,7 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -129,30 +127,30 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); } else if (command == Command::WR || command == Command::WRA) { @@ -195,7 +193,7 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -217,12 +215,12 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -241,7 +239,7 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -276,7 +274,7 @@ sc_time CheckerGDDR6::timeToSatisfyConstraints(Command command, Rank rank, BankG lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) diff --git a/DRAMSys/library/src/controller/checker/CheckerGDDR6.h b/DRAMSys/library/src/controller/checker/CheckerGDDR6.h index a0fdd8bf..501c0da6 100644 --- a/DRAMSys/library/src/controller/checker/CheckerGDDR6.h +++ b/DRAMSys/library/src/controller/checker/CheckerGDDR6.h @@ -60,8 +60,6 @@ private: // four activate window std::vector> lastActivates; - sc_time burstClocks; - unsigned bankwiseRefreshCounter = 0; }; diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp index c1b45e3d..097233d3 100644 --- a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp @@ -51,8 +51,6 @@ CheckerHBM2::CheckerHBM2() lastActivates = std::vector>(memSpec->numberOfRanks); bankwiseRefreshCounter = std::vector(memSpec->numberOfRanks); - - burstClocks = (memSpec->burstLength / 2) * memSpec->clk; } sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGroup bankgroup, Bank bank) const @@ -82,7 +80,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP - memSpec->clk); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP - memSpec->clk); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -108,7 +106,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr earliestTimeToStart = std::max(earliestTimeToStart, lastActivates[rank.ID()].front() + memSpec->tFAW - memSpec->clk); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->clk); } else if (command == Command::RD || command == Command::RDA) { @@ -134,32 +132,32 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WR][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::WRA][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRL); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRL); lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWTRS); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWTRS); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->clk); } else if (command == Command::WR || command == Command::WRA) { @@ -190,7 +188,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCDS); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->clk); } else if (command == Command::PRE) { @@ -204,9 +202,9 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->clk); } else if (command == Command::PREA) { @@ -224,14 +222,14 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->clk); } else if (command == Command::REFA) { @@ -246,7 +244,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -260,7 +258,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->clk); } else if (command == Command::REFB) { @@ -283,7 +281,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -305,7 +303,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr if (lastActivates[rank.ID()].size() == 4) earliestTimeToStart = std::max(earliestTimeToStart, lastActivates[rank.ID()].front() + memSpec->tFAW); - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRASBus + memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->clk); } else { @@ -326,17 +324,17 @@ void CheckerHBM2::insert(Command command, Rank rank, BankGroup bankgroup, Bank b lastScheduledByCommand[command] = sc_time_stamp(); if (isCasCommand(command)) - lastCommandOnCASBus = sc_time_stamp(); + lastCommandOnCasBus = sc_time_stamp(); else if (command == Command::ACT) - lastCommandOnRASBus = sc_time_stamp() + memSpec->clk; + lastCommandOnRasBus = sc_time_stamp() + memSpec->clk; else - lastCommandOnRASBus = sc_time_stamp(); + lastCommandOnRasBus = sc_time_stamp(); if (command == Command::ACT || command == Command::REFB) { if (lastActivates[rank.ID()].size() == 4) lastActivates[rank.ID()].pop(); - lastActivates[rank.ID()].push(lastCommandOnRASBus); + lastActivates[rank.ID()].push(lastCommandOnRasBus); } if (command == Command::REFB) diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM2.h b/DRAMSys/library/src/controller/checker/CheckerHBM2.h index 6ba92816..77b27f64 100644 --- a/DRAMSys/library/src/controller/checker/CheckerHBM2.h +++ b/DRAMSys/library/src/controller/checker/CheckerHBM2.h @@ -55,14 +55,12 @@ private: std::vector> lastScheduledByCommandAndBankGroup; std::vector> lastScheduledByCommandAndRank; std::vector lastScheduledByCommand; - sc_time lastCommandOnRASBus; - sc_time lastCommandOnCASBus; + sc_time lastCommandOnRasBus; + sc_time lastCommandOnCasBus; // Four activate window std::vector> lastActivates; std::vector bankwiseRefreshCounter; - - sc_time burstClocks; }; #endif // CHECKERHBM2_H diff --git a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp index de447df5..4313861b 100644 --- a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp @@ -63,7 +63,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->tCCD + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; @@ -112,19 +112,19 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->clk + memSpec->burstDuration + memSpec->tWTR); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->clk + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->clk + memSpec->burstDuration + memSpec->tWTR); } else if (command == Command::WR || command == Command::WRA) { @@ -133,11 +133,11 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRL + memSpec->tDQSCK + memSpec->tCCD - memSpec->tWL + memSpec->tWPRE + memSpec->tRPST); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRL + memSpec->tDQSCK + memSpec->burstDuration - memSpec->tWL + memSpec->tWPRE + memSpec->tRPST); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRL + memSpec->tDQSCK + memSpec->tCCD - memSpec->tWL + memSpec->tWPRE + memSpec->tRPST); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRL + memSpec->tDQSCK + memSpec->burstDuration - memSpec->tWL + memSpec->tWPRE + memSpec->tRPST); lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) @@ -154,11 +154,11 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD + memSpec->tRTP - 6 * memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration + memSpec->tRTP - 6 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->tCCD + memSpec->tWR + 3 * memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + 3 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -171,19 +171,19 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD + memSpec->tRTP - 6 * memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration + memSpec->tRTP - 6 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCCD + memSpec->tRTP - 6 * memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration + memSpec->tRTP - 6 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->tCCD + memSpec->tWR + 3 * memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + 3 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->tCCD + memSpec->tWR + 3 * memSpec->clk); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + 3 * memSpec->clk); // lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; // if (lastCommandStart != SC_ZERO_TIME) @@ -205,7 +205,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->tCCD + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + 3 * memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; @@ -240,7 +240,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->tCCD + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + 3 * memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp b/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp index ee1b6552..16aa444e 100644 --- a/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerWideIO.cpp @@ -48,8 +48,6 @@ CheckerWideIO::CheckerWideIO() lastScheduledByCommand = std::vector(numberOfCommands()); lastActivates = std::vector>(memSpec->numberOfRanks); - - burstClocks = memSpec->burstLength * memSpec->clk; } sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) const @@ -61,12 +59,12 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks + memSpec->tRP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tWL - + burstClocks - memSpec->clk + memSpec->tWR + memSpec->tRP); + + memSpec->burstDuration - memSpec->clk + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -98,16 +96,16 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWTR); + + memSpec->tWL + memSpec->burstDuration - memSpec->clk + memSpec->tWTR); if (command == Command::RDA) { @@ -120,7 +118,7 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWTR); + + memSpec->tWL + memSpec->burstDuration - memSpec->clk + memSpec->tWTR); } else if (command == Command::WR || command == Command::WRA) { @@ -130,20 +128,20 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tRL + burstClocks + memSpec->clk); + + memSpec->tRL + memSpec->burstDuration + memSpec->clk); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tRL + burstClocks + memSpec->clk); + + memSpec->tRL + memSpec->burstDuration + memSpec->clk); lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); } else if (command == Command::PRE) { @@ -152,12 +150,12 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration - memSpec->clk + memSpec->tWR); } else if (command == Command::PREA) { @@ -166,21 +164,21 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration); lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration - memSpec->clk + memSpec->tWR); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWR); + + memSpec->tWL + memSpec->burstDuration - memSpec->clk + memSpec->tWR); } else if (command == Command::REFA) { @@ -190,12 +188,12 @@ sc_time CheckerWideIO::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + burstClocks + memSpec->tRP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->burstDuration + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + burstClocks - memSpec->clk + memSpec->tWR + memSpec->tRP); + + memSpec->tWL + memSpec->burstDuration - memSpec->clk + memSpec->tWR + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO.h b/DRAMSys/library/src/controller/checker/CheckerWideIO.h index 105078d0..65a8adee 100644 --- a/DRAMSys/library/src/controller/checker/CheckerWideIO.h +++ b/DRAMSys/library/src/controller/checker/CheckerWideIO.h @@ -58,8 +58,6 @@ private: // Four activate window std::vector> lastActivates; - - sc_time burstClocks; }; #endif // CHECKERWIDEIO_H diff --git a/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp b/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp index 4ca29658..22fb6c70 100644 --- a/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerWideIO2.cpp @@ -68,12 +68,12 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tCCD + memSpec->tRTP - 2 * memSpec->clk + memSpec->tRPpb); + + memSpec->burstDuration + memSpec->tRTP - 2 * memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->clk + memSpec->tRPpb); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -114,20 +114,20 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR); + + memSpec->tWL + memSpec->clk + memSpec->burstDuration + memSpec->tWTR); if (command == Command::RDA) { lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWR - memSpec->tRTP); + + memSpec->tWL + memSpec->clk + memSpec->burstDuration + memSpec->tWR - memSpec->tRTP); } lastCommandStart = lastScheduledByCommand[Command::WRA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->clk + memSpec->tCCD + memSpec->tWTR); + + memSpec->tWL + memSpec->clk + memSpec->burstDuration + memSpec->tWTR); } else if (command == Command::WR || command == Command::WRA) { @@ -137,12 +137,12 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommand[Command::RD]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tRL + memSpec->tDQSCK + memSpec->tCCD + memSpec->clk - memSpec->tWL); + + memSpec->tRL + memSpec->tDQSCK + memSpec->burstDuration + memSpec->clk - memSpec->tWL); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tRL + memSpec->tDQSCK + memSpec->tCCD + memSpec->clk - memSpec->tWL); + + memSpec->tRL + memSpec->tDQSCK + memSpec->burstDuration + memSpec->clk - memSpec->tWL); lastCommandStart = lastScheduledByCommand[Command::WR]; if (lastCommandStart != SC_ZERO_TIME) @@ -160,12 +160,12 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tCCD + memSpec->tRTP - 2 * memSpec->clk); + + memSpec->burstDuration + memSpec->tRTP - 2 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndBank[Command::WR][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->clk); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk); } else if (command == Command::PREA) { @@ -175,22 +175,22 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tCCD + memSpec->tRTP - 2 * memSpec->clk); + + memSpec->burstDuration + memSpec->tRTP - 2 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tCCD + memSpec->tRTP - 2 * memSpec->clk); + + memSpec->burstDuration + memSpec->tRTP - 2 * memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::WR][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->clk); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->clk); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -205,12 +205,12 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tCCD + memSpec->tRTP - 2 * memSpec->clk + memSpec->tRPpb); + + memSpec->burstDuration + memSpec->tRTP - 2 * memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndRank[Command::WRA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->clk + memSpec->tRPpb); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndRank[Command::PRE][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -237,12 +237,12 @@ sc_time CheckerWideIO2::timeToSatisfyConstraints(Command command, Rank rank, Ban lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tCCD + memSpec->tRTP - 2 * memSpec->clk + memSpec->tRPpb); + + memSpec->burstDuration + memSpec->tRTP - 2 * memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart - + memSpec->tWL + memSpec->tCCD + memSpec->tWR + memSpec->clk + memSpec->tRPpb); + + memSpec->tWL + memSpec->burstDuration + memSpec->tWR + memSpec->clk + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME)