Add HBM3 regression test

tests/tests_regression/CMakeLists.txt

@@ -95,3 +95,4 @@ test_standard(DDR4 ${CMAKE_CURRENT_SOURCE_DIR}/DDR4/ddr4-example.json ${CMAKE_CU
 test_standard(LPDDR4 ${CMAKE_CURRENT_SOURCE_DIR}/LPDDR4/lpddr4-example.json ${CMAKE_CURRENT_SOURCE_DIR}/LPDDR4 DRAMSys_lpddr4-example_lpddr4_ch0.tdb)
 test_standard(HBM2.Ch0 ${CMAKE_CURRENT_SOURCE_DIR}/HBM2/hbm2-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM2 DRAMSys_hbm2-example_hbm2_ch0.tdb)
 test_standard(HBM2.Ch1 ${CMAKE_CURRENT_SOURCE_DIR}/HBM2/hbm2-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM2 DRAMSys_hbm2-example_hbm2_ch1.tdb)
+test_standard(HBM3 ${CMAKE_CURRENT_SOURCE_DIR}/HBM3/hbm3-example.json ${CMAKE_CURRENT_SOURCE_DIR}/HBM3 DRAMSys_hbm3-example_hbm3_ch0.tdb)

tests/tests_regression/HBM3/hbm3-example.json

@@ -0,0 +1,138 @@
+{
+    "simulation": {
+        "addressmapping": {
+            "PSEUDOCHANNEL_BIT":[
+                29
+            ],
+            "BANKGROUP_BIT":[
+                27,
+                28
+            ],
+            "BANK_BIT": [
+                25,
+                26
+            ],
+            "BYTE_BIT": [
+                0,
+                1
+            ],
+            "COLUMN_BIT": [
+                2,
+                3,
+                4,
+                5,
+                6,
+                7,
+                8
+            ],
+            "ROW_BIT": [
+                9,
+                10,
+                11,
+                12,
+                13,
+                14,
+                15,
+                16,
+                17,
+                18,
+                19,
+                20,
+                21,
+                22,
+                23,
+                24
+            ]
+        },
+        "mcconfig": {
+            "PagePolicy": "Closed",
+            "Scheduler": "Fifo",
+            "RequestBufferSize": 8,
+            "CmdMux": "Strict",
+            "RespQueue": "Fifo",
+            "RefreshPolicy": "NoRefresh",
+            "RefreshMaxPostponed": 0,
+            "RefreshMaxPulledin": 0,
+            "PowerDownPolicy": "NoPowerDown",
+            "PowerDownTimeout": 100
+        },
+        "memspec": {
+            "memarchitecturespec": {
+                "burstLength": 8,
+                "dataRate": 4,
+                "nbrOfBankGroups": 4,
+                "nbrOfBanks": 16,
+                "nbrOfColumns": 128,
+                "nbrOfPseudoChannels": 2,
+                "nbrOfRows": 65536,
+                "width": 32,
+                "nbrOfDevices": 1,
+                "nbrOfChannels": 1,
+                "RAAIMT" : 16,
+                "RAAMMT" : 96,
+                "RAADEC" : 16
+            },
+            "memoryId": "",
+            "memoryType": "HBM3",
+            "memtimingspec": {
+                "CCDL": 4,
+                "CCDS": 2,
+                "CKE": 8,
+                "DQSCK": 1,
+                "FAW": 16, 
+                "PL": 0,
+                "PPD": 2,
+                "RAS": 28,
+                "RC": 42,
+                "RCDRD": 12,
+                "RCDWR": 6,
+                "REFI": 3900,
+                "REFIPB": 122,
+                "RFC": 260,
+                "RFCPB": 96,
+                "RL": 17,
+                "RP": 14,
+                "RRDL": 6,
+                "RRDS": 4,
+                "RREFD": 8,
+                "RTP": 5,
+                "RTW": 18,
+                "WL": 12,
+                "WR": 23,
+                "WTRL": 9,
+                "WTRS": 4,
+                "XP": 8,
+                "XS": 260,
+                "clkMhz": 1600
+            }
+        },
+        "simconfig": {
+            "AddressOffset": 0,
+            "CheckTLM2Protocol": false,
+            "DatabaseRecording": true,
+            "Debug": false,
+            "ECCControllerMode": "Disabled",
+            "EnableWindowing": false,
+            "ErrorCSVFile": "",
+            "ErrorChipSeed": 42,
+            "PowerAnalysis": false,
+            "SimulationName": "hbm3",
+            "SimulationProgressBar": true,
+            "StoreMode": "NoStorage",
+            "ThermalSimulation": false,
+            "UseMalloc": false,
+            "WindowSize": 1000
+        },
+        "simulationid": "hbm3-example",
+        "tracesetup": [
+            {
+                "clkMhz": 1000,
+                "name": "trace1_test4.stl"
+            },
+	    {
+                "clkMhz": 1000,
+                "name": "trace2_test4.stl"
+            }
+        ]
+    }
+}