Readme updated

This commit is contained in:
Matthias Jung
2017-02-19 14:57:52 +01:00
parent 6713046d47
commit 42887ad0eb

723
README.md
View File

@@ -474,61 +474,363 @@ The IP address and the port number related to the server shall be informed in
DRAMSys' configuration to subsequent use by DRAMSys to access the thermal
simulation server.
#### Usage Example
### DRAMSys Configuration
The **dramSys** executable supports one argument which is a XML file that
contains configurable aspects of the desired simulation. If no argument is
passed through the command line a default configuration file will be loaded.
The XML code below shows a typic configuration:
``` xml
<simulation>
<!-- Configuration for the DRAMSys Simulator -->
<simconfig src="ddr3.xml" />
<!-- Temperature Simulator Configuration -->
<thermalconfig src="config.xml" />
<!-- Memory Device Specification: Which Device is on the DDR3 DIMM -->
<memspec src="MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
<!-- Addressmapping Configuration of the Memory Controller -->
<addressmapping src="am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml"></addressmapping>
<!-- Memory Controller Configuration: -->
<mcconfig src="fifoStrict.xml"/>
<!--
The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored.
-->
<tracesetup id="fifo_scram">
<!--
Specify here a trace file for each of the trace players. Trace
players without a file will not generate transactions.
It is also possible to choose "cklMhz" and the "bl" for every
player.
-->
<device clkMhz="200">ddr3_example.stl</device>
<device clkMhz="200">ddr3_example.stl</device>
</tracesetup>
</simulation>
```
Some configuration fields reference other XML files which contain more
specialized chunks of the configuration like memory specification, address
mapping and memory configurations.
The XML configuration files are parsed by the program and the configuration
details extracted are assigned to the correspondent attributes of the internal
configuration structure.
#### Simulation Setups
Every possible combination of memory specification, address mapping and memory
configuration corresponds to a **simulation setup**.
DRAMSys executes all the **trace setups** listed in the configuration file for
each of the simulation setups.
A single **trace setup** is composed of an id string and one or more
**devices**.
The **device** configuration consists of two parameters - clkMhz
(operation frequency for this device) - and a **trace file**.
A **trace file** is a pre-recorded file containing memory transactions. Each
memory transaction has a timestamp that tells the simulator when it shall
happen, a transaction type (e.g. read, write) and a memory address.
Here is an example syntax:
```
31: read 0x400140
33: read 0x400160
56: read 0x7fff8000
81: read 0x400180
```
A **trace player** is **equivalent** to a bus master **device**
(e.g. a processor). By adding device elements into the trace setup section
one can specify the operation frequency, the burst length and the trace file
to be used by trace players.
Trace players without a corresponding device configuration do not generate
transactions.
**DRAMSys** executes all the simulation setups within the configuration file
providing **flexibility** for **exhaustive explorations.**
#### Configuration File Sections
The main configuration file is divided into self-contained sections. Each of
these sections refers to sub-configuration files.
Below, the sub-configurations are listed and explained.
- **Simulator Configuration**
The content of
[ddr3.xml](DRAMSys/simulator/resources/configs/simulator/ddr3.xml) is
presented below as an example.
```xml
<simconfig>
<SimulationName value="ddr3" />
<Debug value="0" />
<DatabaseRecording value="1" />
<PowerAnalysis value="1" />
<EnableWindowing value = "1" />
<WindowSize value="100" />
<ThermalSimulation value="0"/>
<SimulationProgressBar value="1"/>
<NumberOfMemChannels value="1"/>
<NumberOfDevicesOnDIMM value = "8" />
</simconfig>
```
- *SimulationName* (boolean)
- Give the name of the simulation for distingushing from other simulations.
- *Debug* (boolean)
- "1": enables debug output on console
- "0": disables debug output
- *DatabaseRecording* (boolean)
- "1": enables trace file recording for the trace analyser tool
- "0": disables trace file recording
- *PowerAnalysis* (boolean)
- "1": enables live power analysis with the DRAMPower tool
- "0": disables power analysis
- *EnableWindowing* (boolean)
- "1": enables temporal windowing
- "0": disables temporal windowing
- *WindowSize* (unisgned int)
- Size of the window in clock cycles used to evaluate average bandwidth and average power consumption
- *NumberOfTracePlayers* (unsigned int)
- Number of trace players
- *NumberOfMemChannels* (unsigned int)
- Number of memory channels
- *ThermalSimulation* (boolean)
- "1": enables thermal simulation
- "0": static temperature during simulation
- *SimulationProgressBar* (boolean)
- "1": enables the simulation progress bar
- "0": disables the simulation progress bar
- *NumberOfDevicesOnDIMM* (unsigned int)
- Number of devices on dual inline memory module
- *CheckTLM2Protocol* (boolean)
- "1": enables the TLM 2.0 Protocol Checking
- "0": disables the TLM 2.0 Protocol Checking
- **Temperature Simulator Configuration**
The content of
[config.xml](DRAMSys/simulator/resources/configs/thermalsim/config.xml) is
presented below as an example.
```xml
<thermalsimconfig>
<TemperatureScale value="Celsius" />
<StaticTemperatureDefaultValue value="89" />
<ThermalSimPeriod value="100" />
<ThermalSimUnit value="us" />
<PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
<IceServerIp value="127.0.0.1" />
<IceServerPort value="11880" />
<SimPeriodAdjustFactor value="10" />
<NPowStableCyclesToIncreasePeriod value="5" />
<GenerateTemperatureMap value="1" />
<GeneratePowerMap value="1" />
</thermalsimconfig>
```
- *TemperatureScale* (string)
- "Celsius"
- "Fahrenheit"
- "Kelvin"
- *StaticTemperatureDefaultValue* (int)
- Temperature value for simulations with static temperature
- *ThermalSimPeriod* (double)
- Period of the thermal simulation
- *ThermalSimUnit* (string)
- "s": seconds
- "ms": millisecond
- "us": microseconds
- "ns": nanoseconds
- "ps": picoseconds
- "fs": femtoseconds
- *PowerInfoFile* (string)
- File containing power related information: devices identifiers, initial power values and power thresholds.
- *IceServerIp* (string)
- 3D-Ice server IP address
- *IceServerPort* (unsigned int)
- 3D-Ice server port
- *SimPeriodAdjustFactor* (unsigned int)
- When substantial changes in power occur (i.e., changes that exceed the thresholds), then the simulation period will be divided by this number causing the thermal simulation to be executed more often.
- *NPowStableCyclesToIncreasePeriod* (unsigned int)
- Wait this number of thermal simulation cycles with power stability (i.e., changes that do not exceed the thresholds) to start increasing the simulation period back to its configured value.
- *GenerateTemperatureMap* (boolean)
- "1": generate temperature map files during thermal simulation
- "0": do not generate temperature map files during thermal simulation
- *GeneratePowerMap* (boolean)
- "1": generate power map files during thermal simulation
- "0": do not generate power map files during thermal simulation
- **Memory Specification**
A file with memory specifications. This information comes from datasheets and
measurements, and usually does not change.
- **Address Mapping**
XML files describe the address mapping to be used in the simulation.
The file [am_wideio.xml](DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml) is
a good example.
``` xml
<!-- Row Bank Column -->
<addressmapping>
<channel from="27" to="28" />
<row from="14" to="26" />
<bank from="11" to="13" />
<column from="4" to="10" />
<bytes from="0" to="3" />
</addressmapping>
```
![Address Mapping Sample 1](DRAMSys/docs/images/am_wideio_rbc.png)
``` xml
<!-- Bank Row Column -->
<addressmapping>
<channel from="27" to="28" />
<bank from="24" to="26" />
<row from="11" to="23" />
<column from="4" to="10" />
<bytes from="0" to="3" />
</addressmapping>
```
![Address Mapping Sample 2](DRAMSys/docs/images/am_wideio_brc.png)
- **Memory Configuration**
The content of [fifo.xml](DRAMSys/simulator/resources/configs/memconfigs/fifo.xml) is
presented below as an example.
``` xml
<mcconfig>
<BankwiseLogic value="0"/>
<OpenPagePolicy value="1" />
<MaxNrOfTransactions value="8" />
<Scheduler value="FIFO" />
<Capsize value="5" />
<!-- 4 Modes: NoPowerDown, Staggered, TimeoutPDN, TimeoutSREF -->
<PowerDownMode value="NoPowerDown" />
<PowerDownTimeout value="100" />
<!-- Error Modelling -->
<ErrorChipSeed value="42" />
<ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
<!-- Modes:
- NoStorage,
- Store (store data without errormodel),
- ErrorModel (store data with errormodel)
-->
<StoreMode value="NoStorage" />
<ControllerCoreDisableRefresh value="0"/>
</mcconfig>
```
- *BankwiseLogic* (boolean)
- "1": perform bankwise-refresh [3] and bankwise-powerdown [4]
- "0": do not perform bankwise operations
- *OpenPagePolicy* (boolean)
- "1": use open page precharge policy
- "0": do not use open page precharge policy
- *MaxNrOfTransactions* (unsigned int)
- Maximum number of transactions.
- *Scheduler* (string)
- "FIFO": first in, first out
- "FIFO_STRICT": out-of-order treatment of queue elements not allowed
- "FR_FCFS": first-come, first-served
- *Capsize* (unsigned int)
- Capacitor cell size.
- *PowerDownMode* (enum EPowerDownMode)
- "NoPowerDown": no power down mode (active idle)
- "Staggered": staggered power down policy [5]
- "TimeoutPDN": precharge idle
- "TimeoutSREF": self refresh
- *ReadWriteGrouping* (boolean)
- "1": enable read writing grouping
- "0": disable read writing grouping
- *ReorderBuffer* (boolean)
- "1": use reordering buffer
- "0": do not use reordering buffer
- *ErrorChipSeed* (unsigned int)
- Seed to initialize the random error generator.
- *ErrorCSVFile* (string)
- CSV file with error injection information.
- *StoreMode* (enum StorageMode)
- "NoStorage": no storage
- "Store": store data without error model
- "ErrorModel": store data with error model [6]
- *ControllerCoreDisableRefresh* (boolean)
- "1": disables refreshes
- "0": normal operation (refreshes enabled)
- **Trace Setups**
- *clkMhz* (unsigned int)
- Speed of the trace player
- *trace file*
- A pre-recorded file containing memory transactions to be executed by a
trace player.
Some attributes are self-explanatory while others require some previous
knowhow of memory technologies.
Resources of the simulator are available inside of the **resources** directory
and its sub-directories.
``` bash
$ cd DRAMSys/simulator/resources
```
A description of the content each directory follows.
- **resources**
- **configs**: XML files used for configure specific details of the simulation.
- am_configs: address mapping configuration
- memconfigs: memory configuration
- memspecs: configuration related to the memory technology
- **scripts**: useful tools like address scrambler, trace analyser, database
creator, etc.
- **simulations**: global configuration
- **traces**: trace files for simulations. They contain accesses to memory
in certain known scenarios.
#### Usage Example with Thermal Simulation
The DRAMSys' main configuration file is presented below.
``` xml
<simulation>
<!-- General Simulator Configuration (used for all simulation setups) -->
<simconfig>
<Debug value="1" />
<DatabaseRecording value="1" />
<PowerAnalysis value="1" />
<EnableWindowing value = "1" />
<WindowSize value="1000" />
<NumberOfTracePlayers value="1"/>
<NumberOfMemChannels value="4"/>
<ControllerCoreDisableRefresh value="0"/>
<ThermalSimulation value="1"/>
<SimulationProgressBar value="1"/>
<NumberOfDevicesOnDIMM value = "1" />
<CheckTLM2Protocol value = "0" />
</simconfig>
<!-- Temperature Simulator Configuration (used for all simulation setups) -->
<thermalsimconfig>
<TemperatureScale value="Celsius" />
<StaticTemperatureDefaultValue value="23" />
<ThermalSimPeriod value="100" />
<ThermalSimUnit value="us" />
<PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/powerInfo.xml"/>
<IceServerIp value="127.0.0.1" />
<IceServerPort value="11880" />
<SimPeriodAdjustFactor value="10" />
<NPowStableCyclesToIncreasePeriod value="5" />
<GenerateTemperatureMap value="1" />
<GeneratePowerMap value="1" />
</thermalsimconfig>
<memspecs>
<memspec src="../../DRAMSys/simulator/resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<addressmappings>
<addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
</addressmappings>
<memconfigs>
<memconfig src="../../DRAMSys/simulator/resources/configs/memconfigs/fr_fcfs.xml"/>
</memconfigs>
<tracesetups>
<tracesetup id="fifo">
<device clkMhz="1000">../../../tests/error/test_error.stl</device>
</tracesetup>
</tracesetups>
<!-- Configuration for the DRAMSys Simulator -->
<simconfig src="wideio_thermal.xml" />
<!-- Temperature Simulator Configuration -->
<thermalconfig src="confi.xml" />
<!-- Memory Device Specification: Which Device is on the DDR3 DIMM -->
<memspec src="WideIO.xml"></memspec>
<!-- Addressmapping Configuration of the Memory Controller -->
<addressmapping src="am_wideio.xml"></addressmapping>
<!-- Memory Controller Configuration: -->
<mcconfig src="fr_fcfs.xml"/>
<!--
The following trace setup is only used in standalone mode.
In library mode e.g. in Platform Architect the trace setup is ignored.
-->
<tracesetup id="fifo_scram">
<!--
This device mimics an image processing application
running on an FPGA with 200 Mhz.
-->
<device clkMhz="1000">test_error.stl</device>
</tracesetup>
</simulation>
```
@@ -573,327 +875,6 @@ $ cd build/simulator/
$ ./dramSys > output
```
### DRAMSys Configuration
The **dramSys** executable supports one argument which is a XML file that
contains configurable aspects of the desired simulation. If no argument is
passed through the command line a default configuration file will be loaded.
The XML code below shows a typic configuration:
``` xml
<simulation>
<!-- General Simulator Configuration (used for all simulation setups) -->
<simconfig>
<Debug value="1"/>
<DatabaseRecording value="1"/>
<PowerAnalysis value="1"/>
<EnableWindowing value = "1" />
<WindowSize value="1000" />
<NumberOfTracePlayers value="5"/>
<NumberOfMemChannels value="1"/>
<ControllerCoreDisableRefresh value="0"/>
<ThermalSimulation value="0"/>
<SimulationProgressBar value="1"/>
<NumberOfDevicesOnDIMM value = "1" />
<CheckTLM2Protocol value = "0" />
</simconfig>
<!-- Temperature Simulator Configuration (used for all simulation setups) -->
<thermalsimconfig>
<TemperatureScale value="Celsius" />
<StaticTemperatureDefaultValue value="89" />
<ThermalSimPeriod value="100" />
<ThermalSimUnit value="ms" />
<PowerInfoFile value="../../DRAMSys/simulator/resources/configs/thermalsim/power_thresholds.xml"/>
<IceServerIp value="127.0.0.1" />
<IceServerPort value="11880" />
<SimPeriodAdjustFactor value="10" />
<NPowStableCyclesToIncreasePeriod value="5" />
<GenerateTemperatureMap value="1" />
<GeneratePowerMap value="1" />
</thermalsimconfig>
<!-- Memory Specifications -->
<memspecs>
<memspec src="../../DRAMSys/simulator/resources/configs/memspecs/WideIO.xml"></memspec>
</memspecs>
<!-- Address Mappings -->
<addressmappings>
<addressmapping src="../../DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml"></addressmapping>
</addressmappings>
<!-- Memory Configurations -->
<memconfigs>
<memconfig src="../../DRAMSys/simulator/resources/configs/memconfigs/fifo.xml"/>
</memconfigs>
<!-- Trace Setups -->
<tracesetups>
<!-- Multiple trace setups are allowed for the same simulation setup -->
<tracesetup id="fifo">
<!--
Specify here a trace file for each of the trace players. Trace
players without a file will not generate transactions.
It is also possible to choose "cklMhz" and the "bl" for every
player.
-->
<device clkMhz="200">voco2.stl</device>
<device clkMhz="200">voco2.stl</device>
<device clkMhz="200">voco2.stl</device>
</tracesetup>
</tracesetups>
</simulation>
```
Some configuration fields reference other XML files which contain more
specialized chunks of the configuration like memory specification, address
mapping and memory configurations.
The XML configuration files are parsed by the program and the configuration
details extracted are assigned to the correspondent attributes of the internal
configuration structure.
#### Simulation Setups
Every possible combination of memory specification, address mapping and memory
configuration corresponds to a **simulation setup**.
DRAMSys executes all the **trace setups** listed in the configuration file for
each of the simulation setups.
A single **trace setup** is composed of an id string and one or more
**devices**.
The **device** configuration consists of two configuration fields - clkMhz
(operation frequency for this device) and bl (burst length) - and a
**trace file**.
A **trace file** is a pre-recorded file containing memory transactions. Each
memory transaction has a timestamp that tells the simulator when it shall
happen, a transaction type (e.g. read, write) and a memory address.
A **trace player** is **equivalent** to a bus master **device** (i.e. a device
that locks a bus and generates memory transactions). By adding device elements
into the trace setup section one can specify the operation frequency, the
burst length and the trace file to be used by trace players.
Trace players without a corresponding device configuration do not generate
transactions.
**DRAMSys** executes all the simulation setups within the configuration file
providing **flexibility** for **exhaustive explorations.**
#### Configuration File Sections
The main configuration file is divided into self-contained sections, each of
these sections is a set of logically related configuration aspects for the
simulation.
Below are listed the configuration sections and configuration fields.
- **Simulator Configuration**
- *Debug* (boolean)
- "1": enables debug output on console
- "0": disables debug output
- *DatabaseRecording* (boolean)
- "1": enables trace file recording for the trace analyser tool
- "0": disables trace file recording
- *PowerAnalysis* (boolean)
- "1": enables live power analysis with the DRAMPower tool
- "0": disables power analysis
- *EnableWindowing* (boolean)
- "1": enables temporal windowing
- "0": disables temporal windowing
- *WindowSize* (unisgned int)
- Size of the window in clock cycles used to evaluate average bandwidth and average power consumption
- *NumberOfTracePlayers* (unsigned int)
- Number of trace players
- *NumberOfMemChannels* (unsigned int)
- Number of memory channels
- *ControllerCoreDisableRefresh* (boolean)
- "1": disables refreshes
- "0": normal operation (refreshes enabled)
- *ThermalSimulation* (boolean)
- "1": enables thermal simulation
- "0": static temperature during simulation
- *SimulationProgressBar* (boolean)
- "1": enables the simulation progress bar
- "0": disables the simulation progress bar
- *NumberOfDevicesOnDIMM* (unsigned int)
- Number of devices on dual inline memory module
- *CheckTLM2Protocol* (boolean)
- "1": enables the TLM 2.0 Protocol Checking
- "0": disables the TLM 2.0 Protocol Checking
- **Temperature Simulator Configuration**
- *TemperatureScale* (string)
- "Celsius"
- "Fahrenheit"
- "Kelvin"
- *StaticTemperatureDefaultValue* (int)
- Temperature value for simulations with static temperature
- *ThermalSimPeriod* (double)
- Period of the thermal simulation
- *ThermalSimUnit* (string)
- "s": seconds
- "ms": millisecond
- "us": microseconds
- "ns": nanoseconds
- "ps": picoseconds
- "fs": femtoseconds
- *PowerInfoFile* (string)
- File containing power related information: devices identifiers, initial power values and power thresholds.
- *IceServerIp* (string)
- 3D-Ice server IP address
- *IceServerPort* (unsigned int)
- 3D-Ice server port
- *SimPeriodAdjustFactor* (unsigned int)
- When substantial changes in power occur (i.e., changes that exceed the thresholds), then the simulation period will be divided by this number causing the thermal simulation to be executed more often.
- *NPowStableCyclesToIncreasePeriod* (unsigned int)
- Wait this number of thermal simulation cycles with power stability (i.e., changes that do not exceed the thresholds) to start increasing the simulation period back to its configured value.
- *GenerateTemperatureMap* (boolean)
- "1": generate temperature map files during thermal simulation
- "0": do not generate temperature map files during thermal simulation
- *GeneratePowerMap* (boolean)
- "1": generate power map files during thermal simulation
- "0": do not generate power map files during thermal simulation
- **Memory Specification**
A file with memory specifications. This information comes from datasheet and
usually does not change.
- **Address Mapping**
XML files describe the address mapping to be used in the simulation.
The file [am_wideio.xml](DRAMSys/simulator/resources/configs/amconfigs/am_wideio.xml) is
a good example.
``` xml
<!-- Row Bank Column -->
<addressmapping>
<channel from="27" to="28" />
<row from="14" to="26" />
<bank from="11" to="13" />
<column from="4" to="10" />
<bytes from="0" to="3" />
</addressmapping>
```
![Address Mapping Sample 1](DRAMSys/docs/images/am_wideio_rbc.png)
``` xml
<!-- Bank Row Column -->
<addressmapping>
<channel from="27" to="28" />
<bank from="24" to="26" />
<row from="11" to="23" />
<column from="4" to="10" />
<bytes from="0" to="3" />
</addressmapping>
```
![Address Mapping Sample 2](DRAMSys/docs/images/am_wideio_brc.png)
- **Memory Configuration**
The content of [fifo.xml](DRAMSys/simulator/resources/configs/memconfigs/fifo.xml) is
presented below as an example.
``` xml
<memconfig>
<BankwiseLogic value="0"/>
<OpenPagePolicy value="1"/>
<MaxNrOfTransactions value="8"/>
<Scheduler value="FIFO_STRICT"/>
<Capsize value="5"/>
<PowerDownMode value="NoPowerDown"/>
<PowerDownTimeout value="100"/>
<!-- Error Modelling -->
<ErrorChipSeed value="42"/>
<ErrorCSVFile value="../../DRAMSys/simulator/src/error/error.csv" />
<StoreMode value="NoStorage"/>
</memconfig>
```
- *BankwiseLogic* (boolean)
- "1": perform bankwise-refresh [3] and bankwise-powerdown [4]
- "0": do not perform bankwise operations
- *OpenPagePolicy* (boolean)
- "1": use open page precharge policy
- "0": do not use open page precharge policy
- *MaxNrOfTransactions* (unsigned int)
- Maximum number of transactions.
- *Scheduler* (string)
- "FIFO": first in, first out
- "FIFO_STRICT": out-of-order treatment of queue elements not allowed
- "FR_FCFS": first-come, first-served
- *Capsize* (unsigned int)
- Capacitor cell size.
- *PowerDownMode* (enum EPowerDownMode)
- "NoPowerDown": no power down mode (active idle)
- "Staggered": staggered power down policy [5]
- "TimeoutPDN": precharge idle
- "TimeoutSREF": self refresh
- *ReadWriteGrouping* (boolean)
- "1": enable read writing grouping
- "0": disable read writing grouping
- *ReorderBuffer* (boolean)
- "1": use reordering buffer
- "0": do not use reordering buffer
- *ErrorChipSeed* (unsigned int)
- Seed to initialize the random error generator.
- *ErrorCSVFile* (string)
- CSV file with error injection information.
- *StoreMode* (enum StorageMode)
- "NoStorage": no storage
- "Store": store data without error model
- "ErrorModel": store data with error model [6]
- **Trace Setups**
- *id* (string)
- Trace setup id. Two kinds of output files are generated by DRAMSys:
SQLite databases containing transactions related to each memory channel
(.tdb) and a text file (.txt) with the program output. The base name for
these files comes from this field.
- *clkMhz* (unsigned int)
- Speed of the trace player
- *bl* (unsigned int)
- Burst length
- *trace file*
- A pre-recorded file containing memory transactions to be executed by a
trace player.
Some attributes are self-explanatory while others require some previous
knowhow of memory technologies.
Resources of the simulator are available inside of the **resources** directory
and its sub-directories.
``` bash
$ cd DRAMSys/simulator/resources
```
A description of the content each directory follows.
- **resources**
- **configs**: XML files used for configure specific details of the simulation.
- am_configs: address mapping configuration
- memconfigs: memory configuration
- memspecs: configuration related to the memory technology
- **scripts**: useful tools like address scrambler, trace analyser, database
creator, etc.
- **simulations**: global configuration
- **traces**: trace files for simulations. They contain accesses to memory
in certain known scenarios.
#### DRAMsys Diagrams
- **Payload Extension information**