From 41e2db0b5a897d97e4ea55e24fd27fc8347bc322 Mon Sep 17 00:00:00 2001 From: "Lukas Steiner (2)" Date: Fri, 19 Jul 2019 10:29:14 +0200 Subject: [PATCH] Removed refresh and power down. --- DRAMSys/library/src/controller/Controller.cpp | 25 +- .../src/controller/core/ControllerCore.cpp | 134 ++--- .../src/controller/core/ControllerCore.h | 6 +- .../core/powerdown/IPowerDownManager.h | 226 ++++---- .../controller/core/powerdown/NoPowerDown.cpp | 114 ++-- .../controller/core/powerdown/NoPowerDown.h | 108 ++-- .../core/powerdown/PowerDownManager.cpp | 370 ++++++------- .../core/powerdown/PowerDownManager.h | 122 ++--- .../powerdown/PowerDownManagerBankwise.cpp | 372 ++++++------- .../core/powerdown/PowerDownManagerBankwise.h | 144 ++--- .../powerdown/PowerDownManagerTimeout.cpp | 250 ++++----- .../core/powerdown/PowerDownManagerTimeout.h | 110 ++-- .../PowerDownManagerTimeoutBankwise.cpp | 240 ++++---- .../PowerDownManagerTimeoutBankwise.h | 110 ++-- .../controller/core/refresh/IRefreshManager.h | 120 ++-- .../src/controller/core/refresh/RGR.cpp | 514 ++++++++--------- .../library/src/controller/core/refresh/RGR.h | 150 ++--- .../core/refresh/RefreshManager.cpp | 516 +++++++++--------- .../controller/core/refresh/RefreshManager.h | 146 ++--- .../core/refresh/RefreshManagerBankwise.cpp | 498 ++++++++--------- .../core/refresh/RefreshManagerBankwise.h | 146 ++--- 21 files changed, 2211 insertions(+), 2210 deletions(-) diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index adc1b75a..aa79c3d2 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -249,12 +249,12 @@ void Controller::controllerCorePEQCallback(tlm_generic_payload &payload, { if (phase == REF_TRIGGER) { - controllerCore->triggerRefresh(payload); + //controllerCore->triggerRefresh(payload); } else if (phase == PDN_TRIGGER) { - controllerCore->powerDownManager->sleep(DramExtension::getExtension( - payload).getBank(), sc_time_stamp()); + //controllerCore->powerDownManager->sleep(DramExtension::getExtension( + // payload).getBank(), sc_time_stamp()); } else { @@ -343,6 +343,7 @@ void Controller::frontendPEQCallback(tlm_generic_payload &payload, sendToFrontend(payload, END_REQ, SC_ZERO_TIME); scheduler->storeRequest(&payload); + // TODO: remove this scheduleNextFromScheduler(DramExtension::getExtension(payload).getBank()); } } @@ -403,7 +404,7 @@ void Controller::payloadLeavesSystem(tlm_generic_payload &payload) "Payload left system on bank " + to_string(bank.ID()) + ". Total number of payloads in Controller: " + to_string(getTotalNumberOfPayloadsInSystem())); - controllerCore->powerDownManager->triggerSleep(bank, sc_time_stamp()); + //controllerCore->powerDownManager->triggerSleep(bank, sc_time_stamp()); } unsigned int Controller::getTotalNumberOfPayloadsInSystem() @@ -477,8 +478,8 @@ void Controller::scheduleNextFromScheduler(Bank bank) void Controller::schedule(Command command, gp &payload) { - controllerCore->powerDownManager->wakeUp(DramExtension::getBank(payload), - sc_time_stamp()); + //controllerCore->powerDownManager->wakeUp(DramExtension::getBank(payload), + // sc_time_stamp()); if (controllerCore->scheduleRequest(command, payload)) { printDebugMessage("\t-> Next payload was scheduled by core [" + commandToString( @@ -538,15 +539,15 @@ void Controller::dramPEQCallback(tlm_generic_payload &payload, scheduleNextFromScheduler(bank); } } - if (sleepy == true) - controllerCore->powerDownManager->sleep(0, sc_time_stamp()); + //if (sleepy == true) + //controllerCore->powerDownManager->sleep(0, sc_time_stamp()); } else if (phase == END_REFB) { printDebugMessage("Finished auto refresh on bank " + to_string(bank.ID())); - if (numberOfPayloadsInSystem[bank] == 0) - controllerCore->powerDownManager->sleep(bank, sc_time_stamp()); + if (numberOfPayloadsInSystem[bank] == 0) {} + //controllerCore->powerDownManager->sleep(bank, sc_time_stamp()); else scheduleNextFromScheduler(bank); @@ -603,10 +604,10 @@ void Controller::terminateSimulation() { if (Configuration::getInstance().BankwiseLogic) { for (Bank bank : controllerCore->getBanks()) { - controllerCore->powerDownManager->wakeUp(bank, clkAlign(sc_time_stamp())); + //controllerCore->powerDownManager->wakeUp(bank, clkAlign(sc_time_stamp())); } } else { - controllerCore->powerDownManager->wakeUp(0, clkAlign(sc_time_stamp())); + //controllerCore->powerDownManager->wakeUp(0, clkAlign(sc_time_stamp())); } endTime = sc_time_stamp(); diff --git a/DRAMSys/library/src/controller/core/ControllerCore.cpp b/DRAMSys/library/src/controller/core/ControllerCore.cpp index b2827ddf..4ec38ff6 100644 --- a/DRAMSys/library/src/controller/core/ControllerCore.cpp +++ b/DRAMSys/library/src/controller/core/ControllerCore.cpp @@ -89,33 +89,33 @@ ControllerCore::ControllerCore(sc_module_name /*name*/, timingChecker = new CheckerDDR3New(config, *state); - if (config.RowGranularRef) { - refreshManager = new RGR("RGR", *this); - } else { - if (config.BankwiseLogic) { - refreshManager = new RefreshManagerBankwise("refManagerBw", *this); - } else { - refreshManager = new RefreshManager("refManager", *this); - } - } +// if (config.RowGranularRef) { +// refreshManager = new RGR("RGR", *this); +// } else { +// if (config.BankwiseLogic) { +// refreshManager = new RefreshManagerBankwise("refManagerBw", *this); +// } else { +// refreshManager = new RefreshManager("refManager", *this); +// } +// } - if (config.PowerDownMode == EPowerDownMode::Staggered) { - if (config.BankwiseLogic) - powerDownManager = new PowerDownManagerBankwise("pdnManagerBw", *this); - else - powerDownManager = new PowerDownManager("pdnManager", *this); - } else if (config.PowerDownMode == EPowerDownMode::TimeoutPDN - || config.PowerDownMode == EPowerDownMode::TimeoutSREF) { - if (config.BankwiseLogic) - powerDownManager = new PowerDownManagerTimeoutBankwise("pdnManagerBw", *this); - else - powerDownManager = new PowerDownManagerTimeout("pdnManager", *this); - } else if (config.PowerDownMode == EPowerDownMode::NoPowerDown) { - powerDownManager = new NoPowerDown(); - } else { - SC_REPORT_FATAL(0, - "Unsupported powerdown mode in constructor of controller core"); - } +// if (config.PowerDownMode == EPowerDownMode::Staggered) { +// if (config.BankwiseLogic) +// powerDownManager = new PowerDownManagerBankwise("pdnManagerBw", *this); +// else +// powerDownManager = new PowerDownManager("pdnManager", *this); +// } else if (config.PowerDownMode == EPowerDownMode::TimeoutPDN +// || config.PowerDownMode == EPowerDownMode::TimeoutSREF) { +// if (config.BankwiseLogic) +// powerDownManager = new PowerDownManagerTimeoutBankwise("pdnManagerBw", *this); +// else +// powerDownManager = new PowerDownManagerTimeout("pdnManager", *this); +// } else if (config.PowerDownMode == EPowerDownMode::NoPowerDown) { +// powerDownManager = new NoPowerDown(); +// } else { +// SC_REPORT_FATAL(0, +// "Unsupported powerdown mode in constructor of controller core"); +// } } ControllerCore::~ControllerCore() @@ -128,38 +128,38 @@ ControllerCore::~ControllerCore() delete commandChecker[Command::REFA]; delete commandChecker[Command::PDEA]; delete timingChecker; - delete refreshManager; - delete powerDownManager; + //delete refreshManager; + //delete powerDownManager; delete state; } -void ControllerCore::triggerRefresh(tlm::tlm_generic_payload &payload) -{ - /* Refresh can be disabled for tests purpose */ - if (config.ControllerCoreRefDisable == false) - { - sc_time time = sc_time_stamp(); - Bank bank = DramExtension::getExtension(payload).getBank(); +//void ControllerCore::triggerRefresh(tlm::tlm_generic_payload &payload) +//{ +// /* Refresh can be disabled for tests purpose */ +// if (config.ControllerCoreRefDisable == false) +// { +// sc_time time = sc_time_stamp(); +// Bank bank = DramExtension::getExtension(payload).getBank(); - state->cleanUp(time); +// state->cleanUp(time); - if (!refreshManager->isInvalidated(payload, time) - && !powerDownManager->isInSelfRefresh(bank)) - { - printDebugMessage("Triggering refresh on bank " + to_string(bank.ID())); - powerDownManager->wakeUpForRefresh(bank, - time); //expects PDNA and PDNP to exit without delay - bool pdnpToSrefTransition = false; - if (config.PowerDownMode == EPowerDownMode::Staggered) - pdnpToSrefTransition = (state->getLastCommand(Command::PDXP, - bank).getStart() >= time); - if (pdnpToSrefTransition) - powerDownManager->sleep(bank, time); - else - refreshManager->scheduleRefresh(payload, time); - } - } -} +// if (!refreshManager->isInvalidated(payload, time) +// && !powerDownManager->isInSelfRefresh(bank)) +// { +// printDebugMessage("Triggering refresh on bank " + to_string(bank.ID())); +// powerDownManager->wakeUpForRefresh(bank, +// time); //expects PDNA and PDNP to exit without delay +// bool pdnpToSrefTransition = false; +// if (config.PowerDownMode == EPowerDownMode::Staggered) +// pdnpToSrefTransition = (state->getLastCommand(Command::PDXP, +// bank).getStart() >= time); +// if (pdnpToSrefTransition) +// powerDownManager->sleep(bank, time); +// else +// refreshManager->scheduleRefresh(payload, time); +// } +// } +//} bool ControllerCore::scheduleRequest(Command command, tlm::tlm_generic_payload &payload) @@ -167,23 +167,23 @@ bool ControllerCore::scheduleRequest(Command command, sc_time start = clkAlign(sc_time_stamp()); state->cleanUp(start); ScheduledCommand scheduledCommand = schedule(command, start, payload); - if (config.ControllerCoreRefDisable) - { + //if (config.ControllerCoreRefDisable) + //{ state->change(scheduledCommand); controller.send(scheduledCommand, payload); return true; - } - else - { - if (!((command == Command::PRE || command == Command::ACT) - && refreshManager->hasCollision(scheduledCommand))) - { - state->change(scheduledCommand); - controller.send(scheduledCommand, payload); - return true; - } - } - return false; +// } +// else +// { +// if (!((command == Command::PRE || command == Command::ACT) +// && refreshManager->hasCollision(scheduledCommand))) +// { +// state->change(scheduledCommand); +// controller.send(scheduledCommand, payload); +// return true; +// } +// } +// return false; } ScheduledCommand ControllerCore::schedule(Command command, sc_time start, diff --git a/DRAMSys/library/src/controller/core/ControllerCore.h b/DRAMSys/library/src/controller/core/ControllerCore.h index 7a07ae3f..291ba905 100644 --- a/DRAMSys/library/src/controller/core/ControllerCore.h +++ b/DRAMSys/library/src/controller/core/ControllerCore.h @@ -59,7 +59,7 @@ public: virtual ~ControllerCore(); bool scheduleRequest(Command command, tlm::tlm_generic_payload &payload); - void triggerRefresh(tlm::tlm_generic_payload &payload); + //void triggerRefresh(tlm::tlm_generic_payload &payload); const std::vector &getBanks(); std::vector getFreeBanks(); @@ -76,8 +76,8 @@ public: Configuration config; ControllerState *state; IController &controller; - IPowerDownManager *powerDownManager; - IRefreshManager *refreshManager; + //IPowerDownManager *powerDownManager; + //IRefreshManager *refreshManager; std::map &numberOfPayloads; private: diff --git a/DRAMSys/library/src/controller/core/powerdown/IPowerDownManager.h b/DRAMSys/library/src/controller/core/powerdown/IPowerDownManager.h index 01aac5ba..047cb407 100644 --- a/DRAMSys/library/src/controller/core/powerdown/IPowerDownManager.h +++ b/DRAMSys/library/src/controller/core/powerdown/IPowerDownManager.h @@ -1,129 +1,129 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// */ -#ifndef IPOWERDOWNMANAGER_H -#define IPOWERDOWNMANAGER_H +//#ifndef IPOWERDOWNMANAGER_H +//#define IPOWERDOWNMANAGER_H -#include -#include "../../../common/dramExtensions.h" -#include "../../Command.h" +//#include +//#include "../../../common/dramExtensions.h" +//#include "../../Command.h" -enum class PowerDownState { - Awake, AwakeForRefresh, PDNActive, PDNPrecharge, PDNSelfRefresh -}; +//enum class PowerDownState { +// Awake, AwakeForRefresh, PDNActive, PDNPrecharge, PDNSelfRefresh +//}; -class IPowerDownManager -{ -public: - virtual ~IPowerDownManager() {} +//class IPowerDownManager +//{ +//public: +// virtual ~IPowerDownManager() {} - virtual void sleep(Bank bank, sc_time time) = 0; - virtual void triggerSleep(Bank bank, sc_time time) = 0; +// virtual void sleep(Bank bank, sc_time time) = 0; +// virtual void triggerSleep(Bank bank, sc_time time) = 0; - virtual void wakeUp(Bank bank, sc_time time) = 0; - virtual void wakeUpForRefresh(Bank bank, sc_time time) = 0; +// virtual void wakeUp(Bank bank, sc_time time) = 0; +// virtual void wakeUpForRefresh(Bank bank, sc_time time) = 0; - virtual bool isInSelfRefresh(Bank bank) = 0; +// virtual bool isInSelfRefresh(Bank bank) = 0; -protected: - Command getSleepCommand(PowerDownState state); - Command getWakeUpCommand(PowerDownState state); +//protected: +// Command getSleepCommand(PowerDownState state); +// Command getWakeUpCommand(PowerDownState state); -}; +//}; -inline Command IPowerDownManager::getSleepCommand(PowerDownState state) -{ - Command cmd(Command::NOP); - switch (state) { - case PowerDownState::PDNActive: - cmd = Command::PDEA; - break; - case PowerDownState::PDNPrecharge: - cmd = Command::PDEP; - break; - case PowerDownState::PDNSelfRefresh: - cmd = Command::SREFEN; - break; - default: - SC_REPORT_FATAL("In PowerDownManager sendPowerdownBegin", - "invalid powerDownState"); - break; - } - return cmd; -} +//inline Command IPowerDownManager::getSleepCommand(PowerDownState state) +//{ +// Command cmd(Command::NOP); +// switch (state) { +// case PowerDownState::PDNActive: +// cmd = Command::PDEA; +// break; +// case PowerDownState::PDNPrecharge: +// cmd = Command::PDEP; +// break; +// case PowerDownState::PDNSelfRefresh: +// cmd = Command::SREFEN; +// break; +// default: +// SC_REPORT_FATAL("In PowerDownManager sendPowerdownBegin", +// "invalid powerDownState"); +// break; +// } +// return cmd; +//} -inline Command IPowerDownManager::getWakeUpCommand(PowerDownState state) +//inline Command IPowerDownManager::getWakeUpCommand(PowerDownState state) -{ - Command cmd(Command::NOP); - switch (state) { - case PowerDownState::PDNActive: - cmd = Command::PDXA; - break; - case PowerDownState::PDNPrecharge: - cmd = Command::PDXP; - break; - case PowerDownState::PDNSelfRefresh: - cmd = Command::SREFEX; - break; - default: - SC_REPORT_FATAL("In PowerDownManager sendPowerdownEnd", - "invalid powerDownState"); - } - return cmd; -} +//{ +// Command cmd(Command::NOP); +// switch (state) { +// case PowerDownState::PDNActive: +// cmd = Command::PDXA; +// break; +// case PowerDownState::PDNPrecharge: +// cmd = Command::PDXP; +// break; +// case PowerDownState::PDNSelfRefresh: +// cmd = Command::SREFEX; +// break; +// default: +// SC_REPORT_FATAL("In PowerDownManager sendPowerdownEnd", +// "invalid powerDownState"); +// } +// return cmd; +//} -inline std::string powerDownStateToString(PowerDownState powerDownState) -{ - switch (powerDownState) { - case PowerDownState::Awake: - return "Awake"; - case PowerDownState::AwakeForRefresh: - return "Awake for refresh"; - case PowerDownState::PDNActive: - return "PDN Active"; - case PowerDownState::PDNPrecharge: - return "PDN Precharged"; - case PowerDownState::PDNSelfRefresh: - return "PDN Self refresh"; - default: - return "unknown state"; - } -} +//inline std::string powerDownStateToString(PowerDownState powerDownState) +//{ +// switch (powerDownState) { +// case PowerDownState::Awake: +// return "Awake"; +// case PowerDownState::AwakeForRefresh: +// return "Awake for refresh"; +// case PowerDownState::PDNActive: +// return "PDN Active"; +// case PowerDownState::PDNPrecharge: +// return "PDN Precharged"; +// case PowerDownState::PDNSelfRefresh: +// return "PDN Self refresh"; +// default: +// return "unknown state"; +// } +//} -#endif // IPOWERDOWNMANAGER_H +//#endif // IPOWERDOWNMANAGER_H diff --git a/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.cpp b/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.cpp index d148c8c0..97c8bd30 100644 --- a/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.cpp +++ b/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.cpp @@ -1,63 +1,63 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// */ -#include "NoPowerDown.h" +//#include "NoPowerDown.h" -void NoPowerDown::triggerSleep(Bank /*bank*/, sc_time /*time*/) -{ - return; -} +//void NoPowerDown::triggerSleep(Bank /*bank*/, sc_time /*time*/) +//{ +// return; +//} -void NoPowerDown::sleep(Bank /*bank*/, sc_time /*time*/) -{ - return; -} +//void NoPowerDown::sleep(Bank /*bank*/, sc_time /*time*/) +//{ +// return; +//} -void NoPowerDown::wakeUp(Bank /*bank*/, sc_time /*time*/) -{ - return; -} +//void NoPowerDown::wakeUp(Bank /*bank*/, sc_time /*time*/) +//{ +// return; +//} -void NoPowerDown::wakeUpForRefresh(Bank /*bank*/, sc_time /*time*/) -{ - return; -} +//void NoPowerDown::wakeUpForRefresh(Bank /*bank*/, sc_time /*time*/) +//{ +// return; +//} -bool NoPowerDown::isInSelfRefresh(Bank /*bank*/) -{ - return false; -} +//bool NoPowerDown::isInSelfRefresh(Bank /*bank*/) +//{ +// return false; +//} diff --git a/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.h b/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.h index 19a53403..4dd70adc 100644 --- a/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.h +++ b/DRAMSys/library/src/controller/core/powerdown/NoPowerDown.h @@ -1,65 +1,65 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// */ -#ifndef NOPOWERDOWN_H -#define NOPOWERDOWN_H +//#ifndef NOPOWERDOWN_H +//#define NOPOWERDOWN_H -#include "PowerDownManager.h" -#include -#include "../../../common/dramExtensions.h" -#include "../scheduling/ScheduledCommand.h" +//#include "PowerDownManager.h" +//#include +//#include "../../../common/dramExtensions.h" +//#include "../scheduling/ScheduledCommand.h" -class NoPowerDown : public IPowerDownManager -{ -public: - NoPowerDown() {} - virtual ~NoPowerDown() {} +//class NoPowerDown : public IPowerDownManager +//{ +//public: +// NoPowerDown() {} +// virtual ~NoPowerDown() {} - virtual void triggerSleep(Bank bank, sc_time time) override; - virtual void sleep(Bank bank, sc_time time) override; +// virtual void triggerSleep(Bank bank, sc_time time) override; +// virtual void sleep(Bank bank, sc_time time) override; - virtual void wakeUp(Bank bank, sc_time time) override; - virtual void wakeUpForRefresh(Bank bank, sc_time time) override; +// virtual void wakeUp(Bank bank, sc_time time) override; +// virtual void wakeUpForRefresh(Bank bank, sc_time time) override; - virtual bool isInSelfRefresh(Bank bank) override; -}; +// virtual bool isInSelfRefresh(Bank bank) override; +//}; -#endif // NOPOWERDOWN_H +//#endif // NOPOWERDOWN_H diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.cpp b/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.cpp index 98377611..15ddf00a 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.cpp +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.cpp @@ -1,220 +1,220 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - * Felipe S. Prado - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// * Felipe S. Prado +// */ -#include -#include -#include "PowerDownManager.h" -#include "../ControllerCore.h" -#include "../timingCalculations.h" -#include "../../../common/DebugManager.h" -#include -#include "../../../common/utils.h" +//#include +//#include +//#include "PowerDownManager.h" +//#include "../ControllerCore.h" +//#include "../timingCalculations.h" +//#include "../../../common/DebugManager.h" +//#include +//#include "../../../common/utils.h" -using namespace tlm; -using namespace std; +//using namespace tlm; +//using namespace std; -PowerDownManager::PowerDownManager(sc_module_name /*name*/, - ControllerCore &controller) : - controllerCore(controller) -{ - powerDownState = PowerDownState::Awake; - for (Bank bank : controller.getBanks()) { - setUpDummy(powerDownPayloads[bank], bank); - } - //controllerCore.controller.send(PDNTrigger, sc_time_stamp(), powerDownPayloads[Bank(0)]); -} +//PowerDownManager::PowerDownManager(sc_module_name /*name*/, +// ControllerCore &controller) : +// controllerCore(controller) +//{ +// powerDownState = PowerDownState::Awake; +// for (Bank bank : controller.getBanks()) { +// setUpDummy(powerDownPayloads[bank], bank); +// } +// //controllerCore.controller.send(PDNTrigger, sc_time_stamp(), powerDownPayloads[Bank(0)]); +//} -PowerDownManager::~PowerDownManager() -{ +//PowerDownManager::~PowerDownManager() +//{ -} +//} -void PowerDownManager::sleep(Bank /*bank*/, sc_time time) -{ - if (!canSleep() || isInPowerDown()) - return; +//void PowerDownManager::sleep(Bank /*bank*/, sc_time time) +//{ +// if (!canSleep() || isInPowerDown()) +// return; - PowerDownState state = powerDownState; +// PowerDownState state = powerDownState; - if (state == PowerDownState::Awake) { //coming from active - state = controllerCore.state->rowBufferStates->allRowBuffersAreClosed() ? - PowerDownState::PDNPrecharge : PowerDownState::PDNActive; - } else if (state == - PowerDownState::AwakeForRefresh) { //coming from refresh interrupting power down - sc_assert(controllerCore.state->rowBufferStates->allRowBuffersAreClosed()); +// if (state == PowerDownState::Awake) { //coming from active +// state = controllerCore.state->rowBufferStates->allRowBuffersAreClosed() ? +// PowerDownState::PDNPrecharge : PowerDownState::PDNActive; +// } else if (state == +// PowerDownState::AwakeForRefresh) { //coming from refresh interrupting power down +// sc_assert(controllerCore.state->rowBufferStates->allRowBuffersAreClosed()); - if (controllerCore.state->getLastCommand(Command::PDEA).getStart() - >= controllerCore.state->getLastCommand(Command::PDEP).getStart()) - state = PowerDownState::PDNPrecharge; - else { - state = PowerDownState::PDNSelfRefresh; - } - } +// if (controllerCore.state->getLastCommand(Command::PDEA).getStart() +// >= controllerCore.state->getLastCommand(Command::PDEP).getStart()) +// state = PowerDownState::PDNPrecharge; +// else { +// state = PowerDownState::PDNSelfRefresh; +// } +// } - Command cmd = IPowerDownManager::getSleepCommand(state); - ScheduledCommand pdn(cmd, time, - Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), - DramExtension::getExtension(powerDownPayloads[Bank(0)])); +// Command cmd = IPowerDownManager::getSleepCommand(state); +// ScheduledCommand pdn(cmd, time, +// Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), +// DramExtension::getExtension(powerDownPayloads[Bank(0)])); - controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); +// controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); - if (state != PowerDownState::PDNSelfRefresh - && controllerCore.refreshManager->hasCollision(pdn)) { - return; - } else { - setPowerDownState(state); - sendPowerDownPayload(pdn); - } -} +// if (state != PowerDownState::PDNSelfRefresh +// && controllerCore.refreshManager->hasCollision(pdn)) { +// return; +// } else { +// setPowerDownState(state); +// sendPowerDownPayload(pdn); +// } +//} -void PowerDownManager::wakeUp(Bank bank, sc_time time) -{ - printDebugMessage("Waking up at " + time.to_string() + - " current power down state is " + powerDownStateToString(powerDownState)); +//void PowerDownManager::wakeUp(Bank bank, sc_time time) +//{ +// printDebugMessage("Waking up at " + time.to_string() + +// " current power down state is " + powerDownStateToString(powerDownState)); - if (isAwakeForRefresh()) { //Request enters system during Refresh - setPowerDownState(PowerDownState::Awake); - } else if (isInPowerDown()) { //Request wakes up power down - Command cmd = IPowerDownManager::getWakeUpCommand(powerDownState); - ScheduledCommand pdn(cmd, time, Configuration::getInstance().memSpec->getExecutionTime(cmd, - powerDownPayloads[Bank(0)]), - DramExtension::getExtension(powerDownPayloads[Bank(0)])); - controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); +// if (isAwakeForRefresh()) { //Request enters system during Refresh +// setPowerDownState(PowerDownState::Awake); +// } else if (isInPowerDown()) { //Request wakes up power down +// Command cmd = IPowerDownManager::getWakeUpCommand(powerDownState); +// ScheduledCommand pdn(cmd, time, Configuration::getInstance().memSpec->getExecutionTime(cmd, +// powerDownPayloads[Bank(0)]), +// DramExtension::getExtension(powerDownPayloads[Bank(0)])); +// controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); - if (cmd == Command::SREFEX) { - // Leaving Self Refresh. Plan the next refresh. - controllerCore.refreshManager->reInitialize(bank, pdn.getEnd()); - printDebugMessage("Waking up. Leaving Self Refresh at " + time.to_string() + - " next refresh planned to " + pdn.getEnd().to_string()); - } +// if (cmd == Command::SREFEX) { +// // Leaving Self Refresh. Plan the next refresh. +// controllerCore.refreshManager->reInitialize(bank, pdn.getEnd()); +// printDebugMessage("Waking up. Leaving Self Refresh at " + time.to_string() + +// " next refresh planned to " + pdn.getEnd().to_string()); +// } - setPowerDownState(PowerDownState::Awake); +// setPowerDownState(PowerDownState::Awake); - printDebugMessage("Sending power down exit command " + commandToString( - cmd) + " on all banks"); - sendPowerDownPayload(pdn); - } +// printDebugMessage("Sending power down exit command " + commandToString( +// cmd) + " on all banks"); +// sendPowerDownPayload(pdn); +// } - printDebugMessage("Awaken at " + time.to_string() + - " current power down state is " + powerDownStateToString(powerDownState)); -} +// printDebugMessage("Awaken at " + time.to_string() + +// " current power down state is " + powerDownStateToString(powerDownState)); +//} -void PowerDownManager::wakeUpForRefresh(Bank /*bank*/, sc_time time) -{ - printDebugMessage("Waking up for refresh at " + time.to_string() + - " current power down state is " + powerDownStateToString(powerDownState)); +//void PowerDownManager::wakeUpForRefresh(Bank /*bank*/, sc_time time) +//{ +// printDebugMessage("Waking up for refresh at " + time.to_string() + +// " current power down state is " + powerDownStateToString(powerDownState)); - if (isInPowerDown()) { - Command cmd = IPowerDownManager::getWakeUpCommand(powerDownState); - ScheduledCommand pdn(cmd, time, Configuration::getInstance().memSpec->getExecutionTime(cmd, - powerDownPayloads[Bank(0)]), - DramExtension::getExtension(powerDownPayloads[Bank(0)])); +// if (isInPowerDown()) { +// Command cmd = IPowerDownManager::getWakeUpCommand(powerDownState); +// ScheduledCommand pdn(cmd, time, Configuration::getInstance().memSpec->getExecutionTime(cmd, +// powerDownPayloads[Bank(0)]), +// DramExtension::getExtension(powerDownPayloads[Bank(0)])); - setPowerDownState(PowerDownState::AwakeForRefresh); +// setPowerDownState(PowerDownState::AwakeForRefresh); - printDebugMessage("Sending power down exit command " + commandToString( - cmd) + " on all banks"); - sendPowerDownPayload(pdn); - } +// printDebugMessage("Sending power down exit command " + commandToString( +// cmd) + " on all banks"); +// sendPowerDownPayload(pdn); +// } - printDebugMessage("Awaken for refresh at " + time.to_string() + - " current power down state is " + powerDownStateToString(powerDownState)); -} +// printDebugMessage("Awaken for refresh at " + time.to_string() + +// " current power down state is " + powerDownStateToString(powerDownState)); +//} -void PowerDownManager::sendPowerDownPayload(ScheduledCommand &pdnToSend) -{ - controllerCore.state->bus.moveCommandToNextFreeSlot(pdnToSend); - for (size_t bank = 1; bank < controllerCore.getBanks().size(); bank++) { - tlm_generic_payload &payloadToSend = powerDownPayloads[bank]; +//void PowerDownManager::sendPowerDownPayload(ScheduledCommand &pdnToSend) +//{ +// controllerCore.state->bus.moveCommandToNextFreeSlot(pdnToSend); +// for (size_t bank = 1; bank < controllerCore.getBanks().size(); bank++) { +// tlm_generic_payload &payloadToSend = powerDownPayloads[bank]; - ScheduledCommand pdn(pdnToSend.getCommand(), pdnToSend.getStart(), - pdnToSend.getExecutionTime(), DramExtension::getExtension(payloadToSend)); - controllerCore.state->change(pdn); +// ScheduledCommand pdn(pdnToSend.getCommand(), pdnToSend.getStart(), +// pdnToSend.getExecutionTime(), DramExtension::getExtension(payloadToSend)); +// controllerCore.state->change(pdn); - } - controllerCore.state->change(pdnToSend); - controllerCore.controller.send(pdnToSend, powerDownPayloads[Bank(0)]); - printDebugMessage("Sending power down command " + commandToString( - pdnToSend.getCommand()) + " on bank " + to_string(pdnToSend.getBank().ID()) + - " start time " + pdnToSend.getStart().to_string() + " end time " + - pdnToSend.getEnd().to_string()); -} +// } +// controllerCore.state->change(pdnToSend); +// controllerCore.controller.send(pdnToSend, powerDownPayloads[Bank(0)]); +// printDebugMessage("Sending power down command " + commandToString( +// pdnToSend.getCommand()) + " on bank " + to_string(pdnToSend.getBank().ID()) + +// " start time " + pdnToSend.getStart().to_string() + " end time " + +// pdnToSend.getEnd().to_string()); +//} -void PowerDownManager::setPowerDownState(PowerDownState state) -{ - powerDownState = state; - printDebugMessage("Is now in state " + powerDownStateToString( - powerDownState) + " on all banks"); -} +//void PowerDownManager::setPowerDownState(PowerDownState state) +//{ +// powerDownState = state; +// printDebugMessage("Is now in state " + powerDownStateToString( +// powerDownState) + " on all banks"); +//} -bool PowerDownManager::isInPowerDown() -{ - return (powerDownState == PowerDownState::PDNActive - || powerDownState == PowerDownState::PDNPrecharge - || powerDownState == PowerDownState::PDNSelfRefresh); -} +//bool PowerDownManager::isInPowerDown() +//{ +// return (powerDownState == PowerDownState::PDNActive +// || powerDownState == PowerDownState::PDNPrecharge +// || powerDownState == PowerDownState::PDNSelfRefresh); +//} -bool PowerDownManager::canSleep() -{ - for (Bank bank : controllerCore.getBanks()) { - if (!controllerCore.numberOfPayloads[bank] == 0) - return false; - } - return true; -} +//bool PowerDownManager::canSleep() +//{ +// for (Bank bank : controllerCore.getBanks()) { +// if (!controllerCore.numberOfPayloads[bank] == 0) +// return false; +// } +// return true; +//} -bool PowerDownManager::isInSelfRefresh(Bank /*bank*/) -{ - return powerDownState == PowerDownState::PDNSelfRefresh; -} +//bool PowerDownManager::isInSelfRefresh(Bank /*bank*/) +//{ +// return powerDownState == PowerDownState::PDNSelfRefresh; +//} -bool PowerDownManager::isAwakeForRefresh() -{ - return powerDownState == PowerDownState::AwakeForRefresh; -} +//bool PowerDownManager::isAwakeForRefresh() +//{ +// return powerDownState == PowerDownState::AwakeForRefresh; +//} -void PowerDownManager::triggerSleep(Bank bank, sc_time time) -{ - sleep(bank, time); -} +//void PowerDownManager::triggerSleep(Bank bank, sc_time time) +//{ +// sleep(bank, time); +//} -void PowerDownManager::printDebugMessage(std::string message) -{ - DebugManager::getInstance().printDebugMessage(this->name(), message); -} +//void PowerDownManager::printDebugMessage(std::string message) +//{ +// DebugManager::getInstance().printDebugMessage(this->name(), message); +//} diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.h b/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.h index ee90629e..bd7ffd3d 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.h +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManager.h @@ -1,71 +1,71 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// */ -#ifndef POWERDOWNMANAGER_H -#define POWERDOWNMANAGER_H +//#ifndef POWERDOWNMANAGER_H +//#define POWERDOWNMANAGER_H -#include "PowerDownManagerBankwise.h" +//#include "PowerDownManagerBankwise.h" -class ControllerCore; +//class ControllerCore; -class PowerDownManager: public IPowerDownManager, public sc_module -{ -public: - PowerDownManager(sc_module_name /*name*/, ControllerCore &controllerCore); - virtual ~PowerDownManager(); +//class PowerDownManager: public IPowerDownManager, public sc_module +//{ +//public: +// PowerDownManager(sc_module_name /*name*/, ControllerCore &controllerCore); +// virtual ~PowerDownManager(); - virtual void triggerSleep(Bank bank, sc_time time) override; - virtual void sleep(Bank /*bank*/, sc_time time) override; - virtual void wakeUp(Bank bank, sc_time time) override; - virtual void wakeUpForRefresh(Bank bank, sc_time time) override; - virtual bool isInSelfRefresh(Bank bank) override; +// virtual void triggerSleep(Bank bank, sc_time time) override; +// virtual void sleep(Bank /*bank*/, sc_time time) override; +// virtual void wakeUp(Bank bank, sc_time time) override; +// virtual void wakeUpForRefresh(Bank bank, sc_time time) override; +// virtual bool isInSelfRefresh(Bank bank) override; -protected: - void sendPowerDownPayload(ScheduledCommand &pdnToSend); - bool isInPowerDown(); - void setPowerDownState(PowerDownState state); - bool canSleep(); - bool isAwakeForRefresh(); +//protected: +// void sendPowerDownPayload(ScheduledCommand &pdnToSend); +// bool isInPowerDown(); +// void setPowerDownState(PowerDownState state); +// bool canSleep(); +// bool isAwakeForRefresh(); - PowerDownState powerDownState; - std::map powerDownPayloads; - ControllerCore &controllerCore; - void printDebugMessage(std::string message); -}; +// PowerDownState powerDownState; +// std::map powerDownPayloads; +// ControllerCore &controllerCore; +// void printDebugMessage(std::string message); +//}; -#endif // POWERDOWNMANAGER_H +//#endif // POWERDOWNMANAGER_H diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.cpp b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.cpp index 8ba7c0d2..4b9e125c 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.cpp @@ -1,216 +1,216 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// */ -#include "PowerDownManager.h" -#include "../ControllerCore.h" -#include "../../../common/utils.h" -#include "../../../common/DebugManager.h" -#include "../timingCalculations.h" +//#include "PowerDownManager.h" +//#include "../ControllerCore.h" +//#include "../../../common/utils.h" +//#include "../../../common/DebugManager.h" +//#include "../timingCalculations.h" -using namespace tlm; +//using namespace tlm; -PowerDownManagerBankwise::PowerDownManagerBankwise(sc_module_name /*name*/, - ControllerCore &controllerCore) : controllerCore(controllerCore) -{ - for (Bank bank : controllerCore.getBanks()) { - setUpDummy(powerDownPayloads[bank], bank); - powerDownStates[bank] = PowerDownState::Awake; - //controllerCore.controller.send(PDNTrigger, sc_time_stamp(), powerDownPayloads[bank]); - } -} +//PowerDownManagerBankwise::PowerDownManagerBankwise(sc_module_name /*name*/, +// ControllerCore &controllerCore) : controllerCore(controllerCore) +//{ +// for (Bank bank : controllerCore.getBanks()) { +// setUpDummy(powerDownPayloads[bank], bank); +// powerDownStates[bank] = PowerDownState::Awake; +// //controllerCore.controller.send(PDNTrigger, sc_time_stamp(), powerDownPayloads[bank]); +// } +//} -void PowerDownManagerBankwise::sleep(Bank bank, sc_time time) -{ - if (!canSleep(bank) || isInPowerDown(bank)) - return; +//void PowerDownManagerBankwise::sleep(Bank bank, sc_time time) +//{ +// if (!canSleep(bank) || isInPowerDown(bank)) +// return; - tlm_generic_payload &payload = powerDownPayloads[bank]; +// tlm_generic_payload &payload = powerDownPayloads[bank]; - PowerDownState state = powerDownStates[bank]; - if (state == PowerDownState::Awake) { //coming from active - state = controllerCore.state->rowBufferStates->rowBufferIsOpen( - bank) ? PowerDownState::PDNActive : PowerDownState::PDNPrecharge; - } else if (state == - PowerDownState::AwakeForRefresh) { //coming from refresh interrupting power down - sc_assert(!controllerCore.state->rowBufferStates->rowBufferIsOpen(bank)); +// PowerDownState state = powerDownStates[bank]; +// if (state == PowerDownState::Awake) { //coming from active +// state = controllerCore.state->rowBufferStates->rowBufferIsOpen( +// bank) ? PowerDownState::PDNActive : PowerDownState::PDNPrecharge; +// } else if (state == +// PowerDownState::AwakeForRefresh) { //coming from refresh interrupting power down +// sc_assert(!controllerCore.state->rowBufferStates->rowBufferIsOpen(bank)); - if (controllerCore.state->getLastCommand(Command::PDEA, bank).getStart() - >= controllerCore.state->getLastCommand(Command::PDEP, bank).getStart()) - state = PowerDownState::PDNPrecharge; - else { - state = PowerDownState::PDNSelfRefresh; - } - } +// if (controllerCore.state->getLastCommand(Command::PDEA, bank).getStart() +// >= controllerCore.state->getLastCommand(Command::PDEP, bank).getStart()) +// state = PowerDownState::PDNPrecharge; +// else { +// state = PowerDownState::PDNSelfRefresh; +// } +// } - Command cmd = IPowerDownManager::getSleepCommand(state); - ScheduledCommand pdn(cmd, time, - Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), - DramExtension::getExtension(payload)); - controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); +// Command cmd = IPowerDownManager::getSleepCommand(state); +// ScheduledCommand pdn(cmd, time, +// Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), +// DramExtension::getExtension(payload)); +// controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); - if (state != PowerDownState::PDNSelfRefresh - && controllerCore.refreshManager->hasCollision(pdn)) { - return; - } else { - setPowerDownState(state, bank); - sendPowerDownPayload(pdn); - } -} +// if (state != PowerDownState::PDNSelfRefresh +// && controllerCore.refreshManager->hasCollision(pdn)) { +// return; +// } else { +// setPowerDownState(state, bank); +// sendPowerDownPayload(pdn); +// } +//} -void PowerDownManagerBankwise::wakeUp(Bank bank, sc_time time) -{ - printDebugMessage("Waking up on bank " + to_string(bank.ID()) + " at " + - time.to_string() + " current power down state is " + powerDownStateToString( - powerDownStates[bank])); +//void PowerDownManagerBankwise::wakeUp(Bank bank, sc_time time) +//{ +// printDebugMessage("Waking up on bank " + to_string(bank.ID()) + " at " + +// time.to_string() + " current power down state is " + powerDownStateToString( +// powerDownStates[bank])); - if (isAwakeForRefresh(bank)) { - printDebugMessage("It was already awake for refresh on bank " + to_string( - bank.ID()) + " at " + time.to_string()); - setPowerDownState(PowerDownState::Awake, bank); - } else if (isInPowerDown(bank)) { - // Request wake up from power down. A Power Down Exit request will be generated (PDNAX, PDNPX, SREFX). - Command pdnExitCmd = IPowerDownManager::getWakeUpCommand(powerDownStates[bank]); - // Mount the command to be scheduled - ScheduledCommand pdnExit(pdnExitCmd, time, Configuration::getInstance().memSpec->getExecutionTime(pdnExitCmd, - powerDownPayloads[bank]), DramExtension::getExtension(powerDownPayloads[bank])); - // Ensure that time constraints are respected - controllerCore.getCommandChecker(pdnExitCmd).delayToSatisfyConstraints(pdnExit); +// if (isAwakeForRefresh(bank)) { +// printDebugMessage("It was already awake for refresh on bank " + to_string( +// bank.ID()) + " at " + time.to_string()); +// setPowerDownState(PowerDownState::Awake, bank); +// } else if (isInPowerDown(bank)) { +// // Request wake up from power down. A Power Down Exit request will be generated (PDNAX, PDNPX, SREFX). +// Command pdnExitCmd = IPowerDownManager::getWakeUpCommand(powerDownStates[bank]); +// // Mount the command to be scheduled +// ScheduledCommand pdnExit(pdnExitCmd, time, Configuration::getInstance().memSpec->getExecutionTime(pdnExitCmd, +// powerDownPayloads[bank]), DramExtension::getExtension(powerDownPayloads[bank])); +// // Ensure that time constraints are respected +// controllerCore.getCommandChecker(pdnExitCmd).delayToSatisfyConstraints(pdnExit); - if (pdnExitCmd == Command::SREFEX) { - // Leaving Self Refresh. Plan the next refresh. - controllerCore.refreshManager->reInitialize(bank, pdnExit.getEnd()); - printDebugMessage("Waking up. Leaving Self Refresh on Bank " + to_string( - bank.ID()) + " at " + time.to_string() + " next refresh planned to " + - pdnExit.getEnd().to_string()); - } +// if (pdnExitCmd == Command::SREFEX) { +// // Leaving Self Refresh. Plan the next refresh. +// controllerCore.refreshManager->reInitialize(bank, pdnExit.getEnd()); +// printDebugMessage("Waking up. Leaving Self Refresh on Bank " + to_string( +// bank.ID()) + " at " + time.to_string() + " next refresh planned to " + +// pdnExit.getEnd().to_string()); +// } - setPowerDownState(PowerDownState::Awake, bank); +// setPowerDownState(PowerDownState::Awake, bank); - printDebugMessage("Sending power down exit command " + commandToString( - pdnExitCmd) + " on bank " + to_string(bank.ID()) + " at " + time.to_string() + - " start time " + pdnExit.getStart().to_string() + " end time " + - pdnExit.getEnd().to_string()); - sendPowerDownPayload(pdnExit); - } +// printDebugMessage("Sending power down exit command " + commandToString( +// pdnExitCmd) + " on bank " + to_string(bank.ID()) + " at " + time.to_string() + +// " start time " + pdnExit.getStart().to_string() + " end time " + +// pdnExit.getEnd().to_string()); +// sendPowerDownPayload(pdnExit); +// } - printDebugMessage("Awaken on bank " + to_string(bank.ID()) + " at " + - time.to_string() + " current power down state is " + powerDownStateToString( - powerDownStates[bank])); -} +// printDebugMessage("Awaken on bank " + to_string(bank.ID()) + " at " + +// time.to_string() + " current power down state is " + powerDownStateToString( +// powerDownStates[bank])); +//} -void PowerDownManagerBankwise::wakeUpForRefresh(Bank bank, sc_time time) -{ - printDebugMessage("Waking up for refresh on bank " + to_string( - bank.ID()) + " at " + time.to_string() + " current power down state is " + - powerDownStateToString(powerDownStates[bank])); +//void PowerDownManagerBankwise::wakeUpForRefresh(Bank bank, sc_time time) +//{ +// printDebugMessage("Waking up for refresh on bank " + to_string( +// bank.ID()) + " at " + time.to_string() + " current power down state is " + +// powerDownStateToString(powerDownStates[bank])); - if (isInPowerDown(bank)) { - // A Power Down Exit request will be generated (PDNAX, PDNPX, SREFX). - Command pdnExitCmd = IPowerDownManager::getWakeUpCommand(powerDownStates[bank]); - // Get the execution time for this request - sc_time executionTime = Configuration::getInstance().memSpec->getExecutionTime(pdnExitCmd, powerDownPayloads[bank]); - // Mount the command to be scheduled - ScheduledCommand pdnExit(pdnExitCmd, time, executionTime, - DramExtension::getExtension(powerDownPayloads[bank])); +// if (isInPowerDown(bank)) { +// // A Power Down Exit request will be generated (PDNAX, PDNPX, SREFX). +// Command pdnExitCmd = IPowerDownManager::getWakeUpCommand(powerDownStates[bank]); +// // Get the execution time for this request +// sc_time executionTime = Configuration::getInstance().memSpec->getExecutionTime(pdnExitCmd, powerDownPayloads[bank]); +// // Mount the command to be scheduled +// ScheduledCommand pdnExit(pdnExitCmd, time, executionTime, +// DramExtension::getExtension(powerDownPayloads[bank])); - setPowerDownState(PowerDownState::AwakeForRefresh, bank); +// setPowerDownState(PowerDownState::AwakeForRefresh, bank); - printDebugMessage("Sending power down exit command " + commandToString( - pdnExitCmd) + " on bank " + to_string(bank.ID()) + " at " + time.to_string() + - " start time " + pdnExit.getStart().to_string() + " end time " + - pdnExit.getEnd().to_string()); - sendPowerDownPayload(pdnExit); - } +// printDebugMessage("Sending power down exit command " + commandToString( +// pdnExitCmd) + " on bank " + to_string(bank.ID()) + " at " + time.to_string() + +// " start time " + pdnExit.getStart().to_string() + " end time " + +// pdnExit.getEnd().to_string()); +// sendPowerDownPayload(pdnExit); +// } - printDebugMessage("Awaken for refresh on bank " + to_string( - bank.ID()) + " at " + time.to_string() + " current power down state is " + - powerDownStateToString(powerDownStates[bank])); -} +// printDebugMessage("Awaken for refresh on bank " + to_string( +// bank.ID()) + " at " + time.to_string() + " current power down state is " + +// powerDownStateToString(powerDownStates[bank])); +//} -bool PowerDownManagerBankwise::isInPowerDown(Bank bank) -{ - return isIn(powerDownStates[bank], { PowerDownState::PDNActive, PowerDownState::PDNPrecharge, PowerDownState::PDNSelfRefresh }); -} +//bool PowerDownManagerBankwise::isInPowerDown(Bank bank) +//{ +// return isIn(powerDownStates[bank], { PowerDownState::PDNActive, PowerDownState::PDNPrecharge, PowerDownState::PDNSelfRefresh }); +//} -bool PowerDownManagerBankwise::isInSelfRefresh(Bank bank) -{ - return powerDownStates[bank] == PowerDownState::PDNSelfRefresh; -} +//bool PowerDownManagerBankwise::isInSelfRefresh(Bank bank) +//{ +// return powerDownStates[bank] == PowerDownState::PDNSelfRefresh; +//} -bool PowerDownManagerBankwise::isAwakeForRefresh(Bank bank) -{ - return powerDownStates[bank] == PowerDownState::AwakeForRefresh; -} +//bool PowerDownManagerBankwise::isAwakeForRefresh(Bank bank) +//{ +// return powerDownStates[bank] == PowerDownState::AwakeForRefresh; +//} -bool PowerDownManagerBankwise::isAwake(Bank bank) -{ - return powerDownStates[bank] == PowerDownState::Awake; -} +//bool PowerDownManagerBankwise::isAwake(Bank bank) +//{ +// return powerDownStates[bank] == PowerDownState::Awake; +//} -void PowerDownManagerBankwise::setPowerDownState(PowerDownState state, - Bank bank) -{ - PowerDownState &bankstate = powerDownStates[bank]; - bankstate = state; - printDebugMessage("Is now in state " + powerDownStateToString( - state) + " on Bank " + to_string(bank.ID())); -} +//void PowerDownManagerBankwise::setPowerDownState(PowerDownState state, +// Bank bank) +//{ +// PowerDownState &bankstate = powerDownStates[bank]; +// bankstate = state; +// printDebugMessage("Is now in state " + powerDownStateToString( +// state) + " on Bank " + to_string(bank.ID())); +//} -void PowerDownManagerBankwise::sendPowerDownPayload(ScheduledCommand &pdn) -{ - controllerCore.state->bus.moveCommandToNextFreeSlot(pdn); - controllerCore.state->change(pdn); - printDebugMessage("Sending power down command " + commandToString( - pdn.getCommand()) + " on bank " + to_string(pdn.getBank().ID()) + " start time " - + pdn.getStart().to_string() + " end time " + pdn.getEnd().to_string()); - controllerCore.controller.send(pdn, powerDownPayloads[pdn.getBank()]); -} +//void PowerDownManagerBankwise::sendPowerDownPayload(ScheduledCommand &pdn) +//{ +// controllerCore.state->bus.moveCommandToNextFreeSlot(pdn); +// controllerCore.state->change(pdn); +// printDebugMessage("Sending power down command " + commandToString( +// pdn.getCommand()) + " on bank " + to_string(pdn.getBank().ID()) + " start time " +// + pdn.getStart().to_string() + " end time " + pdn.getEnd().to_string()); +// controllerCore.controller.send(pdn, powerDownPayloads[pdn.getBank()]); +//} -bool PowerDownManagerBankwise::canSleep(Bank bank) -{ - return controllerCore.numberOfPayloads[bank] == 0; -} +//bool PowerDownManagerBankwise::canSleep(Bank bank) +//{ +// return controllerCore.numberOfPayloads[bank] == 0; +//} -void PowerDownManagerBankwise::triggerSleep(Bank bank, sc_time time) -{ - sleep(bank, time); -} +//void PowerDownManagerBankwise::triggerSleep(Bank bank, sc_time time) +//{ +// sleep(bank, time); +//} -void PowerDownManagerBankwise::printDebugMessage(std::string message) -{ - DebugManager::getInstance().printDebugMessage(this->name(), message); -} +//void PowerDownManagerBankwise::printDebugMessage(std::string message) +//{ +// DebugManager::getInstance().printDebugMessage(this->name(), message); +//} diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.h b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.h index 69382538..07d32ba1 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.h +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerBankwise.h @@ -1,86 +1,86 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// */ -#ifndef POWERDOWNMANAGERBANKWISE_H -#define POWERDOWNMANAGERBANKWISE_H +//#ifndef POWERDOWNMANAGERBANKWISE_H +//#define POWERDOWNMANAGERBANKWISE_H -#include -#include -#include -#include -#include "../../Command.h" -#include "../../../common/dramExtensions.h" -#include "../scheduling/ScheduledCommand.h" -#include "IPowerDownManager.h" +//#include +//#include +//#include +//#include +//#include "../../Command.h" +//#include "../../../common/dramExtensions.h" +//#include "../scheduling/ScheduledCommand.h" +//#include "IPowerDownManager.h" -class ControllerCore; +//class ControllerCore; -class PowerDownManagerBankwise : public sc_module, public IPowerDownManager -{ -public: - PowerDownManagerBankwise(sc_module_name /*name*/, - ControllerCore &controllerCore); - virtual ~PowerDownManagerBankwise() {} - virtual void triggerSleep(Bank bank, sc_time time) override; - virtual void sleep(Bank bank, sc_time time) override; - virtual void wakeUp(Bank bank, sc_time time) override; - virtual void wakeUpForRefresh(Bank bank, sc_time time) override; - virtual bool isInSelfRefresh(Bank bank) override; +//class PowerDownManagerBankwise : public sc_module, public IPowerDownManager +//{ +//public: +// PowerDownManagerBankwise(sc_module_name /*name*/, +// ControllerCore &controllerCore); +// virtual ~PowerDownManagerBankwise() {} +// virtual void triggerSleep(Bank bank, sc_time time) override; +// virtual void sleep(Bank bank, sc_time time) override; +// virtual void wakeUp(Bank bank, sc_time time) override; +// virtual void wakeUpForRefresh(Bank bank, sc_time time) override; +// virtual bool isInSelfRefresh(Bank bank) override; -protected: - virtual bool isInPowerDown(Bank bank); - virtual bool isAwake(Bank bank); - virtual bool isAwakeForRefresh(Bank bank); +//protected: +// virtual bool isInPowerDown(Bank bank); +// virtual bool isAwake(Bank bank); +// virtual bool isAwakeForRefresh(Bank bank); - ControllerCore &controllerCore; - std::map powerDownPayloads; - std::map powerDownStates; +// ControllerCore &controllerCore; +// std::map powerDownPayloads; +// std::map powerDownStates; - virtual bool canSleep(Bank bank); +// virtual bool canSleep(Bank bank); - void setPowerDownState(PowerDownState state, Bank bank); +// void setPowerDownState(PowerDownState state, Bank bank); - Command getWakeUpCommand(PowerDownState state); - Command getSleepCommand(PowerDownState state); +// Command getWakeUpCommand(PowerDownState state); +// Command getSleepCommand(PowerDownState state); - void sendPowerDownPayload(ScheduledCommand &pdn); +// void sendPowerDownPayload(ScheduledCommand &pdn); - void printDebugMessage(std::string message); -}; +// void printDebugMessage(std::string message); +//}; -#endif // POWERDOWNMANAGERBANKWISE_H +//#endif // POWERDOWNMANAGERBANKWISE_H diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.cpp b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.cpp index 02c6250e..65a9a45d 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.cpp +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.cpp @@ -1,142 +1,142 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - * Felipe S. Prado - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// * Felipe S. Prado +// */ -#include "PowerDownManagerTimeout.h" -#include "../ControllerCore.h" -#include "../../../common/utils.h" -#include "../../../common/DebugManager.h" -#include "../timingCalculations.h" +//#include "PowerDownManagerTimeout.h" +//#include "../ControllerCore.h" +//#include "../../../common/utils.h" +//#include "../../../common/DebugManager.h" +//#include "../timingCalculations.h" -using namespace tlm; +//using namespace tlm; -PowerDownManagerTimeout::PowerDownManagerTimeout(sc_module_name name, - ControllerCore &controllerCore): - PowerDownManager(name, controllerCore) -{ - //controllerCore.controller.send(PDNTrigger, Configuration::getInstance().getPowerDownTimeout(), powerDownPayloads[Bank(0)]); -} +//PowerDownManagerTimeout::PowerDownManagerTimeout(sc_module_name name, +// ControllerCore &controllerCore): +// PowerDownManager(name, controllerCore) +//{ +// //controllerCore.controller.send(PDNTrigger, Configuration::getInstance().getPowerDownTimeout(), powerDownPayloads[Bank(0)]); +//} -PowerDownManagerTimeout::~PowerDownManagerTimeout() -{ - // TODO Auto-generated destructor stub -} +//PowerDownManagerTimeout::~PowerDownManagerTimeout() +//{ +// // TODO Auto-generated destructor stub +//} -void PowerDownManagerTimeout::sleep(Bank /*bank*/, sc_time time) -{ - bool timeoutTest; - if (!isAwakeForRefresh()) { - sc_time lastReadScheduled; - sc_time lastWriteScheduled; - if (Configuration::getInstance().OpenPagePolicy) { - lastReadScheduled = controllerCore.state->getLastCommand( - Command::RD).getEnd(); - lastWriteScheduled = controllerCore.state->getLastCommand( - Command::WR).getEnd(); - } else { - lastReadScheduled = controllerCore.state->getLastCommand( - Command::RDA).getEnd(); - lastWriteScheduled = controllerCore.state->getLastCommand( - Command::WRA).getEnd(); - } - sc_time lastScheduledCommand = max(lastReadScheduled, lastWriteScheduled); - timeoutTest = (time - lastScheduledCommand) >= - Configuration::getInstance().getPowerDownTimeout(); - } else { - timeoutTest = true; - } +//void PowerDownManagerTimeout::sleep(Bank /*bank*/, sc_time time) +//{ +// bool timeoutTest; +// if (!isAwakeForRefresh()) { +// sc_time lastReadScheduled; +// sc_time lastWriteScheduled; +// if (Configuration::getInstance().OpenPagePolicy) { +// lastReadScheduled = controllerCore.state->getLastCommand( +// Command::RD).getEnd(); +// lastWriteScheduled = controllerCore.state->getLastCommand( +// Command::WR).getEnd(); +// } else { +// lastReadScheduled = controllerCore.state->getLastCommand( +// Command::RDA).getEnd(); +// lastWriteScheduled = controllerCore.state->getLastCommand( +// Command::WRA).getEnd(); +// } +// sc_time lastScheduledCommand = max(lastReadScheduled, lastWriteScheduled); +// timeoutTest = (time - lastScheduledCommand) >= +// Configuration::getInstance().getPowerDownTimeout(); +// } else { +// timeoutTest = true; +// } - //test_awakeForRefresh = false; +// //test_awakeForRefresh = false; - if ( canSleep() && !isInPowerDown() && timeoutTest) { +// if ( canSleep() && !isInPowerDown() && timeoutTest) { - PowerDownState newState; - if (Configuration::getInstance().PowerDownMode == EPowerDownMode::TimeoutPDN) { - newState = controllerCore.state->rowBufferStates->allRowBuffersAreClosed() ? - PowerDownState::PDNPrecharge : PowerDownState::PDNActive; - } else { // PowerDownMode == TimeoutSREF - if (!controllerCore.state->rowBufferStates->allRowBuffersAreClosed()) { - ScheduledCommand prechargeAllMaster(Command::PREA, time, - Configuration::getInstance().memSpec->getExecutionTime( - Command::PREA, powerDownPayloads[Bank(0)]), - DramExtension::getExtension(powerDownPayloads[Bank(0)])); +// PowerDownState newState; +// if (Configuration::getInstance().PowerDownMode == EPowerDownMode::TimeoutPDN) { +// newState = controllerCore.state->rowBufferStates->allRowBuffersAreClosed() ? +// PowerDownState::PDNPrecharge : PowerDownState::PDNActive; +// } else { // PowerDownMode == TimeoutSREF +// if (!controllerCore.state->rowBufferStates->allRowBuffersAreClosed()) { +// ScheduledCommand prechargeAllMaster(Command::PREA, time, +// Configuration::getInstance().memSpec->getExecutionTime( +// Command::PREA, powerDownPayloads[Bank(0)]), +// DramExtension::getExtension(powerDownPayloads[Bank(0)])); - controllerCore.getCommandChecker( - Command::PREA).delayToSatisfyConstraints(prechargeAllMaster); +// controllerCore.getCommandChecker( +// Command::PREA).delayToSatisfyConstraints(prechargeAllMaster); - if (controllerCore.refreshManager->hasCollision(prechargeAllMaster)) { - return; - } else { - for (size_t i = 1; i < controllerCore.getBanks().size(); i++) { - ScheduledCommand prechargeAll(Command::PREA, - prechargeAllMaster.getStart(), prechargeAllMaster.getExecutionTime(), - powerDownPayloads[Bank(i)]); - controllerCore.state->change(prechargeAll); - } - controllerCore.state->change(prechargeAllMaster); - controllerCore.controller.send(prechargeAllMaster, powerDownPayloads[Bank(0)]); - } +// if (controllerCore.refreshManager->hasCollision(prechargeAllMaster)) { +// return; +// } else { +// for (size_t i = 1; i < controllerCore.getBanks().size(); i++) { +// ScheduledCommand prechargeAll(Command::PREA, +// prechargeAllMaster.getStart(), prechargeAllMaster.getExecutionTime(), +// powerDownPayloads[Bank(i)]); +// controllerCore.state->change(prechargeAll); +// } +// controllerCore.state->change(prechargeAllMaster); +// controllerCore.controller.send(prechargeAllMaster, powerDownPayloads[Bank(0)]); +// } - } +// } - newState = PowerDownState::PDNSelfRefresh; - } +// newState = PowerDownState::PDNSelfRefresh; +// } - Command cmd = IPowerDownManager::getSleepCommand(newState); - ScheduledCommand pdn(cmd, time, - Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), - DramExtension::getExtension(powerDownPayloads[Bank(0)])); +// Command cmd = IPowerDownManager::getSleepCommand(newState); +// ScheduledCommand pdn(cmd, time, +// Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), +// DramExtension::getExtension(powerDownPayloads[Bank(0)])); - controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); +// controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); - if (controllerCore.refreshManager->hasCollision(pdn)) { - return; - } else { - setPowerDownState(newState); - sendPowerDownPayload(pdn); - } - } -} +// if (controllerCore.refreshManager->hasCollision(pdn)) { +// return; +// } else { +// setPowerDownState(newState); +// sendPowerDownPayload(pdn); +// } +// } +//} -void PowerDownManagerTimeout::triggerSleep(Bank /*bank*/, sc_time time) -{ - if (canSleep() && !isInPowerDown()) { - controllerCore.controller.send(PDNTrigger, - time + controllerCore.config.getPowerDownTimeout(), powerDownPayloads[Bank(0)]); - } -} +//void PowerDownManagerTimeout::triggerSleep(Bank /*bank*/, sc_time time) +//{ +// if (canSleep() && !isInPowerDown()) { +// controllerCore.controller.send(PDNTrigger, +// time + controllerCore.config.getPowerDownTimeout(), powerDownPayloads[Bank(0)]); +// } +//} diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.h b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.h index d56675f5..48b36b0b 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.h +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeout.h @@ -1,63 +1,63 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - * Felipe S. Prado - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// * Felipe S. Prado +// */ -#ifndef POWERDOWNMANAGERTIMEOUT_H -#define POWERDOWNMANAGERTIMEOUT_H +//#ifndef POWERDOWNMANAGERTIMEOUT_H +//#define POWERDOWNMANAGERTIMEOUT_H -#include "PowerDownManager.h" -#include -#include "../../../common/dramExtensions.h" -#include "../scheduling/ScheduledCommand.h" -#include +//#include "PowerDownManager.h" +//#include +//#include "../../../common/dramExtensions.h" +//#include "../scheduling/ScheduledCommand.h" +//#include -class ControllerCore; +//class ControllerCore; -class PowerDownManagerTimeout: public PowerDownManager -{ -public: - PowerDownManagerTimeout(sc_module_name /*name*/, - ControllerCore &controllerCore); - virtual ~PowerDownManagerTimeout(); +//class PowerDownManagerTimeout: public PowerDownManager +//{ +//public: +// PowerDownManagerTimeout(sc_module_name /*name*/, +// ControllerCore &controllerCore); +// virtual ~PowerDownManagerTimeout(); - virtual void triggerSleep(Bank /*bank*/, sc_time time); - virtual void sleep(Bank /*bank*/, sc_time time); -}; +// virtual void triggerSleep(Bank /*bank*/, sc_time time); +// virtual void sleep(Bank /*bank*/, sc_time time); +//}; -#endif // POWERDOWNMANAGERTIMEOUT_H +//#endif // POWERDOWNMANAGERTIMEOUT_H diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.cpp b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.cpp index 3f361355..83535fc6 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.cpp +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.cpp @@ -1,135 +1,135 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - * Felipe S. Prado - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// * Felipe S. Prado +// */ -#include "PowerDownManagerTimeoutBankwise.h" -#include "../ControllerCore.h" -#include "../../../common/utils.h" -#include "../../../common/DebugManager.h" -#include "../timingCalculations.h" +//#include "PowerDownManagerTimeoutBankwise.h" +//#include "../ControllerCore.h" +//#include "../../../common/utils.h" +//#include "../../../common/DebugManager.h" +//#include "../timingCalculations.h" -using namespace tlm; +//using namespace tlm; -PowerDownManagerTimeoutBankwise::PowerDownManagerTimeoutBankwise( - sc_module_name name, ControllerCore &controllerCore): - PowerDownManagerBankwise(name, controllerCore) -{ - /*for (Bank bank : controllerCore.getBanks()) - { - controllerCore.controller.send(PDNTrigger, controllerCore.config.getPowerDownTimeout(), powerDownPayloads[bank]); - }*/ -} +//PowerDownManagerTimeoutBankwise::PowerDownManagerTimeoutBankwise( +// sc_module_name name, ControllerCore &controllerCore): +// PowerDownManagerBankwise(name, controllerCore) +//{ +// /*for (Bank bank : controllerCore.getBanks()) +// { +// controllerCore.controller.send(PDNTrigger, controllerCore.config.getPowerDownTimeout(), powerDownPayloads[bank]); +// }*/ +//} -PowerDownManagerTimeoutBankwise::~PowerDownManagerTimeoutBankwise() -{ - // TODO Auto-generated destructor stub -} +//PowerDownManagerTimeoutBankwise::~PowerDownManagerTimeoutBankwise() +//{ +// // TODO Auto-generated destructor stub +//} -void PowerDownManagerTimeoutBankwise::sleep(Bank bank, sc_time time) -{ - bool timeoutTest; - if (!isAwakeForRefresh(bank)) { - sc_time lastReadScheduled; - sc_time lastWriteScheduled; - if (Configuration::getInstance().OpenPagePolicy) { - lastReadScheduled = controllerCore.state->getLastCommand(Command::RD, - bank).getEnd(); - lastWriteScheduled = controllerCore.state->getLastCommand(Command::WR, - bank).getEnd(); - } else { - lastReadScheduled = controllerCore.state->getLastCommand(Command::RDA, - bank).getEnd(); - lastWriteScheduled = controllerCore.state->getLastCommand(Command::WRA, - bank).getEnd(); - } - sc_time lastScheduledCommand = max(lastReadScheduled, lastWriteScheduled); - timeoutTest = (time - lastScheduledCommand) >= - Configuration::getInstance().getPowerDownTimeout(); - } else { - timeoutTest = true; - } +//void PowerDownManagerTimeoutBankwise::sleep(Bank bank, sc_time time) +//{ +// bool timeoutTest; +// if (!isAwakeForRefresh(bank)) { +// sc_time lastReadScheduled; +// sc_time lastWriteScheduled; +// if (Configuration::getInstance().OpenPagePolicy) { +// lastReadScheduled = controllerCore.state->getLastCommand(Command::RD, +// bank).getEnd(); +// lastWriteScheduled = controllerCore.state->getLastCommand(Command::WR, +// bank).getEnd(); +// } else { +// lastReadScheduled = controllerCore.state->getLastCommand(Command::RDA, +// bank).getEnd(); +// lastWriteScheduled = controllerCore.state->getLastCommand(Command::WRA, +// bank).getEnd(); +// } +// sc_time lastScheduledCommand = max(lastReadScheduled, lastWriteScheduled); +// timeoutTest = (time - lastScheduledCommand) >= +// Configuration::getInstance().getPowerDownTimeout(); +// } else { +// timeoutTest = true; +// } - if ( canSleep(bank) && !isInPowerDown(bank) && timeoutTest) { - PowerDownState newState; - if (Configuration::getInstance().PowerDownMode == EPowerDownMode::TimeoutPDN) { - newState = controllerCore.state->rowBufferStates->rowBufferIsOpen( - bank) ? PowerDownState::PDNActive : PowerDownState::PDNPrecharge; - } else { // PowerDownMode == TimeoutSREF - if (controllerCore.state->rowBufferStates->rowBufferIsOpen(bank)) { - ScheduledCommand precharge(Command::PRE, time, - Configuration::getInstance().memSpec->getExecutionTime(Command::PRE, powerDownPayloads[bank]), - DramExtension::getExtension(powerDownPayloads[bank])); +// if ( canSleep(bank) && !isInPowerDown(bank) && timeoutTest) { +// PowerDownState newState; +// if (Configuration::getInstance().PowerDownMode == EPowerDownMode::TimeoutPDN) { +// newState = controllerCore.state->rowBufferStates->rowBufferIsOpen( +// bank) ? PowerDownState::PDNActive : PowerDownState::PDNPrecharge; +// } else { // PowerDownMode == TimeoutSREF +// if (controllerCore.state->rowBufferStates->rowBufferIsOpen(bank)) { +// ScheduledCommand precharge(Command::PRE, time, +// Configuration::getInstance().memSpec->getExecutionTime(Command::PRE, powerDownPayloads[bank]), +// DramExtension::getExtension(powerDownPayloads[bank])); - controllerCore.getCommandChecker(Command::PRE).delayToSatisfyConstraints( - precharge); +// controllerCore.getCommandChecker(Command::PRE).delayToSatisfyConstraints( +// precharge); - if (controllerCore.refreshManager->hasCollision(precharge)) { - return; - } else { - controllerCore.state->change(precharge); - controllerCore.controller.send(precharge, powerDownPayloads[bank]); - } +// if (controllerCore.refreshManager->hasCollision(precharge)) { +// return; +// } else { +// controllerCore.state->change(precharge); +// controllerCore.controller.send(precharge, powerDownPayloads[bank]); +// } - } +// } - newState = PowerDownState::PDNSelfRefresh; - } +// newState = PowerDownState::PDNSelfRefresh; +// } - Command cmd = IPowerDownManager::getSleepCommand(newState); - ScheduledCommand pdn(cmd, time, - Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), - DramExtension::getExtension(powerDownPayloads[bank])); +// Command cmd = IPowerDownManager::getSleepCommand(newState); +// ScheduledCommand pdn(cmd, time, +// Configuration::getInstance().memSpec->getMinExecutionTimeForPowerDownCmd(cmd), +// DramExtension::getExtension(powerDownPayloads[bank])); - controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); +// controllerCore.getCommandChecker(cmd).delayToSatisfyConstraints(pdn); - if (controllerCore.refreshManager->hasCollision(pdn)) { - return; - } else { - setPowerDownState(newState, bank); - sendPowerDownPayload(pdn); - } - } -} +// if (controllerCore.refreshManager->hasCollision(pdn)) { +// return; +// } else { +// setPowerDownState(newState, bank); +// sendPowerDownPayload(pdn); +// } +// } +//} -void PowerDownManagerTimeoutBankwise::triggerSleep(Bank bank, sc_time time) -{ - if (canSleep(bank) && !isInPowerDown(bank)) { - controllerCore.controller.send(PDNTrigger, - time + controllerCore.config.getPowerDownTimeout(), powerDownPayloads[bank]); - } -} +//void PowerDownManagerTimeoutBankwise::triggerSleep(Bank bank, sc_time time) +//{ +// if (canSleep(bank) && !isInPowerDown(bank)) { +// controllerCore.controller.send(PDNTrigger, +// time + controllerCore.config.getPowerDownTimeout(), powerDownPayloads[bank]); +// } +//} diff --git a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.h b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.h index e4a43bed..440a482d 100644 --- a/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.h +++ b/DRAMSys/library/src/controller/core/powerdown/PowerDownManagerTimeoutBankwise.h @@ -1,63 +1,63 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - * Felipe S. Prado - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// * Felipe S. Prado +// */ -#ifndef POWERDOWNMANAGERTIMEOUTBANKWISE_H -#define POWERDOWNMANAGERTIMEOUTBANKWISE_H +//#ifndef POWERDOWNMANAGERTIMEOUTBANKWISE_H +//#define POWERDOWNMANAGERTIMEOUTBANKWISE_H -#include "PowerDownManager.h" -#include -#include "../../../common/dramExtensions.h" -#include "../scheduling/ScheduledCommand.h" -#include +//#include "PowerDownManager.h" +//#include +//#include "../../../common/dramExtensions.h" +//#include "../scheduling/ScheduledCommand.h" +//#include -class ControllerCore; +//class ControllerCore; -class PowerDownManagerTimeoutBankwise: public PowerDownManagerBankwise -{ -public: - PowerDownManagerTimeoutBankwise(sc_module_name /*name*/, - ControllerCore &controllerCore); - virtual ~PowerDownManagerTimeoutBankwise(); +//class PowerDownManagerTimeoutBankwise: public PowerDownManagerBankwise +//{ +//public: +// PowerDownManagerTimeoutBankwise(sc_module_name /*name*/, +// ControllerCore &controllerCore); +// virtual ~PowerDownManagerTimeoutBankwise(); - virtual void triggerSleep(Bank bank, sc_time time); - virtual void sleep(Bank bank, sc_time time); -}; +// virtual void triggerSleep(Bank bank, sc_time time); +// virtual void sleep(Bank bank, sc_time time); +//}; -#endif // POWERDOWNMANAGERTIMEOUTBANKWISE_H +//#endif // POWERDOWNMANAGERTIMEOUTBANKWISE_H diff --git a/DRAMSys/library/src/controller/core/refresh/IRefreshManager.h b/DRAMSys/library/src/controller/core/refresh/IRefreshManager.h index 9b2f581b..54d535dc 100644 --- a/DRAMSys/library/src/controller/core/refresh/IRefreshManager.h +++ b/DRAMSys/library/src/controller/core/refresh/IRefreshManager.h @@ -1,66 +1,66 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Robert Gernhardt - * Matthias Jung - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Robert Gernhardt +// * Matthias Jung +// */ -#ifndef IREFRESHMANAGER_H -#define IREFRESHMANAGER_H +//#ifndef IREFRESHMANAGER_H +//#define IREFRESHMANAGER_H -#include -#include "../scheduling/ScheduledCommand.h" +//#include +//#include "../scheduling/ScheduledCommand.h" -// Flex. refresh (pull-in, postpone) -typedef enum { - ST_REFRESH = 0, - ST_PULLIN, - ST_POSTPONE, - ST_SKIP, - ST_BURST, - ST_ALIGN -} ref_fsm_state_t; +//// Flex. refresh (pull-in, postpone) +//typedef enum { +// ST_REFRESH = 0, +// ST_PULLIN, +// ST_POSTPONE, +// ST_SKIP, +// ST_BURST, +// ST_ALIGN +//} ref_fsm_state_t; -class IRefreshManager -{ -public: - virtual ~IRefreshManager() {}; - virtual bool hasCollision(const ScheduledCommand &command) = 0; - virtual void scheduleRefresh(tlm::tlm_generic_payload &payload, - sc_time time) = 0; - virtual void reInitialize(Bank bank, sc_time time) = 0; - virtual bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) = 0; -}; +//class IRefreshManager +//{ +//public: +// virtual ~IRefreshManager() {}; +// virtual bool hasCollision(const ScheduledCommand &command) = 0; +// virtual void scheduleRefresh(tlm::tlm_generic_payload &payload, +// sc_time time) = 0; +// virtual void reInitialize(Bank bank, sc_time time) = 0; +// virtual bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) = 0; +//}; -#endif // IREFRESHMANAGER_H +//#endif // IREFRESHMANAGER_H diff --git a/DRAMSys/library/src/controller/core/refresh/RGR.cpp b/DRAMSys/library/src/controller/core/refresh/RGR.cpp index 411cff75..ed8fee75 100644 --- a/DRAMSys/library/src/controller/core/refresh/RGR.cpp +++ b/DRAMSys/library/src/controller/core/refresh/RGR.cpp @@ -1,275 +1,275 @@ -/* - * Copyright (c) 2017, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Author: Éder F. Zulian - */ +///* +// * Copyright (c) 2017, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Author: Éder F. Zulian +// */ -#include +//#include -#include "RGR.h" -#include "../ControllerCore.h" -#include "../timingCalculations.h" -#include "../../../common/utils.h" +//#include "RGR.h" +//#include "../ControllerCore.h" +//#include "../timingCalculations.h" +//#include "../../../common/utils.h" -#define TRUE 1 -#define FALSE !(TRUE) -#define INITIAL_DISPLACEMENT FALSE +//#define TRUE 1 +//#define FALSE !(TRUE) +//#define INITIAL_DISPLACEMENT FALSE -using namespace std; +//using namespace std; -RGR::RGR(sc_module_name, ControllerCore &ctrlcore) : ccore(ctrlcore), - timing(ctrlcore.config.memSpec->refreshTimings[ccore.getBanks()[0]]) -{ - fmb = ccore.config.ControllerCoreRefForceMaxPostponeBurst; - bwl = ccore.config.BankwiseLogic; - ri = ccore.config.getRowInc(); - auto nr = ccore.config.memSpec->NumberOfRows; - auto nar = ccore.config.getNumAR(); - auto m = ccore.config.getRefMode(); - rpr = (nr / m) / nar; - assert(rpr > 0); - tREFIx = timing.tREFI / m; - trp = ccore.config.getTrpb(); - trcd = ccore.config.memSpec->tRCD; - postponeEnabled = ccore.config.ControllerCoreRefEnablePostpone; - pullInEnabled = ccore.config.ControllerCoreRefEnablePullIn; - maxpostpone = ccore.config.ControllerCoreRefMaxPostponed * m; - maxpullin = ccore.config.ControllerCoreRefMaxPulledIn * m; - for (Bank b : ccore.getBanks()) { - pulledin[b] = 0; - postponed[b] = 0; - currentState[b] = ST_REFRESH; - previousState[b] = ST_REFRESH; - nextState[b] = ST_REFRESH; - setUpDummy(rps[b], b); - } -#if INITIAL_DISPLACEMENT == TRUE - if (bwl) { - auto nbs = ccore.config.memSpec->NumberOfBanks; - for (Bank b : ccore.getBanks()) { - nextPlannedRefreshs[b] = b.ID() * tREFIx / nbs; - } - } -#else - for (Bank b : ccore.getBanks()) { - nextPlannedRefreshs[b] = SC_ZERO_TIME; - } -#endif - if (bwl) { - for (Bank b : ccore.getBanks()) { - planNextRefresh(b, tREFIx, false); - } - } else { - planNextRefresh(ccore.getBanks()[0], tREFIx, false); - } -} +//RGR::RGR(sc_module_name, ControllerCore &ctrlcore) : ccore(ctrlcore), +// timing(ctrlcore.config.memSpec->refreshTimings[ccore.getBanks()[0]]) +//{ +// fmb = ccore.config.ControllerCoreRefForceMaxPostponeBurst; +// bwl = ccore.config.BankwiseLogic; +// ri = ccore.config.getRowInc(); +// auto nr = ccore.config.memSpec->NumberOfRows; +// auto nar = ccore.config.getNumAR(); +// auto m = ccore.config.getRefMode(); +// rpr = (nr / m) / nar; +// assert(rpr > 0); +// tREFIx = timing.tREFI / m; +// trp = ccore.config.getTrpb(); +// trcd = ccore.config.memSpec->tRCD; +// postponeEnabled = ccore.config.ControllerCoreRefEnablePostpone; +// pullInEnabled = ccore.config.ControllerCoreRefEnablePullIn; +// maxpostpone = ccore.config.ControllerCoreRefMaxPostponed * m; +// maxpullin = ccore.config.ControllerCoreRefMaxPulledIn * m; +// for (Bank b : ccore.getBanks()) { +// pulledin[b] = 0; +// postponed[b] = 0; +// currentState[b] = ST_REFRESH; +// previousState[b] = ST_REFRESH; +// nextState[b] = ST_REFRESH; +// setUpDummy(rps[b], b); +// } +//#if INITIAL_DISPLACEMENT == TRUE +// if (bwl) { +// auto nbs = ccore.config.memSpec->NumberOfBanks; +// for (Bank b : ccore.getBanks()) { +// nextPlannedRefreshs[b] = b.ID() * tREFIx / nbs; +// } +// } +//#else +// for (Bank b : ccore.getBanks()) { +// nextPlannedRefreshs[b] = SC_ZERO_TIME; +// } +//#endif +// if (bwl) { +// for (Bank b : ccore.getBanks()) { +// planNextRefresh(b, tREFIx, false); +// } +// } else { +// planNextRefresh(ccore.getBanks()[0], tREFIx, false); +// } +//} -RGR::~RGR() -{ -} +//RGR::~RGR() +//{ +//} -bool RGR::hasCollision(const ScheduledCommand &cmd) -{ - Bank b = cmd.getBank(); - if (currentState[b] == ST_BURST) { - // A burst due to postponed refreshes shall not be interrupted. - return true; - } - return false; -} +//bool RGR::hasCollision(const ScheduledCommand &cmd) +//{ +// Bank b = cmd.getBank(); +// if (currentState[b] == ST_BURST) { +// // A burst due to postponed refreshes shall not be interrupted. +// return true; +// } +// return false; +//} -sc_time RGR::doRefresh(tlm::tlm_generic_payload &p, sc_time t) -{ - sc_assert(!isInvalidated(p, t)); - Bank b = DramExtension::getExtension(p).getBank(); - bool openBank = ccore.state->rowBufferStates->rowBufferIsOpen(b); - bool allClosed = ccore.state->rowBufferStates->allRowBuffersAreClosed(); - bool pre = bwl ? openBank : !allClosed; - sc_time trfcx = SC_ZERO_TIME; +//sc_time RGR::doRefresh(tlm::tlm_generic_payload &p, sc_time t) +//{ +// sc_assert(!isInvalidated(p, t)); +// Bank b = DramExtension::getExtension(p).getBank(); +// bool openBank = ccore.state->rowBufferStates->rowBufferIsOpen(b); +// bool allClosed = ccore.state->rowBufferStates->allRowBuffersAreClosed(); +// bool pre = bwl ? openBank : !allClosed; +// sc_time trfcx = SC_ZERO_TIME; - if (!bwl) { - for (Bank b : ccore.getBanks()) { - currentRefresh[b] = t; - } - } else { - currentRefresh[b] = t; - } +// if (!bwl) { +// for (Bank b : ccore.getBanks()) { +// currentRefresh[b] = t; +// } +// } else { +// currentRefresh[b] = t; +// } - if (pre) { - trfcx += trp; - if (bwl) { - if (ccore.config.getRGRBank(b.ID())) { - ccore.scheduleRequest(Command::PREB, rps[b]); - } - } else { - for (Bank b : ccore.getBanks()) { - auto rgrb = ccore.config.getRGRBank(b.ID()); - if (ccore.state->rowBufferStates->rowBufferIsOpen(b) && rgrb) { - ccore.scheduleRequest(Command::PREB, rps[Bank(b)]); - } - } - } - } +// if (pre) { +// trfcx += trp; +// if (bwl) { +// if (ccore.config.getRGRBank(b.ID())) { +// ccore.scheduleRequest(Command::PREB, rps[b]); +// } +// } else { +// for (Bank b : ccore.getBanks()) { +// auto rgrb = ccore.config.getRGRBank(b.ID()); +// if (ccore.state->rowBufferStates->rowBufferIsOpen(b) && rgrb) { +// ccore.scheduleRequest(Command::PREB, rps[Bank(b)]); +// } +// } +// } +// } - for (unsigned r = 0; r < rpr; r += ri) { - trfcx += trcd + trp; - if (bwl) { - if (ccore.config.getRGRBank(b.ID())) { - ccore.scheduleRequest(Command::ACTB, rps[b]); - ccore.scheduleRequest(Command::PREB, rps[b]); - } - DramExtension::getExtension(p).incrementRow(); - } else { - for (Bank b : ccore.getBanks()) { - if (ccore.config.getRGRBank(b.ID())) { - ccore.scheduleRequest(Command::ACTB, rps[b]); - ccore.scheduleRequest(Command::PREB, rps[b]); - } - DramExtension::getExtension(rps[b]).incrementRow(); - } - } - } +// for (unsigned r = 0; r < rpr; r += ri) { +// trfcx += trcd + trp; +// if (bwl) { +// if (ccore.config.getRGRBank(b.ID())) { +// ccore.scheduleRequest(Command::ACTB, rps[b]); +// ccore.scheduleRequest(Command::PREB, rps[b]); +// } +// DramExtension::getExtension(p).incrementRow(); +// } else { +// for (Bank b : ccore.getBanks()) { +// if (ccore.config.getRGRBank(b.ID())) { +// ccore.scheduleRequest(Command::ACTB, rps[b]); +// ccore.scheduleRequest(Command::PREB, rps[b]); +// } +// DramExtension::getExtension(rps[b]).incrementRow(); +// } +// } +// } - return trfcx; -} +// return trfcx; +//} -void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t) -{ - sc_time nrt; - sc_time trfcx; - Bank b = DramExtension::getExtension(p).getBank(); - bool preq = bwl ? ccore.hasPendingRequests(b) : ccore.hasPendingRequests(); - bool postpone = postponeEnabled && preq && (postponed[b] < maxpostpone); - bool pullIn = pullInEnabled && !preq && (pulledin[b] < maxpullin); - previousState[b] = currentState[b]; - currentState[b] = nextState[b]; - bool align = false; +//void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t) +//{ +// sc_time nrt; +// sc_time trfcx; +// Bank b = DramExtension::getExtension(p).getBank(); +// bool preq = bwl ? ccore.hasPendingRequests(b) : ccore.hasPendingRequests(); +// bool postpone = postponeEnabled && preq && (postponed[b] < maxpostpone); +// bool pullIn = pullInEnabled && !preq && (pulledin[b] < maxpullin); +// previousState[b] = currentState[b]; +// currentState[b] = nextState[b]; +// bool align = false; - switch (currentState[b]) { - case ST_REFRESH: - assert(pulledin[b] == 0 && postponed[b] == 0); - if (postpone) { - nrt = SC_ZERO_TIME; - nextState[b] = ST_POSTPONE; - } else if (pullIn) { - trfcx = doRefresh(p, t); - nrt = trfcx; - nextState[b] = ST_PULLIN; - } else { - doRefresh(p, t); - nrt = tREFIx; - nextState[b] = ST_REFRESH; - } - break; - case ST_PULLIN: - if (pullIn) { - trfcx = doRefresh(p, t); - pulledin[b]++; - nrt = trfcx; - nextState[b] = ST_PULLIN; - } else { - nrt = SC_ZERO_TIME; - nextState[b] = ST_ALIGN; - } - break; - case ST_SKIP: - if (pulledin[b] == 0) { - nrt = SC_ZERO_TIME; - nextState[b] = ST_REFRESH; - } else { - pulledin[b]--; - nrt = tREFIx; - nextState[b] = ST_SKIP; - } - break; - case ST_POSTPONE: - postponed[b]++; - if ((postponed[b] > maxpostpone) || (!preq && !fmb)) { - // Burst triggered by inactivity or max postpone value reached. - nrt = SC_ZERO_TIME; - nextState[b] = ST_BURST; - } else { - nrt = tREFIx; - nextState[b] = ST_POSTPONE; - } - break; - case ST_BURST: - doRefresh(p, t); - postponed[b]--; - if (postponed[b] == 0) { - nrt = SC_ZERO_TIME; - nextState[b] = ST_ALIGN; - } else { - nrt = SC_ZERO_TIME; - nextState[b] = ST_BURST; - } - break; - case ST_ALIGN: - nrt = tREFIx; - align = true; - if (previousState[b] == ST_PULLIN) { - nextState[b] = ST_SKIP; - } else { - nextState[b] = ST_REFRESH; - } - break; - default: - SC_REPORT_FATAL(this->name(), "RGR flex FSM invalid state."); - break; - } - planNextRefresh(bwl ? b : ccore.getBanks()[0], nrt, align); -} +// switch (currentState[b]) { +// case ST_REFRESH: +// assert(pulledin[b] == 0 && postponed[b] == 0); +// if (postpone) { +// nrt = SC_ZERO_TIME; +// nextState[b] = ST_POSTPONE; +// } else if (pullIn) { +// trfcx = doRefresh(p, t); +// nrt = trfcx; +// nextState[b] = ST_PULLIN; +// } else { +// doRefresh(p, t); +// nrt = tREFIx; +// nextState[b] = ST_REFRESH; +// } +// break; +// case ST_PULLIN: +// if (pullIn) { +// trfcx = doRefresh(p, t); +// pulledin[b]++; +// nrt = trfcx; +// nextState[b] = ST_PULLIN; +// } else { +// nrt = SC_ZERO_TIME; +// nextState[b] = ST_ALIGN; +// } +// break; +// case ST_SKIP: +// if (pulledin[b] == 0) { +// nrt = SC_ZERO_TIME; +// nextState[b] = ST_REFRESH; +// } else { +// pulledin[b]--; +// nrt = tREFIx; +// nextState[b] = ST_SKIP; +// } +// break; +// case ST_POSTPONE: +// postponed[b]++; +// if ((postponed[b] > maxpostpone) || (!preq && !fmb)) { +// // Burst triggered by inactivity or max postpone value reached. +// nrt = SC_ZERO_TIME; +// nextState[b] = ST_BURST; +// } else { +// nrt = tREFIx; +// nextState[b] = ST_POSTPONE; +// } +// break; +// case ST_BURST: +// doRefresh(p, t); +// postponed[b]--; +// if (postponed[b] == 0) { +// nrt = SC_ZERO_TIME; +// nextState[b] = ST_ALIGN; +// } else { +// nrt = SC_ZERO_TIME; +// nextState[b] = ST_BURST; +// } +// break; +// case ST_ALIGN: +// nrt = tREFIx; +// align = true; +// if (previousState[b] == ST_PULLIN) { +// nextState[b] = ST_SKIP; +// } else { +// nextState[b] = ST_REFRESH; +// } +// break; +// default: +// SC_REPORT_FATAL(this->name(), "RGR flex FSM invalid state."); +// break; +// } +// planNextRefresh(bwl ? b : ccore.getBanks()[0], nrt, align); +//} -void RGR::planNextRefresh(Bank b, sc_time t, bool align) -{ - if (align) { - nextPlannedRefreshs[b] = trunc(nextPlannedRefreshs[b].to_double() / - tREFIx.to_double()) * tREFIx; - } - nextPlannedRefreshs[b] += t; - ccore.controller.send(REFTrigger, nextPlannedRefreshs[b], rps[b]); -} +//void RGR::planNextRefresh(Bank b, sc_time t, bool align) +//{ +// if (align) { +// nextPlannedRefreshs[b] = trunc(nextPlannedRefreshs[b].to_double() / +// tREFIx.to_double()) * tREFIx; +// } +// nextPlannedRefreshs[b] += t; +// ccore.controller.send(REFTrigger, nextPlannedRefreshs[b], rps[b]); +//} -void RGR::reInitialize(Bank b, sc_time t) -{ - nextPlannedRefreshs[b] = clkAlign(t, Alignment::DOWN); - planNextRefresh(b, tREFIx, true); -} +//void RGR::reInitialize(Bank b, sc_time t) +//{ +// nextPlannedRefreshs[b] = clkAlign(t, Alignment::DOWN); +// planNextRefresh(b, tREFIx, true); +//} -bool RGR::isInvalidated(tlm::tlm_generic_payload &p, sc_time t) -{ - return nextPlannedRefreshs[DramExtension::getExtension(p).getBank()] > t; -} +//bool RGR::isInvalidated(tlm::tlm_generic_payload &p, sc_time t) +//{ +// return nextPlannedRefreshs[DramExtension::getExtension(p).getBank()] > t; +//} -void RGR::printDebugMessage(std::string msg) -{ - DebugManager::getInstance().printDebugMessage(this->name(), msg); -} +//void RGR::printDebugMessage(std::string msg) +//{ +// DebugManager::getInstance().printDebugMessage(this->name(), msg); +//} diff --git a/DRAMSys/library/src/controller/core/refresh/RGR.h b/DRAMSys/library/src/controller/core/refresh/RGR.h index bfe8e444..00524a29 100644 --- a/DRAMSys/library/src/controller/core/refresh/RGR.h +++ b/DRAMSys/library/src/controller/core/refresh/RGR.h @@ -1,81 +1,81 @@ -/* - * Copyright (c) 2017, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Author: Éder F. Zulian - */ +///* +// * Copyright (c) 2017, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Author: Éder F. Zulian +// */ -#ifndef RGR_H -#define RGR_H +//#ifndef RGR_H +//#define RGR_H -#include "../../../common/dramExtensions.h" -#include "../configuration/MemSpec.h" -#include "IRefreshManager.h" +//#include "../../../common/dramExtensions.h" +//#include "../configuration/MemSpec.h" +//#include "IRefreshManager.h" -class ControllerCore; +//class ControllerCore; -class RGR : public IRefreshManager, public sc_module -{ -public: - RGR(sc_module_name, ControllerCore &ctrlcore); - virtual ~RGR(); - virtual bool hasCollision(const ScheduledCommand &cmd) override; - virtual void scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t) override; - void reInitialize(Bank bank, sc_time time) override; - bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) override; -private: - bool fmb; - bool bwl; - unsigned int ri; - unsigned int rpr; - sc_time trp; - sc_time trcd; - sc_time tREFIx; - ControllerCore &ccore; - RefreshTiming &timing; - std::map rps; - std::map nextPlannedRefreshs; - std::map currentRefresh; - bool postponeEnabled; - bool pullInEnabled; - unsigned int maxpostpone; - unsigned int maxpullin; - std::map pulledin; - std::map postponed; - std::map currentState; - std::map previousState; - std::map nextState; - sc_time doRefresh(tlm::tlm_generic_payload &p, sc_time t); - void planNextRefresh(Bank b, sc_time t, bool align); - void printDebugMessage(std::string message); -}; +//class RGR : public IRefreshManager, public sc_module +//{ +//public: +// RGR(sc_module_name, ControllerCore &ctrlcore); +// virtual ~RGR(); +// virtual bool hasCollision(const ScheduledCommand &cmd) override; +// virtual void scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t) override; +// void reInitialize(Bank bank, sc_time time) override; +// bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) override; +//private: +// bool fmb; +// bool bwl; +// unsigned int ri; +// unsigned int rpr; +// sc_time trp; +// sc_time trcd; +// sc_time tREFIx; +// ControllerCore &ccore; +// RefreshTiming &timing; +// std::map rps; +// std::map nextPlannedRefreshs; +// std::map currentRefresh; +// bool postponeEnabled; +// bool pullInEnabled; +// unsigned int maxpostpone; +// unsigned int maxpullin; +// std::map pulledin; +// std::map postponed; +// std::map currentState; +// std::map previousState; +// std::map nextState; +// sc_time doRefresh(tlm::tlm_generic_payload &p, sc_time t); +// void planNextRefresh(Bank b, sc_time t, bool align); +// void printDebugMessage(std::string message); +//}; -#endif // RGR_H +//#endif // RGR_H diff --git a/DRAMSys/library/src/controller/core/refresh/RefreshManager.cpp b/DRAMSys/library/src/controller/core/refresh/RefreshManager.cpp index d71634bc..f229cb80 100644 --- a/DRAMSys/library/src/controller/core/refresh/RefreshManager.cpp +++ b/DRAMSys/library/src/controller/core/refresh/RefreshManager.cpp @@ -1,275 +1,275 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Robert Gernhardt - * Matthias Jung - * Felipe S. Prado - * Ana Mativi - * Éder F. Zulian - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Robert Gernhardt +// * Matthias Jung +// * Felipe S. Prado +// * Ana Mativi +// * Éder F. Zulian +// */ -#include "RefreshManager.h" -#include "../ControllerCore.h" -#include "../timingCalculations.h" -#include "../../../common/utils.h" +//#include "RefreshManager.h" +//#include "../ControllerCore.h" +//#include "../timingCalculations.h" +//#include "../../../common/utils.h" -using namespace tlm; +//using namespace tlm; -RefreshManager::RefreshManager(sc_module_name, - ControllerCore &controller) : controllerCore(controller), - timing(controller.config.memSpec->refreshTimings[Bank(0)]) -{ - auto m = controllerCore.config.getRefMode(); - tREFIx = timing.tREFI / m; - tRFCx = timing.tRFC; - postponeEnabled = controllerCore.config.ControllerCoreRefEnablePostpone; - pullInEnabled = controllerCore.config.ControllerCoreRefEnablePullIn; - maxpostpone = controllerCore.config.ControllerCoreRefMaxPostponed * m; - maxpullin = controllerCore.config.ControllerCoreRefMaxPulledIn * m; - pulledin = 0; - postponed = 0; - currentState = ST_REFRESH; - previousState = ST_REFRESH; - nextState = ST_REFRESH; - nextPlannedRefresh = SC_ZERO_TIME; - for (Bank bank : controller.getBanks()) { - setUpDummy(refreshPayloads[bank], bank); - } - planNextRefresh(tREFIx, false); -} +//RefreshManager::RefreshManager(sc_module_name, +// ControllerCore &controller) : controllerCore(controller), +// timing(controller.config.memSpec->refreshTimings[Bank(0)]) +//{ +// auto m = controllerCore.config.getRefMode(); +// tREFIx = timing.tREFI / m; +// tRFCx = timing.tRFC; +// postponeEnabled = controllerCore.config.ControllerCoreRefEnablePostpone; +// pullInEnabled = controllerCore.config.ControllerCoreRefEnablePullIn; +// maxpostpone = controllerCore.config.ControllerCoreRefMaxPostponed * m; +// maxpullin = controllerCore.config.ControllerCoreRefMaxPulledIn * m; +// pulledin = 0; +// postponed = 0; +// currentState = ST_REFRESH; +// previousState = ST_REFRESH; +// nextState = ST_REFRESH; +// nextPlannedRefresh = SC_ZERO_TIME; +// for (Bank bank : controller.getBanks()) { +// setUpDummy(refreshPayloads[bank], bank); +// } +// planNextRefresh(tREFIx, false); +//} -RefreshManager::~RefreshManager() -{ -} +//RefreshManager::~RefreshManager() +//{ +//} -//Check if a command will be scheduled during the next refresh period -bool RefreshManager::hasCollision(const ScheduledCommand &command) -{ - bool collisionWithPreviousRefEnd = command.getStart() < - controllerCore.state->getLastCommand(Command::REFA).getEnd(); - bool collisionWithNextRefStart = command.getEnd() >= nextPlannedRefresh; - if (controllerCore.config.ControllerCoreRefEnablePostpone - && (postponed < maxpostpone)) { - // Flexible refresh is on and have "credits" to postpone. - // Then there will not be a collision with next refresh because - // nextPlannedRefresh will be updated. - collisionWithNextRefStart = false; - } - if (currentState == ST_BURST) { - // A burst due to postponed refreshes shall not be interrupted. - collisionWithNextRefStart = true; - } - return collisionWithPreviousRefEnd || collisionWithNextRefStart; -} +////Check if a command will be scheduled during the next refresh period +//bool RefreshManager::hasCollision(const ScheduledCommand &command) +//{ +// bool collisionWithPreviousRefEnd = command.getStart() < +// controllerCore.state->getLastCommand(Command::REFA).getEnd(); +// bool collisionWithNextRefStart = command.getEnd() >= nextPlannedRefresh; +// if (controllerCore.config.ControllerCoreRefEnablePostpone +// && (postponed < maxpostpone)) { +// // Flexible refresh is on and have "credits" to postpone. +// // Then there will not be a collision with next refresh because +// // nextPlannedRefresh will be updated. +// collisionWithNextRefStart = false; +// } +// if (currentState == ST_BURST) { +// // A burst due to postponed refreshes shall not be interrupted. +// collisionWithNextRefStart = true; +// } +// return collisionWithPreviousRefEnd || collisionWithNextRefStart; +//} -bool RefreshManager::doRefresh(tlm::tlm_generic_payload &payload, sc_time time) -{ - sc_assert(!isInvalidated(payload, time)); - bool pre = false; - // If any row is open, precharge all. - if (!controllerCore.state->rowBufferStates->allRowBuffersAreClosed()) { - pre = true; - ScheduledCommand prechargeAllMaster(Command::PREA, time, - Configuration::getInstance().memSpec->getExecutionTime( - Command::PREA, refreshPayloads[Bank(0)]), - refreshPayloads[Bank(0)]); - controllerCore.getCommandChecker( - Command::PREA).delayToSatisfyConstraints(prechargeAllMaster); +//bool RefreshManager::doRefresh(tlm::tlm_generic_payload &payload, sc_time time) +//{ +// sc_assert(!isInvalidated(payload, time)); +// bool pre = false; +// // If any row is open, precharge all. +// if (!controllerCore.state->rowBufferStates->allRowBuffersAreClosed()) { +// pre = true; +// ScheduledCommand prechargeAllMaster(Command::PREA, time, +// Configuration::getInstance().memSpec->getExecutionTime( +// Command::PREA, refreshPayloads[Bank(0)]), +// refreshPayloads[Bank(0)]); +// controllerCore.getCommandChecker( +// Command::PREA).delayToSatisfyConstraints(prechargeAllMaster); - for (size_t i = 1; i < controllerCore.getBanks().size(); i++) { - ScheduledCommand prechargeAll(Command::PREA, - prechargeAllMaster.getStart(), prechargeAllMaster.getExecutionTime(), - refreshPayloads[Bank(i)]); - controllerCore.state->change(prechargeAll); - } - controllerCore.state->change(prechargeAllMaster); - controllerCore.controller.send(prechargeAllMaster, refreshPayloads[Bank(0)]); - } +// for (size_t i = 1; i < controllerCore.getBanks().size(); i++) { +// ScheduledCommand prechargeAll(Command::PREA, +// prechargeAllMaster.getStart(), prechargeAllMaster.getExecutionTime(), +// refreshPayloads[Bank(i)]); +// controllerCore.state->change(prechargeAll); +// } +// controllerCore.state->change(prechargeAllMaster); +// controllerCore.controller.send(prechargeAllMaster, refreshPayloads[Bank(0)]); +// } - //Otherwise just the AutoRefresh command is scheduled. - ScheduledCommand refreshAllMaster(Command::REFA, time, - Configuration::getInstance().memSpec->getExecutionTime( - Command::REFA, refreshPayloads[Bank(0)]), - DramExtension::getExtension(refreshPayloads[Bank(0)])); - controllerCore.getCommandChecker( - Command::REFA).delayToSatisfyConstraints(refreshAllMaster); +// //Otherwise just the AutoRefresh command is scheduled. +// ScheduledCommand refreshAllMaster(Command::REFA, time, +// Configuration::getInstance().memSpec->getExecutionTime( +// Command::REFA, refreshPayloads[Bank(0)]), +// DramExtension::getExtension(refreshPayloads[Bank(0)])); +// controllerCore.getCommandChecker( +// Command::REFA).delayToSatisfyConstraints(refreshAllMaster); - for (size_t i = 1; i < controllerCore.getBanks().size(); i++) { - ScheduledCommand refresh(Command::REFA, refreshAllMaster.getStart(), - refreshAllMaster.getExecutionTime(), refreshPayloads[Bank(i)]); - controllerCore.state->change(refresh); - DramExtension::getExtension(refreshPayloads[Bank(i)]).incrementRow(); - } - controllerCore.state->change(refreshAllMaster); - DramExtension::getExtension(refreshPayloads[Bank(0)]).incrementRow(); - controllerCore.controller.send(refreshAllMaster, refreshPayloads[Bank(0)]); - return pre; -} +// for (size_t i = 1; i < controllerCore.getBanks().size(); i++) { +// ScheduledCommand refresh(Command::REFA, refreshAllMaster.getStart(), +// refreshAllMaster.getExecutionTime(), refreshPayloads[Bank(i)]); +// controllerCore.state->change(refresh); +// DramExtension::getExtension(refreshPayloads[Bank(i)]).incrementRow(); +// } +// controllerCore.state->change(refreshAllMaster); +// DramExtension::getExtension(refreshPayloads[Bank(0)]).incrementRow(); +// controllerCore.controller.send(refreshAllMaster, refreshPayloads[Bank(0)]); +// return pre; +//} -void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload &payload, - sc_time time) -{ - sc_time nextRefTiming; - bool pendingReq = controllerCore.hasPendingRequests(); - bool canPostpone = postponeEnabled && pendingReq && (postponed < maxpostpone); - bool canPullIn = pullInEnabled && !pendingReq && (pulledin < maxpullin); - previousState = currentState; - currentState = nextState; - bool align = false; - sc_time nrt; - bool pre; +//void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload &payload, +// sc_time time) +//{ +// sc_time nextRefTiming; +// bool pendingReq = controllerCore.hasPendingRequests(); +// bool canPostpone = postponeEnabled && pendingReq && (postponed < maxpostpone); +// bool canPullIn = pullInEnabled && !pendingReq && (pulledin < maxpullin); +// previousState = currentState; +// currentState = nextState; +// bool align = false; +// sc_time nrt; +// bool pre; - switch (currentState) { - case ST_REFRESH: - // Regular Refresh. It's possible to migrate from this to the flexible - // refresh states - assert(pulledin == 0 && postponed == 0); - if (canPostpone) { - nextRefTiming = SC_ZERO_TIME; - nextState = ST_POSTPONE; - } else if (canPullIn) { - pre = doRefresh(payload, time); - nrt = tRFCx; - if (pre) - nrt += controllerCore.config.memSpec->tRP_old; - nextRefTiming = nrt; - nextState = ST_PULLIN; - } else { - doRefresh(payload, time); - nextRefTiming = tREFIx; - nextState = ST_REFRESH; - } - break; - case ST_PULLIN: - // Pull-in a refresh. Try to pull-in refreshes as long it is possible. - if (canPullIn) { - pulledin++; - pre = doRefresh(payload, time); - nrt = tRFCx; - if (pre) - nrt += controllerCore.config.memSpec->tRP_old; - nextRefTiming = nrt; - nextState = ST_PULLIN; - } else { - nextRefTiming = SC_ZERO_TIME; - nextState = ST_ALIGN; - } - break; - case ST_SKIP: - // Skip the pulled-in refreshes. - if (pulledin == 0) { - nextRefTiming = SC_ZERO_TIME; - nextState = ST_REFRESH; - } else { - pulledin--; - nextRefTiming = tREFIx; - nextState = ST_SKIP; - } - break; - case ST_POSTPONE: - // Postpone Refresh. Delaying refreshes as long as there are pending - // requests and credits to postpone. Should be followed by a burst - // refresh. - postponed++; - if ((postponed > maxpostpone) || (!pendingReq - && !controllerCore.config.ControllerCoreRefForceMaxPostponeBurst)) { - // Burst triggered by inactivity or max postpone value reached. - nextRefTiming = SC_ZERO_TIME; - nextState = ST_BURST; - } else { - nextRefTiming = tREFIx; - nextState = ST_POSTPONE; - } - break; - case ST_BURST: - // Burst postponed refreshes. - pre = doRefresh(payload, time); - postponed--; - if (postponed == 0) { - // All refreshes issued, next state will align to tREFIx - nextRefTiming = SC_ZERO_TIME; - nextState = ST_ALIGN; - } else { - nrt = tRFCx; - if (pre) - nrt += controllerCore.config.memSpec->tRP_old; - nextRefTiming = nrt; - nextState = ST_BURST; - } - break; - case ST_ALIGN: - // Align Refresh. Adjusting the timing so the next REF timing will be - // a in a time multiple of tREFIx - nextRefTiming = tREFIx; - align = true; - if (previousState == ST_PULLIN) { - nextState = ST_SKIP; - } else { - nextState = ST_REFRESH; - } - break; - default: - SC_REPORT_FATAL(this->name(), "Invalid state in flexible refresh FSM."); - break; - } - planNextRefresh(nextRefTiming, align); -} +// switch (currentState) { +// case ST_REFRESH: +// // Regular Refresh. It's possible to migrate from this to the flexible +// // refresh states +// assert(pulledin == 0 && postponed == 0); +// if (canPostpone) { +// nextRefTiming = SC_ZERO_TIME; +// nextState = ST_POSTPONE; +// } else if (canPullIn) { +// pre = doRefresh(payload, time); +// nrt = tRFCx; +// if (pre) +// nrt += controllerCore.config.memSpec->tRP_old; +// nextRefTiming = nrt; +// nextState = ST_PULLIN; +// } else { +// doRefresh(payload, time); +// nextRefTiming = tREFIx; +// nextState = ST_REFRESH; +// } +// break; +// case ST_PULLIN: +// // Pull-in a refresh. Try to pull-in refreshes as long it is possible. +// if (canPullIn) { +// pulledin++; +// pre = doRefresh(payload, time); +// nrt = tRFCx; +// if (pre) +// nrt += controllerCore.config.memSpec->tRP_old; +// nextRefTiming = nrt; +// nextState = ST_PULLIN; +// } else { +// nextRefTiming = SC_ZERO_TIME; +// nextState = ST_ALIGN; +// } +// break; +// case ST_SKIP: +// // Skip the pulled-in refreshes. +// if (pulledin == 0) { +// nextRefTiming = SC_ZERO_TIME; +// nextState = ST_REFRESH; +// } else { +// pulledin--; +// nextRefTiming = tREFIx; +// nextState = ST_SKIP; +// } +// break; +// case ST_POSTPONE: +// // Postpone Refresh. Delaying refreshes as long as there are pending +// // requests and credits to postpone. Should be followed by a burst +// // refresh. +// postponed++; +// if ((postponed > maxpostpone) || (!pendingReq +// && !controllerCore.config.ControllerCoreRefForceMaxPostponeBurst)) { +// // Burst triggered by inactivity or max postpone value reached. +// nextRefTiming = SC_ZERO_TIME; +// nextState = ST_BURST; +// } else { +// nextRefTiming = tREFIx; +// nextState = ST_POSTPONE; +// } +// break; +// case ST_BURST: +// // Burst postponed refreshes. +// pre = doRefresh(payload, time); +// postponed--; +// if (postponed == 0) { +// // All refreshes issued, next state will align to tREFIx +// nextRefTiming = SC_ZERO_TIME; +// nextState = ST_ALIGN; +// } else { +// nrt = tRFCx; +// if (pre) +// nrt += controllerCore.config.memSpec->tRP_old; +// nextRefTiming = nrt; +// nextState = ST_BURST; +// } +// break; +// case ST_ALIGN: +// // Align Refresh. Adjusting the timing so the next REF timing will be +// // a in a time multiple of tREFIx +// nextRefTiming = tREFIx; +// align = true; +// if (previousState == ST_PULLIN) { +// nextState = ST_SKIP; +// } else { +// nextState = ST_REFRESH; +// } +// break; +// default: +// SC_REPORT_FATAL(this->name(), "Invalid state in flexible refresh FSM."); +// break; +// } +// planNextRefresh(nextRefTiming, align); +//} -void RefreshManager::planNextRefresh(sc_time nextRefTiming, bool align) -{ - if (align) { - nextPlannedRefresh = trunc(nextPlannedRefresh.to_double() / tREFIx.to_double()) - * tREFIx; - } - nextPlannedRefresh += nextRefTiming; - controllerCore.controller.send(REFTrigger, nextPlannedRefresh, - refreshPayloads[Bank(0)]); -} +//void RefreshManager::planNextRefresh(sc_time nextRefTiming, bool align) +//{ +// if (align) { +// nextPlannedRefresh = trunc(nextPlannedRefresh.to_double() / tREFIx.to_double()) +// * tREFIx; +// } +// nextPlannedRefresh += nextRefTiming; +// controllerCore.controller.send(REFTrigger, nextPlannedRefresh, +// refreshPayloads[Bank(0)]); +//} -void RefreshManager::reInitialize(Bank, sc_time time) -{ - nextPlannedRefresh = clkAlign(time, Alignment::DOWN); - planNextRefresh(tREFIx, true); -} +//void RefreshManager::reInitialize(Bank, sc_time time) +//{ +// nextPlannedRefresh = clkAlign(time, Alignment::DOWN); +// planNextRefresh(tREFIx, true); +//} -bool RefreshManager::isInvalidated(tlm::tlm_generic_payload &payload - __attribute__((unused)), sc_time time) -{ - return nextPlannedRefresh > time; -} +//bool RefreshManager::isInvalidated(tlm::tlm_generic_payload &payload +// __attribute__((unused)), sc_time time) +//{ +// return nextPlannedRefresh > time; +//} -void RefreshManager::printDebugMessage(std::string message) -{ - DebugManager::getInstance().printDebugMessage(this->name(), message); -} +//void RefreshManager::printDebugMessage(std::string message) +//{ +// DebugManager::getInstance().printDebugMessage(this->name(), message); +//} diff --git a/DRAMSys/library/src/controller/core/refresh/RefreshManager.h b/DRAMSys/library/src/controller/core/refresh/RefreshManager.h index c89fa12b..b4f5c0fc 100644 --- a/DRAMSys/library/src/controller/core/refresh/RefreshManager.h +++ b/DRAMSys/library/src/controller/core/refresh/RefreshManager.h @@ -1,82 +1,82 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Robert Gernhardt - * Matthias Jung - * Éder F. Zulian - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Robert Gernhardt +// * Matthias Jung +// * Éder F. Zulian +// */ -#ifndef REFRESHMANAGER_H -#define REFRESHMANAGER_H +//#ifndef REFRESHMANAGER_H +//#define REFRESHMANAGER_H -#include "IRefreshManager.h" -#include "../configuration/MemSpec.h" +//#include "IRefreshManager.h" +//#include "../configuration/MemSpec.h" -class ControllerCore; +//class ControllerCore; -class RefreshManager : public IRefreshManager, public sc_module -{ -public: - RefreshManager(sc_module_name /*name*/, ControllerCore &controllerCore); - virtual ~RefreshManager(); +//class RefreshManager : public IRefreshManager, public sc_module +//{ +//public: +// RefreshManager(sc_module_name /*name*/, ControllerCore &controllerCore); +// virtual ~RefreshManager(); - virtual bool hasCollision(const ScheduledCommand &command) override; - virtual void scheduleRefresh(tlm::tlm_generic_payload &payload, - sc_time time) override; - void reInitialize(Bank bank, sc_time time) override; - virtual bool isInvalidated(tlm::tlm_generic_payload &payload, - sc_time time) override; +// virtual bool hasCollision(const ScheduledCommand &command) override; +// virtual void scheduleRefresh(tlm::tlm_generic_payload &payload, +// sc_time time) override; +// void reInitialize(Bank bank, sc_time time) override; +// virtual bool isInvalidated(tlm::tlm_generic_payload &payload, +// sc_time time) override; -private: - ControllerCore &controllerCore; - RefreshTiming &timing; - sc_time nextPlannedRefresh; - sc_time tREFIx; - sc_time tRFCx; - std::map refreshPayloads; - bool postponeEnabled; - bool pullInEnabled; - unsigned int maxpostpone; - unsigned int maxpullin; - unsigned int pulledin; - unsigned int postponed; - ref_fsm_state_t currentState; - ref_fsm_state_t previousState; - ref_fsm_state_t nextState; +//private: +// ControllerCore &controllerCore; +// RefreshTiming &timing; +// sc_time nextPlannedRefresh; +// sc_time tREFIx; +// sc_time tRFCx; +// std::map refreshPayloads; +// bool postponeEnabled; +// bool pullInEnabled; +// unsigned int maxpostpone; +// unsigned int maxpullin; +// unsigned int pulledin; +// unsigned int postponed; +// ref_fsm_state_t currentState; +// ref_fsm_state_t previousState; +// ref_fsm_state_t nextState; - bool doRefresh(tlm::tlm_generic_payload &payload, sc_time time); - void planNextRefresh(sc_time time, bool align); - void printDebugMessage(std::string message); -}; +// bool doRefresh(tlm::tlm_generic_payload &payload, sc_time time); +// void planNextRefresh(sc_time time, bool align); +// void printDebugMessage(std::string message); +//}; -#endif // REFRESHMANAGER_H +//#endif // REFRESHMANAGER_H diff --git a/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp index 1a44d304..373204c2 100644 --- a/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp @@ -1,265 +1,265 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - * Éder F. Zulian - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// * Éder F. Zulian +// */ -#include "RefreshManagerBankwise.h" -#include "../ControllerCore.h" -#include "../timingCalculations.h" -#include "../../../common/utils.h" +//#include "RefreshManagerBankwise.h" +//#include "../ControllerCore.h" +//#include "../timingCalculations.h" +//#include "../../../common/utils.h" -using namespace std; +//using namespace std; -RefreshManagerBankwise::RefreshManagerBankwise(sc_module_name, - ControllerCore &controller) : controllerCore(controller), - timing(controller.config.memSpec->refreshTimings[Bank(0)]) -{ - auto m = controllerCore.config.getRefMode(); - tREFIx = timing.tREFI / m; - tRFCx = timing.tRFC; - postponeEnabled = controllerCore.config.ControllerCoreRefEnablePostpone; - pullInEnabled = controllerCore.config.ControllerCoreRefEnablePullIn; - maxpostpone = controllerCore.config.ControllerCoreRefMaxPostponed * m; - maxpullin = controllerCore.config.ControllerCoreRefMaxPulledIn * m; - for (Bank bank : controller.getBanks()) { - nextPlannedRefreshs[bank] = SC_ZERO_TIME; - pulledin[bank] = 0; - postponed[bank] = 0; - currentState[bank] = ST_REFRESH; - previousState[bank] = ST_REFRESH; - nextState[bank] = ST_REFRESH; - setUpDummy(refreshPayloads[bank], bank); - planNextRefresh(bank, tREFIx, false); - } -} +//RefreshManagerBankwise::RefreshManagerBankwise(sc_module_name, +// ControllerCore &controller) : controllerCore(controller), +// timing(controller.config.memSpec->refreshTimings[Bank(0)]) +//{ +// auto m = controllerCore.config.getRefMode(); +// tREFIx = timing.tREFI / m; +// tRFCx = timing.tRFC; +// postponeEnabled = controllerCore.config.ControllerCoreRefEnablePostpone; +// pullInEnabled = controllerCore.config.ControllerCoreRefEnablePullIn; +// maxpostpone = controllerCore.config.ControllerCoreRefMaxPostponed * m; +// maxpullin = controllerCore.config.ControllerCoreRefMaxPulledIn * m; +// for (Bank bank : controller.getBanks()) { +// nextPlannedRefreshs[bank] = SC_ZERO_TIME; +// pulledin[bank] = 0; +// postponed[bank] = 0; +// currentState[bank] = ST_REFRESH; +// previousState[bank] = ST_REFRESH; +// nextState[bank] = ST_REFRESH; +// setUpDummy(refreshPayloads[bank], bank); +// planNextRefresh(bank, tREFIx, false); +// } +//} -RefreshManagerBankwise::~RefreshManagerBankwise() -{ -} +//RefreshManagerBankwise::~RefreshManagerBankwise() +//{ +//} -bool RefreshManagerBankwise::hasCollision(const ScheduledCommand &command) -{ - Bank bank = command.getBank(); - bool collisionWithPreviousRefEnd = command.getStart() < - controllerCore.state->getLastCommand(Command::REFA, bank).getEnd(); - bool collisionWithNextRefStart = command.getEnd() >= nextPlannedRefreshs[bank]; - if (controllerCore.config.ControllerCoreRefEnablePostpone - && (postponed[bank] < maxpostpone)) { - // Flexible refresh is on and have "credits" to postpone. - // Then there will not be a collision with next refresh because - // nextPlannedRefresh will be updated. - collisionWithNextRefStart = false; - } - if (currentState[bank] == ST_BURST) { - // A burst due to postponed refreshes shall not be interrupted. - collisionWithNextRefStart = true; - } - return collisionWithPreviousRefEnd || collisionWithNextRefStart; -} +//bool RefreshManagerBankwise::hasCollision(const ScheduledCommand &command) +//{ +// Bank bank = command.getBank(); +// bool collisionWithPreviousRefEnd = command.getStart() < +// controllerCore.state->getLastCommand(Command::REFA, bank).getEnd(); +// bool collisionWithNextRefStart = command.getEnd() >= nextPlannedRefreshs[bank]; +// if (controllerCore.config.ControllerCoreRefEnablePostpone +// && (postponed[bank] < maxpostpone)) { +// // Flexible refresh is on and have "credits" to postpone. +// // Then there will not be a collision with next refresh because +// // nextPlannedRefresh will be updated. +// collisionWithNextRefStart = false; +// } +// if (currentState[bank] == ST_BURST) { +// // A burst due to postponed refreshes shall not be interrupted. +// collisionWithNextRefStart = true; +// } +// return collisionWithPreviousRefEnd || collisionWithNextRefStart; +//} -bool RefreshManagerBankwise::doRefresh(tlm::tlm_generic_payload &payload, - sc_time time) -{ - sc_assert(!isInvalidated(payload, time)); - bool pre = false; - tlm::tlm_generic_payload &refreshPayload = - refreshPayloads[DramExtension::getExtension(payload).getBank()]; - DramExtension &extension = DramExtension::getExtension(refreshPayload); +//bool RefreshManagerBankwise::doRefresh(tlm::tlm_generic_payload &payload, +// sc_time time) +//{ +// sc_assert(!isInvalidated(payload, time)); +// bool pre = false; +// tlm::tlm_generic_payload &refreshPayload = +// refreshPayloads[DramExtension::getExtension(payload).getBank()]; +// DramExtension &extension = DramExtension::getExtension(refreshPayload); - if (controllerCore.state->rowBufferStates->rowBufferIsOpen( - extension.getBank())) { - pre = true; - ScheduledCommand precharge(Command::PRE, time, - Configuration::getInstance().memSpec->getExecutionTime( - Command::PRE, refreshPayload), extension); - controllerCore.getCommandChecker(Command::PRE).delayToSatisfyConstraints( - precharge); - controllerCore.state->change(precharge); - controllerCore.controller.send(precharge, refreshPayload); - } +// if (controllerCore.state->rowBufferStates->rowBufferIsOpen( +// extension.getBank())) { +// pre = true; +// ScheduledCommand precharge(Command::PRE, time, +// Configuration::getInstance().memSpec->getExecutionTime( +// Command::PRE, refreshPayload), extension); +// controllerCore.getCommandChecker(Command::PRE).delayToSatisfyConstraints( +// precharge); +// controllerCore.state->change(precharge); +// controllerCore.controller.send(precharge, refreshPayload); +// } - ScheduledCommand refresh(Command::REFA, time, - Configuration::getInstance().memSpec->getExecutionTime( - Command::REFA, refreshPayload), extension); - controllerCore.getCommandChecker( - Command::REFA).delayToSatisfyConstraints(refresh); - controllerCore.state->change(refresh); - extension.incrementRow(); - controllerCore.controller.send(refresh, refreshPayload); - return pre; -} +// ScheduledCommand refresh(Command::REFA, time, +// Configuration::getInstance().memSpec->getExecutionTime( +// Command::REFA, refreshPayload), extension); +// controllerCore.getCommandChecker( +// Command::REFA).delayToSatisfyConstraints(refresh); +// controllerCore.state->change(refresh); +// extension.incrementRow(); +// controllerCore.controller.send(refresh, refreshPayload); +// return pre; +//} -void RefreshManagerBankwise::scheduleRefresh(tlm::tlm_generic_payload &payload, - sc_time time) -{ - sc_time nextRefTiming; - Bank bank = DramExtension::getExtension(payload).getBank(); - bool pendingReq = controllerCore.hasPendingRequests(bank); - bool canPostpone = postponeEnabled && pendingReq - && (postponed[bank] < maxpostpone); - bool canPullIn = pullInEnabled && !pendingReq && (pulledin[bank] < maxpullin); - previousState[bank] = currentState[bank]; - currentState[bank] = nextState[bank]; - bool align = false; - sc_time nrt; - bool pre; +//void RefreshManagerBankwise::scheduleRefresh(tlm::tlm_generic_payload &payload, +// sc_time time) +//{ +// sc_time nextRefTiming; +// Bank bank = DramExtension::getExtension(payload).getBank(); +// bool pendingReq = controllerCore.hasPendingRequests(bank); +// bool canPostpone = postponeEnabled && pendingReq +// && (postponed[bank] < maxpostpone); +// bool canPullIn = pullInEnabled && !pendingReq && (pulledin[bank] < maxpullin); +// previousState[bank] = currentState[bank]; +// currentState[bank] = nextState[bank]; +// bool align = false; +// sc_time nrt; +// bool pre; - switch (currentState[bank]) { - case ST_REFRESH: - // Regular Refresh. It's possible to migrate from this to the flexible - // refresh states - assert(pulledin[bank] == 0 && postponed[bank] == 0); - if (canPostpone) { - nextRefTiming = SC_ZERO_TIME; - nextState[bank] = ST_POSTPONE; - } else if (canPullIn) { - pre = doRefresh(payload, time); - nrt = tRFCx; - if (pre) - nrt += controllerCore.config.memSpec->tRP_old; - nextRefTiming = nrt; - nextState[bank] = ST_PULLIN; - } else { - doRefresh(payload, time); - nextRefTiming = tREFIx; - nextState[bank] = ST_REFRESH; - } - break; - case ST_PULLIN: - // Pull-in a refresh. Try to pull-in refreshes as long it is possible. - if (canPullIn) { - pulledin[bank]++; - pre = doRefresh(payload, time); - nrt = tRFCx; - if (pre) - nrt += controllerCore.config.memSpec->tRP_old; - nextRefTiming = nrt; - nextState[bank] = ST_PULLIN; - } else { - nextRefTiming = SC_ZERO_TIME; - nextState[bank] = ST_ALIGN; - } - break; - case ST_SKIP: - // Skip the pulled-in refreshes. - if (pulledin[bank] == 0) { - nextRefTiming = SC_ZERO_TIME; - nextState[bank] = ST_REFRESH; - } else { - pulledin[bank]--; - nextRefTiming = tREFIx; - nextState[bank] = ST_SKIP; - } - break; - case ST_POSTPONE: - // Postpone Refresh. Delaying refreshes as long as there are pending - // requests and credits to postpone. Should be followed by a burst - // refresh. - postponed[bank]++; - if ((postponed[bank] > maxpostpone) || (!pendingReq - && !controllerCore.config.ControllerCoreRefForceMaxPostponeBurst)) { - // Burst triggered by inactivity or max postpone value reached. - nextRefTiming = SC_ZERO_TIME; - nextState[bank] = ST_BURST; - } else { - nextRefTiming = tREFIx; - nextState[bank] = ST_POSTPONE; - } - break; +// switch (currentState[bank]) { +// case ST_REFRESH: +// // Regular Refresh. It's possible to migrate from this to the flexible +// // refresh states +// assert(pulledin[bank] == 0 && postponed[bank] == 0); +// if (canPostpone) { +// nextRefTiming = SC_ZERO_TIME; +// nextState[bank] = ST_POSTPONE; +// } else if (canPullIn) { +// pre = doRefresh(payload, time); +// nrt = tRFCx; +// if (pre) +// nrt += controllerCore.config.memSpec->tRP_old; +// nextRefTiming = nrt; +// nextState[bank] = ST_PULLIN; +// } else { +// doRefresh(payload, time); +// nextRefTiming = tREFIx; +// nextState[bank] = ST_REFRESH; +// } +// break; +// case ST_PULLIN: +// // Pull-in a refresh. Try to pull-in refreshes as long it is possible. +// if (canPullIn) { +// pulledin[bank]++; +// pre = doRefresh(payload, time); +// nrt = tRFCx; +// if (pre) +// nrt += controllerCore.config.memSpec->tRP_old; +// nextRefTiming = nrt; +// nextState[bank] = ST_PULLIN; +// } else { +// nextRefTiming = SC_ZERO_TIME; +// nextState[bank] = ST_ALIGN; +// } +// break; +// case ST_SKIP: +// // Skip the pulled-in refreshes. +// if (pulledin[bank] == 0) { +// nextRefTiming = SC_ZERO_TIME; +// nextState[bank] = ST_REFRESH; +// } else { +// pulledin[bank]--; +// nextRefTiming = tREFIx; +// nextState[bank] = ST_SKIP; +// } +// break; +// case ST_POSTPONE: +// // Postpone Refresh. Delaying refreshes as long as there are pending +// // requests and credits to postpone. Should be followed by a burst +// // refresh. +// postponed[bank]++; +// if ((postponed[bank] > maxpostpone) || (!pendingReq +// && !controllerCore.config.ControllerCoreRefForceMaxPostponeBurst)) { +// // Burst triggered by inactivity or max postpone value reached. +// nextRefTiming = SC_ZERO_TIME; +// nextState[bank] = ST_BURST; +// } else { +// nextRefTiming = tREFIx; +// nextState[bank] = ST_POSTPONE; +// } +// break; - case ST_BURST: - // Burst postponed refreshes. - pre = doRefresh(payload, time); - postponed[bank]--; - if (postponed[bank] == 0) { - // All refreshes issued, next state will align to tREFIx - nextRefTiming = SC_ZERO_TIME; - nextState[bank] = ST_ALIGN; - } else { - nrt = tRFCx; - if (pre) - nrt += controllerCore.config.memSpec->tRP_old; - nextRefTiming = nrt; - nextState[bank] = ST_BURST; - } - break; - case ST_ALIGN: - // Align Refresh. Adjusting the timing so the next REF timing will be - // a in a time multiple of tREFIx - nextRefTiming = tREFIx; - align = true; - if (previousState[bank] == ST_PULLIN) { - nextState[bank] = ST_SKIP; - } else { - nextState[bank] = ST_REFRESH; - } - break; - default: - SC_REPORT_FATAL(this->name(), "Invalid state in bw flex. ref. FSM."); - break; - } - planNextRefresh(bank, nextRefTiming, align); -} +// case ST_BURST: +// // Burst postponed refreshes. +// pre = doRefresh(payload, time); +// postponed[bank]--; +// if (postponed[bank] == 0) { +// // All refreshes issued, next state will align to tREFIx +// nextRefTiming = SC_ZERO_TIME; +// nextState[bank] = ST_ALIGN; +// } else { +// nrt = tRFCx; +// if (pre) +// nrt += controllerCore.config.memSpec->tRP_old; +// nextRefTiming = nrt; +// nextState[bank] = ST_BURST; +// } +// break; +// case ST_ALIGN: +// // Align Refresh. Adjusting the timing so the next REF timing will be +// // a in a time multiple of tREFIx +// nextRefTiming = tREFIx; +// align = true; +// if (previousState[bank] == ST_PULLIN) { +// nextState[bank] = ST_SKIP; +// } else { +// nextState[bank] = ST_REFRESH; +// } +// break; +// default: +// SC_REPORT_FATAL(this->name(), "Invalid state in bw flex. ref. FSM."); +// break; +// } +// planNextRefresh(bank, nextRefTiming, align); +//} -void RefreshManagerBankwise::planNextRefresh(Bank bank, sc_time nextRefTiming, - bool align) -{ - if (align) { - nextPlannedRefreshs[bank] = trunc(nextPlannedRefreshs[bank].to_double() / - tREFIx.to_double()) * tREFIx; - } - nextPlannedRefreshs[bank] += nextRefTiming; - controllerCore.controller.send(REFTrigger, nextPlannedRefreshs[bank], - refreshPayloads[bank]); -} +//void RefreshManagerBankwise::planNextRefresh(Bank bank, sc_time nextRefTiming, +// bool align) +//{ +// if (align) { +// nextPlannedRefreshs[bank] = trunc(nextPlannedRefreshs[bank].to_double() / +// tREFIx.to_double()) * tREFIx; +// } +// nextPlannedRefreshs[bank] += nextRefTiming; +// controllerCore.controller.send(REFTrigger, nextPlannedRefreshs[bank], +// refreshPayloads[bank]); +//} -void RefreshManagerBankwise::reInitialize(Bank bank, sc_time time) -{ - nextPlannedRefreshs[bank] = clkAlign(time, Alignment::DOWN); - planNextRefresh(bank, tREFIx, true); -} +//void RefreshManagerBankwise::reInitialize(Bank bank, sc_time time) +//{ +// nextPlannedRefreshs[bank] = clkAlign(time, Alignment::DOWN); +// planNextRefresh(bank, tREFIx, true); +//} -bool RefreshManagerBankwise::isInvalidated(tlm::tlm_generic_payload &payload, - sc_time time) -{ - return nextPlannedRefreshs[DramExtension::getExtension(payload).getBank()] > - time; -} +//bool RefreshManagerBankwise::isInvalidated(tlm::tlm_generic_payload &payload, +// sc_time time) +//{ +// return nextPlannedRefreshs[DramExtension::getExtension(payload).getBank()] > +// time; +//} -void RefreshManagerBankwise::printDebugMessage(std::string message) -{ - DebugManager::getInstance().printDebugMessage(this->name(), message); -} +//void RefreshManagerBankwise::printDebugMessage(std::string message) +//{ +// DebugManager::getInstance().printDebugMessage(this->name(), message); +//} diff --git a/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.h b/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.h index a4728f4e..bf094bfc 100644 --- a/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.h +++ b/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.h @@ -1,83 +1,83 @@ -/* - * Copyright (c) 2015, University of Kaiserslautern - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: - * Janik Schlemminger - * Matthias Jung - * Éder F. Zulian - */ +///* +// * Copyright (c) 2015, University of Kaiserslautern +// * All rights reserved. +// * +// * Redistribution and use in source and binary forms, with or without +// * modification, are permitted provided that the following conditions are +// * met: +// * +// * 1. Redistributions of source code must retain the above copyright notice, +// * this list of conditions and the following disclaimer. +// * +// * 2. Redistributions in binary form must reproduce the above copyright +// * notice, this list of conditions and the following disclaimer in the +// * documentation and/or other materials provided with the distribution. +// * +// * 3. Neither the name of the copyright holder nor the names of its +// * contributors may be used to endorse or promote products derived from +// * this software without specific prior written permission. +// * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED +// * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +// * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER +// * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +// * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +// * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +// * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +// * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// * +// * Authors: +// * Janik Schlemminger +// * Matthias Jung +// * Éder F. Zulian +// */ -#ifndef REFRESHMANAGERBANKWISE_H -#define REFRESHMANAGERBANKWISE_H +//#ifndef REFRESHMANAGERBANKWISE_H +//#define REFRESHMANAGERBANKWISE_H -//#include "../../../common/dramExtension.h" -#include "IRefreshManager.h" -#include "../configuration/MemSpec.h" +////#include "../../../common/dramExtension.h" +//#include "IRefreshManager.h" +//#include "../configuration/MemSpec.h" -class ControllerCore; +//class ControllerCore; -class RefreshManagerBankwise : public IRefreshManager, public sc_module -{ -public: - RefreshManagerBankwise(sc_module_name /*name*/, ControllerCore &controllerCore); - virtual ~RefreshManagerBankwise(); +//class RefreshManagerBankwise : public IRefreshManager, public sc_module +//{ +//public: +// RefreshManagerBankwise(sc_module_name /*name*/, ControllerCore &controllerCore); +// virtual ~RefreshManagerBankwise(); - virtual bool hasCollision(const ScheduledCommand &command) override; - virtual void scheduleRefresh(tlm::tlm_generic_payload &payload, - sc_time time) override; - void reInitialize(Bank bank, sc_time time) override; - bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) override; +// virtual bool hasCollision(const ScheduledCommand &command) override; +// virtual void scheduleRefresh(tlm::tlm_generic_payload &payload, +// sc_time time) override; +// void reInitialize(Bank bank, sc_time time) override; +// bool isInvalidated(tlm::tlm_generic_payload &payload, sc_time time) override; -private: - ControllerCore &controllerCore; - RefreshTiming &timing; - std::map nextPlannedRefreshs; - sc_time tREFIx; - sc_time tRFCx; - std::map refreshPayloads; - bool postponeEnabled; - bool pullInEnabled; - unsigned int maxpostpone; - unsigned int maxpullin; - std::map pulledin; - std::map postponed; - std::map currentState; - std::map previousState; - std::map nextState; +//private: +// ControllerCore &controllerCore; +// RefreshTiming &timing; +// std::map nextPlannedRefreshs; +// sc_time tREFIx; +// sc_time tRFCx; +// std::map refreshPayloads; +// bool postponeEnabled; +// bool pullInEnabled; +// unsigned int maxpostpone; +// unsigned int maxpullin; +// std::map pulledin; +// std::map postponed; +// std::map currentState; +// std::map previousState; +// std::map nextState; - bool doRefresh(tlm::tlm_generic_payload &payload, sc_time time); - void planNextRefresh(Bank bank, sc_time time, bool align); - void printDebugMessage(std::string message); -}; +// bool doRefresh(tlm::tlm_generic_payload &payload, sc_time time); +// void planNextRefresh(Bank bank, sc_time time, bool align); +// void printDebugMessage(std::string message); +//}; -#endif // REFRESHMANAGERBANKWISE_H +//#endif // REFRESHMANAGERBANKWISE_H