derek/DRAMSys
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first ddr4 changes

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This commit is contained in:
Janik Schlemminger
2014-04-09 13:56:24 +02:00
parent 339dfbbdbb
commit 3bbf81584c
12 changed files with 101 additions and 40 deletions
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2
dram/src/core/ControllerState.cpp
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@@ -68,7 +68,7 @@ void ControllerState::change(const ScheduledCommand& scheduledCommand)
break;
case Command::Activate:
bankStates.openRowInRowBuffer(scheduledCommand.getBank(), scheduledCommand.getRow());
lastActivates.emplace(scheduledCommand.getStart());
lastActivates.emplace(scheduledCommand.getStart(), scheduledCommand.getBank());
break;
case Command::Precharge: