diff --git a/DRAMSys/analyzer/scripts/plots.py b/DRAMSys/analyzer/scripts/plots.py
index cae5f80d..1bf18b7e 100644
--- a/DRAMSys/analyzer/scripts/plots.py
+++ b/DRAMSys/analyzer/scripts/plots.py
@@ -117,10 +117,12 @@ def power_window(connection, tracePath):
         cursor.execute(""" SELECT * FROM Power """)
         time = [0] * (steps+1)
         power = [0] * (steps+1)
-        for i in range((steps+1)):
+        time[0] = 0
+        power[0] = 0
+        for i in range((steps)):
             result = cursor.fetchone()
-            time[i] = float(result[0])*1000000000
-            power[i] = float(result[1])/1000000000
+            time[i+1] = float(result[0])*1000000000
+            power[i+1] = float(result[1])/1000000000
 
         name = ntpath.basename(tracePath)
         basename, extension = os.path.splitext(name)
diff --git a/DRAMSys/simulator/src/controller/core/ControllerCore.cpp b/DRAMSys/simulator/src/controller/core/ControllerCore.cpp
index f18c1630..92c74966 100644
--- a/DRAMSys/simulator/src/controller/core/ControllerCore.cpp
+++ b/DRAMSys/simulator/src/controller/core/ControllerCore.cpp
@@ -139,11 +139,13 @@ void ControllerCore::triggerRefresh(tlm::tlm_generic_payload& payload)
 void ControllerCore::scheduleRequest(Command command, tlm::tlm_generic_payload &payload)
 {
     sc_time start = clkAlign(sc_time_stamp());
-    state->cleanUp(start);
-
     ScheduledCommand scheduledCommand = schedule(command, start, payload);
-    state->change(scheduledCommand);
-    controller.send(scheduledCommand, payload);
+    if(!(command == Command::Precharge && refreshManager->hasCollision(scheduledCommand)))
+    {
+        state->cleanUp(start);
+        state->change(scheduledCommand);
+        controller.send(scheduledCommand, payload);
+    }
 }
 
 ScheduledCommand ControllerCore::schedule(Command command, sc_time start,
diff --git a/DRAMSys/simulator/src/controller/core/refresh/RefreshManager.cpp b/DRAMSys/simulator/src/controller/core/refresh/RefreshManager.cpp
index c3acac16..d2049f2f 100644
--- a/DRAMSys/simulator/src/controller/core/refresh/RefreshManager.cpp
+++ b/DRAMSys/simulator/src/controller/core/refresh/RefreshManager.cpp
@@ -58,7 +58,7 @@ RefreshManager::~RefreshManager()
 
 bool RefreshManager::hasCollision(const ScheduledCommand& command)
 {
-    return command.getStart() < controllerCore.state->getLastCommand(Command::AutoRefresh).getEnd() || command.getEnd() > nextPlannedRefresh;
+    return command.getStart() < controllerCore.state->getLastCommand(Command::AutoRefresh).getEnd() || command.getEnd() >= nextPlannedRefresh;
 }
 
 void RefreshManager::scheduleRefresh(tlm::tlm_generic_payload& payload __attribute__((unused)), sc_time time)
diff --git a/DRAMSys/simulator/src/controller/core/scheduling/checker/RefreshChecker.cpp b/DRAMSys/simulator/src/controller/core/scheduling/checker/RefreshChecker.cpp
index ffc8ebfa..3978253e 100644
--- a/DRAMSys/simulator/src/controller/core/scheduling/checker/RefreshChecker.cpp
+++ b/DRAMSys/simulator/src/controller/core/scheduling/checker/RefreshChecker.cpp
@@ -37,45 +37,87 @@
 #include "RefreshChecker.h"
 #include "../../TimingCalculation.h"
 
-
-
 void RefreshChecker::delayToSatisfyConstraints(ScheduledCommand& command) const
 {
     sc_assert(command.getCommand() == Command::AutoRefresh);
 
-    ScheduledCommand lastCommandOnBank = state.getLastScheduledCommand(command.getBank());
-
-    if (lastCommandOnBank.isValidCommand())
+    if(config.BankwiseLogic)
     {
-        if (lastCommandOnBank.getCommand() == Command::Precharge || lastCommandOnBank.getCommand() == Command::PrechargeAll)
+        ScheduledCommand lastCommandOnBank = state.getLastScheduledCommand(command.getBank());
+
+        if (lastCommandOnBank.isValidCommand())
         {
-            command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tRP);
+            if (lastCommandOnBank.getCommand() == Command::Precharge || lastCommandOnBank.getCommand() == Command::PrechargeAll)
+            {
+                command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tRP);
+            }
+            else if (lastCommandOnBank.getCommand() == Command::ReadA)
+            {
+                command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tRTP + config.memSpec.tRP);
+            }
+            else if (lastCommandOnBank.getCommand() == Command::WriteA)
+            {
+                command.establishMinDistanceFromStart(lastCommandOnBank.getStart(),
+                        config.memSpec.tWL + getWriteAccessTime() + config.memSpec.tWR + config.memSpec.tRP);
+            }
+            else if (lastCommandOnBank.getCommand() == Command::PDNPX || lastCommandOnBank.getCommand() == Command::PDNAX)
+            {
+                command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tXP);
+            }
+            else if (lastCommandOnBank.getCommand() == Command::SREFX)
+                    {
+                        command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tXSR);
+                    }
+            else if (lastCommandOnBank.getCommand() == Command::AutoRefresh)
+            {
+            }
+            else
+                reportFatal("Refresh Checker", "Refresh can not follow " + commandToString(lastCommandOnBank.getCommand()));
         }
-        else if (lastCommandOnBank.getCommand() == Command::ReadA)
+    }
+    else
+    {
+        for (unsigned int bank = 0; bank < config.memSpec.NumberOfBanks; ++bank)
         {
-            command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tRTP + config.memSpec.tRP);
-        }
-        else if (lastCommandOnBank.getCommand() == Command::WriteA)
-        {
-            command.establishMinDistanceFromStart(lastCommandOnBank.getStart(),
-                    config.memSpec.tWL + getWriteAccessTime() + config.memSpec.tWR + config.memSpec.tRP);
-        }
-        else if (lastCommandOnBank.getCommand() == Command::PDNPX || lastCommandOnBank.getCommand() == Command::PDNAX)
-        {
-            command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tXP);
-        }
-        else if (lastCommandOnBank.getCommand() == Command::SREFX)
+            ScheduledCommand lastCommand = state.getLastScheduledCommand(Bank(bank));
+            if (lastCommand.isValidCommand())
+            {
+                if(lastCommand.getCommand() == Command::Precharge || lastCommand.getCommand() == Command::PrechargeAll)
                 {
-                    command.establishMinDistanceFromStart(lastCommandOnBank.getStart(), config.memSpec.tXSR);
+                    command.establishMinDistanceFromStart(lastCommand.getStart(), config.memSpec.tRP);
                 }
-        else if (lastCommandOnBank.getCommand() == Command::AutoRefresh)
-        {
+                else if(lastCommand.getCommand() == Command::Activate)
+                {
+                    command.establishMinDistanceFromStart(lastCommand.getStart(), config.memSpec.tRCD);
+                }
+                else if (lastCommand.getCommand() == Command::ReadA)
+                {
+                    command.establishMinDistanceFromStart(lastCommand.getStart(), config.memSpec.tRTP + config.memSpec.tRP);
+                }               
+                else if(lastCommand.getCommand() == Command::WriteA)
+                {
+                    command.establishMinDistanceFromStart(lastCommand.getStart(), config.memSpec.tWL + getWriteAccessTime() + config.memSpec.tWR + config.memSpec.tRP);
+                }
+                else if (lastCommand.getCommand() == Command::PDNAX || lastCommand.getCommand() == Command::PDNPX)
+                {
+                    command.establishMinDistanceFromStart(lastCommand.getStart(), config.memSpec.tXP);
+                }
+                else if (lastCommand.getCommand() == Command::SREFX)
+                {
+                    command.establishMinDistanceFromStart(lastCommand.getEnd(), config.memSpec.tXSR);
+                }                
+                else if (lastCommand.getCommand() == Command::AutoRefresh)
+                {
+                }
+                else
+                    reportFatal("Refresh Checker", "Refresh can not follow " + commandToString(lastCommand.getCommand()));
+            }
         }
-        else
-            reportFatal("Refresh Checker", "Refresh can not follow " + commandToString(lastCommandOnBank.getCommand()));
     }
 
     state.bus.moveCommandToNextFreeSlot(command);
+
+
 }
 
 
diff --git a/DRAMSys/simulator/src/simulation/Dram.h b/DRAMSys/simulator/src/simulation/Dram.h
index 4d1ac62d..ec930a65 100644
--- a/DRAMSys/simulator/src/simulation/Dram.h
+++ b/DRAMSys/simulator/src/simulation/Dram.h
@@ -222,6 +222,8 @@ struct Dram : sc_module
         unsigned long long c = 0;
 
         do {
+            wait(powerWindowSize);
+
             c = sc_time_stamp().value() / Configuration::getInstance().memSpec.clk.value();
 
             DRAMPower->doCommand(MemCommand::NOP, 0, c);
@@ -243,7 +245,6 @@ struct Dram : sc_module
             printDebugMessage(string("\tCurrent Energy: \t") + to_string(currentTotalEnergy) + string("\t[pJ]"));
             printDebugMessage(string("\tAverage Power: \t") + to_string(currentAveragePower) + string("\t[pW]"));
 
-            wait(powerWindowSize);
         } while(true);
     }