diff --git a/README.md b/README.md index ce11e901..c33e9e61 100644 --- a/README.md +++ b/README.md @@ -132,14 +132,14 @@ Below are listed the configuration sections and configuration fields. - **Simulator configuration** - *Debug* (boolean) - - "1": Enables debug output on console - - "0": Disables debug output + - "1": enables debug output on console + - "0": disables debug output - *DatabaseRecording* (boolean) - - "1": Enables trace file recording for the trace analyser tool - - "0": Disables trace file recording + - "1": enables trace file recording for the trace analyser tool + - "0": disables trace file recording - *PowerAnalysis* (boolean) - - "1": Enables live power analysis with the DRAMPower tool - - "0": Disables power analysis + - "1": enables live power analysis with the DRAMPower tool + - "0": disables power analysis - **Memory specification** @@ -150,6 +150,9 @@ Below are listed the configuration sections and configuration fields. XML files describe the address mapping to be used in the simulation. + The file [am_wideio.xml](dram/resources/configs/amconfigs/am_wideio.xml) is + a good example. + ``` @@ -161,7 +164,8 @@ Below are listed the configuration sections and configuration fields. ``` ![Address Mapping Sample 1](docs/images/am_sample1.png) - ![Address Mapping Sample 1 SVG](docs/images/am_sample1.svg) + + ![Address Mapping Sample 1 svg file](docs/images/am_sample1.svg) ``` @@ -174,23 +178,73 @@ Below are listed the configuration sections and configuration fields. ``` ![Address Mapping Sample 2](docs/images/am_sample2.png) - ![Address Mapping Sample 2 SVG](docs/images/am_sample2.svg) + + ![Address Mapping Sample 2 svg file](docs/images/am_sample2.svg) - **Memory Configuration** + The content of [fifo.xml](dram/resources/configs/memconfigs/fifo.xml) is + presented below as an example. + ``` + + + + + + + + + + + + + + ``` - + - *BankwiseLogic* (boolean) + - "1": perform bankwise operations such as refresh and powerdown + - "0": do not perform bankwise operations + - *OpenPagePolicy* (boolean) + - "1": use open page precharge policy + - "0": do not use open page precharge policy + - *MaxNrOfTransactions* (unsigned int) + - Maximum number of transactions. + - *Scheduler* (string) + - Scheduler algorithm to be applied on memory transactions. Different + schedulers can order transactions based on different factors such as + latency, power savings, etc. + - *Capsize* (unsigned int) + - Capacitor cell size. + - *PowerDownMode* (enum EPowerDownMode) + - "NoPowerDown": no power down mode (active idle) + - "Staggered": staggered power down policy + - "TimeoutPDN": precharge idle + - "TimeoutSREF": self refresh + - *Buswidth* (unsigned int) + - Bus width in bits. + - *ReadWriteGrouping* (boolean) + - "1": + - "0": + - *ReorderBuffer* (boolean) + - "1": + - "0": + - *ErrorChipSeed* (unsigned int) + - Seed to initialize the random error generator. + - *ErrorCSVFile* (string) + - CSV file with error injection information. + - *ErrorStoreMode* (enum ErrorStorageMode) + - "NoStorage": no storage + - "Store": store data without error model + - "ErrorModel": store data with error model - **Trace setups** - - voco2.stl + - *id* + - *clkMhz* Some attributes are self-explanatory while others require some previous knowhow of memory technologies or some knowledge of the simulator source code. -## DRAMSys Resources - Some resources of the simulator are available in the **resources** directory its sub-directories.