Fix various bugs

- Fix data race for some tests by disabling database recording
- Fix undefined behaviour in configuration test
- Port clkMhz to tCK for simulation script
- Port memUtil Python script to tCK with backwards compatibility

extensions/apps/traceAnalyzer/scripts/memUtil.py

@@ -108,7 +108,14 @@ def maximum_data_rate(connection):
         width = memspec.getIntValue("memarchitecturespec", "nbrOfDevices") * memspec.getIntValue("memarchitecturespec", "width")
     except:
         width = memspec.getIntValue("memarchitecturespec", "width")
-    clk = memspec.getIntValue("memtimingspec", "clkMhz")
+
+    # Backwards compatibility for traces where clkMHz was not yet replaced with tCK
+    clk = None
+    try:
+        clk = 1000000 / memspec.getIntValue("memtimingspec", "tCK")
+    except:
+        clk = memspec.getIntValue("memtimingspec", "clkMhz")
+
     rate = memspec.getIntValue("memarchitecturespec", "dataRate")
     if getPseudoChannelMode(connection):
         maxDataRate = float(clk) * float(width) * float(rate) * 2

scripts/simulation/example_ddr3_simulations.json

@@ -111,7 +111,7 @@
                 "XPDLL": 20,
                 "XS": 96,
                 "XSDLL": 512,
-                "clkMhz": 800
+                "tCK": 1250
             }
         },
         "simconfig": {

tests/tests_configuration/test_configuration.cpp

@@ -75,6 +75,7 @@ protected:
         addressMapBitVector({13, 14, 15}),
         addressMapBitVector({17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32}),
         addressMapBitVector({33}),
+        std::nullopt,
         std::nullopt};
 
     DRAMSys::Config::McConfig mcConfig{PagePolicyType::Open,

tests/tests_dramsys/b_transport/configs/no_storage.json

@@ -135,7 +135,7 @@
         "simconfig": {
             "AddressOffset": 0,
             "CheckTLM2Protocol": false,
-            "DatabaseRecording": true,
+            "DatabaseRecording": false,
             "Debug": false,
             "EnableWindowing": false,
             "PowerAnalysis": false,

tests/tests_dramsys/b_transport/configs/storage.json

@@ -133,7 +133,7 @@
         "simconfig": {
             "AddressOffset": 0,
             "CheckTLM2Protocol": false,
-            "DatabaseRecording": true,
+            "DatabaseRecording": false,
             "Debug": false,
             "EnableWindowing": false,
             "PowerAnalysis": false,