Fix various bugs

- Fix data race for some tests by disabling database recording
- Fix undefined behaviour in configuration test
- Port clkMhz to tCK for simulation script
- Port memUtil Python script to tCK with backwards compatibility

extensions/apps/traceAnalyzer/scripts/memUtil.py

@@ -108,7 +108,14 @@ def maximum_data_rate(connection):
         width = memspec.getIntValue("memarchitecturespec", "nbrOfDevices") * memspec.getIntValue("memarchitecturespec", "width")
     except:
         width = memspec.getIntValue("memarchitecturespec", "width")
-    clk = memspec.getIntValue("memtimingspec", "clkMhz")
+
+    # Backwards compatibility for traces where clkMHz was not yet replaced with tCK
+    clk = None
+    try:
+        clk = 1000000 / memspec.getIntValue("memtimingspec", "tCK")
+    except:
+        clk = memspec.getIntValue("memtimingspec", "clkMhz")
+
     rate = memspec.getIntValue("memarchitecturespec", "dataRate")
     if getPseudoChannelMode(connection):
         maxDataRate = float(clk) * float(width) * float(rate) * 2