From 0d22844ef8506c87c2107dde0c3a425154a4b5e4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=89der=20F=2E=20Zulian?= <zulian@eit.uni-kl.de>
Date: Mon, 9 Jul 2018 17:16:04 +0200
Subject: [PATCH] coding style

---
 DRAMSys/library/src/controller/Controller.cpp    |  6 ++++--
 .../library/src/controller/core/refresh/RGR.cpp  | 16 +++++++++-------
 .../core/refresh/RefreshManagerBankwise.cpp      |  3 ++-
 3 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp
index c3b23b41..b322b1cc 100644
--- a/DRAMSys/library/src/controller/Controller.cpp
+++ b/DRAMSys/library/src/controller/Controller.cpp
@@ -217,7 +217,8 @@ void Controller::controllerCorePEQCallback(tlm_generic_payload &payload,
         else if (containsPhase(phase, { BEGIN_RD, BEGIN_WR, BEGIN_ACTB, BEGIN_ACT, BEGIN_PREB, BEGIN_PRE, BEGIN_PRE_ALL, BEGIN_RDA, BEGIN_WRA })) {
             printDebugMessage("Controller has sent to DRAM this: " + phaseNameToString(
                                   phase) + " bank "  + to_string(bank.ID()));
-        } else
+        }
+        else
             SC_REPORT_FATAL(0,
                             "Controller Core PEQ in controller wrapper was triggered with unsupported phase");
     }
@@ -440,7 +441,8 @@ void Controller::dramPEQCallback(tlm_generic_payload &payload,
         scheduleNextFromScheduler(bank);
     } else if (containsPhase(phase, {END_PREB, END_PRE, END_ACTB, END_ACT})) {
         scheduleNextFromScheduler(bank);
-    } else if (phase == END_PRE_ALL) {
+    }
+    else if (phase == END_PRE_ALL) {
         // No need to trigger anything for a END_PRE_ALL. It is followed by a AUTO_REFRESH anyway (in our current
         // scheduler implementation)
     } else {
diff --git a/DRAMSys/library/src/controller/core/refresh/RGR.cpp b/DRAMSys/library/src/controller/core/refresh/RGR.cpp
index de92f6ce..42bd6dfe 100644
--- a/DRAMSys/library/src/controller/core/refresh/RGR.cpp
+++ b/DRAMSys/library/src/controller/core/refresh/RGR.cpp
@@ -146,7 +146,7 @@ sc_time RGR::doRefresh(tlm::tlm_generic_payload &p, sc_time t)
         }
     }
 
-	return trfcx;
+    return trfcx;
 }
 
 void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t)
@@ -168,8 +168,8 @@ void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t)
             nrt = SC_ZERO_TIME;
             nextState[b] = ST_POSTPONE;
         } else if (pullIn) {
-	        trfcx = doRefresh(p, t);
-			nrt = trfcx;
+            trfcx = doRefresh(p, t);
+            nrt = trfcx;
             nextState[b] = ST_PULLIN;
         } else {
             doRefresh(p, t);
@@ -179,9 +179,9 @@ void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t)
         break;
     case ST_PULLIN:
         if (pullIn) {
-	        trfcx = doRefresh(p, t);
+            trfcx = doRefresh(p, t);
             pulledin[b]++;
-			nrt = trfcx;
+            nrt = trfcx;
             nextState[b] = ST_PULLIN;
         } else {
             nrt = SC_ZERO_TIME;
@@ -230,7 +230,8 @@ void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t)
         }
         break;
     default:
-        SC_REPORT_FATAL(this->name(), "Invalid state in RGR flexible refresh FSM. Stop.");
+        SC_REPORT_FATAL(this->name(),
+                        "Invalid state in RGR flexible refresh FSM. Stop.");
         break;
     }
     planNextRefresh(bwl ? b : ccore.getBanks()[0], nrt, align);
@@ -239,7 +240,8 @@ void RGR::scheduleRefresh(tlm::tlm_generic_payload &p, sc_time t)
 void RGR::planNextRefresh(Bank b, sc_time t, bool align)
 {
     if (align) {
-        nextPlannedRefreshs[b] = trunc(nextPlannedRefreshs[b].to_double() / tREFIx.to_double()) * tREFIx;
+        nextPlannedRefreshs[b] = trunc(nextPlannedRefreshs[b].to_double() /
+                                       tREFIx.to_double()) * tREFIx;
     }
     nextPlannedRefreshs[b] += t;
     ccore.controller.send(REFTrigger, nextPlannedRefreshs[b], rps[b]);
diff --git a/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp
index f917d2b8..b9da4023 100644
--- a/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp
+++ b/DRAMSys/library/src/controller/core/refresh/RefreshManagerBankwise.cpp
@@ -217,7 +217,8 @@ void RefreshManagerBankwise::scheduleRefresh(tlm::tlm_generic_payload &payload,
         }
         break;
     default:
-        SC_REPORT_FATAL(this->name(), "Invalid state in bankwise flexible refresh FSM. Stop.");
+        SC_REPORT_FATAL(this->name(),
+                        "Invalid state in bankwise flexible refresh FSM. Stop.");
         break;
     }