diff --git a/DRAMSys/gem5/main.cpp b/DRAMSys/gem5/main.cpp
index d166627f..d75ef171 100644
--- a/DRAMSys/gem5/main.cpp
+++ b/DRAMSys/gem5/main.cpp
@@ -55,7 +55,7 @@ class Gem5SimControlDRAMsys: public Gem5SystemC::Gem5SimControl
 {
 public:
     Gem5SimControlDRAMsys(string configFile) :
-        Gem5SystemC::Gem5SimControl("gem5",configFile,0,"")
+        Gem5SystemC::Gem5SimControl("gem5",configFile,0,"MemoryAccess")
     {
     }
 
@@ -65,6 +65,60 @@ public:
     }
 };
 
+
+struct AddressOffset: sc_module
+{
+    private:
+    unsigned long long int offset;
+
+    public:
+    tlm_utils::simple_target_socket<AddressOffset> t_socket;
+    tlm_utils::simple_initiator_socket<AddressOffset> i_socket;
+
+    AddressOffset(sc_module_name, unsigned long long int o) : offset(o),t_socket("t_socket"),i_socket("i_socket")
+    {
+        t_socket.register_nb_transport_fw(this,&AddressOffset::nb_transport_fw);
+        t_socket.register_transport_dbg(this,&AddressOffset::transport_dbg);
+        t_socket.register_b_transport(this,&AddressOffset::b_transport);
+        i_socket.register_nb_transport_bw(this,&AddressOffset::nb_transport_bw);
+    }
+
+    //Forward Interface
+    tlm::tlm_sync_enum nb_transport_fw(tlm_generic_payload &trans, tlm_phase &phase, sc_time &delay)
+    {
+        //std::cout << "NB "<< this->name() <<": " << trans.get_address() << " -" << offset;
+        trans.set_address(trans.get_address()-offset);
+        //std::cout << " = " << trans.get_address() << std::endl;
+        return i_socket->nb_transport_fw(trans,phase,delay);
+    }
+
+    unsigned int transport_dbg(tlm::tlm_generic_payload &trans)
+    {
+        // adjust address offset:
+        //std::cout << "Debug "<< this->name() <<": " << trans.get_address() << " -" << offset;
+        trans.set_address(trans.get_address()-offset);
+        //std::cout << " = " << trans.get_address() << std::endl;
+        return i_socket->transport_dbg(trans);
+    }
+
+    void b_transport(tlm::tlm_generic_payload &trans, sc_time &delay)
+    {
+        // adjust address offset:
+        //std::cout << "B "<< this->name() <<": " << trans.get_address() << " -" << offset;
+        trans.set_address(trans.get_address()-offset);
+        //std::cout << " = " << trans.get_address() << std::endl;
+        i_socket->b_transport(trans, delay);
+    }
+
+    //Backward Interface
+    tlm::tlm_sync_enum nb_transport_bw(tlm_generic_payload &trans, tlm_phase &phase, sc_time &delay)
+    {
+        //trans.set_address(trans.get_address()+offset);
+        return t_socket->nb_transport_bw(trans,phase,delay);
+    }
+
+};
+
 string pathOfFile(string file)
 {
     return file.substr(0, file.find_last_of('/'));
@@ -97,21 +151,44 @@ int sc_main(int argc, char **argv)
 
     // Instantiate gem5:
     Gem5SimControlDRAMsys sim_control(gem5ConfigFile);
-#if 1 //If only one gem5 port is used
-    Gem5SystemC::Gem5SlaveTransactor transactor("transactor", "transactor");
+#define CHOICE1
+//#define CHOICE2
+//#define CHOICE3
 
+#ifdef CHOICE1 //If only one gem5 port is used
+    Gem5SystemC::Gem5SlaveTransactor transactor("transactor", "transactor");
     transactor.socket.bind(dramSys.tSocket);
     transactor.sim_control.bind(sim_control);
-#else // If for example two gem5 ports are used:
+#endif
+
+#ifdef CHOICE2
+    // If there are two ports
     Gem5SystemC::Gem5SlaveTransactor transactor1("transactor1", "transactor1");
     Gem5SystemC::Gem5SlaveTransactor transactor2("transactor2", "transactor2");
-
     transactor1.socket.bind(dramSys.tSocket);
     transactor2.socket.bind(dramSys.tSocket);
     transactor1.sim_control.bind(sim_control);
     transactor2.sim_control.bind(sim_control);
 #endif
 
+#ifdef CHOICE3
+    // If for example two gem5 ports are used (NVM and DRAM) with
+    // crazy address offsets:
+    Gem5SystemC::Gem5SlaveTransactor dramInterface("transactor1", "transactor1");
+    Gem5SystemC::Gem5SlaveTransactor nvmInterface("transactor2", "transactor2");
+
+    AddressOffset nvmOffset("nvmOffset",0);
+    AddressOffset dramOffset("dramOffset", (2147483648-67108863));//+67108863);
+
+    dramInterface.socket.bind(dramOffset.t_socket);
+    dramOffset.i_socket.bind(dramSys.tSocket); // ID0
+    nvmInterface.socket.bind(nvmOffset.t_socket);
+    nvmOffset.i_socket.bind(dramSys.tSocket);
+
+    dramInterface.sim_control.bind(sim_control);
+    nvmInterface.sim_control.bind(sim_control);
+#endif
+
     SC_REPORT_INFO("sc_main", "Start of Simulation");
 
     sc_core::sc_set_stop_mode(SC_STOP_FINISH_DELTA);