From 4ce4611b9c26583a4e4280cac8d5cbc6944bce32 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Wed, 29 Jul 2020 09:05:32 +0200 Subject: [PATCH 01/11] Multi-cycle commands scheduled at last cycle on bus, LPDDR4 adapted. --- .../configuration/memspec/MemSpecLPDDR4.cpp | 26 +++---- DRAMSys/library/src/controller/Controller.cpp | 2 +- .../src/controller/checker/CheckerLPDDR4.cpp | 68 +++++++++---------- .../refresh/RefreshManagerBankwise.cpp | 26 ++----- .../refresh/RefreshManagerBankwise.h | 3 +- .../controller/refresh/RefreshManagerDummy.h | 2 +- .../src/controller/refresh/RefreshManagerIF.h | 2 +- .../refresh/RefreshManagerRankwise.cpp | 2 +- .../refresh/RefreshManagerRankwise.h | 2 +- .../businessObjects/phases/phasefactory.cpp | 30 ++++---- 10 files changed, 75 insertions(+), 88 deletions(-) diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp index 915c14c4..c4d2050e 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp @@ -107,23 +107,23 @@ sc_time MemSpecLPDDR4::getRefreshIntervalPB() const sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_payload &) const { if (command == Command::PRE) - return tRPpb + tCK; + return tRPpb; else if (command == Command::PREA) - return tRPab + tCK; + return tRPab; else if (command == Command::ACT) - return tRCD + 3 * tCK; + return tRCD; else if (command == Command::RD) - return tRL + tDQSCK + burstDuration + 3 * tCK; + return tRL + tDQSCK + burstDuration; else if (command == Command::RDA) - return burstDuration + tRTP - 5 * tCK + tRPpb; + return burstDuration + tRTP - 8 * tCK + tRPpb; else if (command == Command::WR) - return tWL + tDQSS + tDQS2DQ + burstDuration + 3 * tCK; + return tWL + tDQSS + tDQS2DQ + burstDuration; else if (command == Command::WRA) - return tWL + 4 * tCK + burstDuration + tWR + tRPpb; + return tWL + tCK + burstDuration + tWR + tRPpb; else if (command == Command::REFA) - return tRFCab + tCK; + return tRFCab; else if (command == Command::REFB) - return tRFCpb + tCK; + return tRFCpb; else { SC_REPORT_FATAL("getExecutionTime", @@ -135,11 +135,11 @@ sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_paylo TimeInterval MemSpecLPDDR4::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) - return TimeInterval(sc_time_stamp() + tRL + tDQSCK + 3 * tCK, - sc_time_stamp() + tRL + tDQSCK + burstDuration + 3 * tCK); + return TimeInterval(sc_time_stamp() + tRL + tDQSCK, + sc_time_stamp() + tRL + tDQSCK + burstDuration); else if (command == Command::WR || command == Command::WRA) - return TimeInterval(sc_time_stamp() + tWL + tDQSS + tDQS2DQ + 3 * tCK, - sc_time_stamp() + tWL + tDQSS + tDQS2DQ + burstDuration + 3 * tCK); + return TimeInterval(sc_time_stamp() + tWL + tDQSS + tDQS2DQ, + sc_time_stamp() + tWL + tDQSS + tDQS2DQ + burstDuration); else { SC_REPORT_FATAL("MemSpecLPDDR4", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index 792a383c..20caeda1 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -284,7 +284,7 @@ void Controller::controllerMethod() else bankMachines[bank.ID()]->updateState(commandPair.first); - refreshManagers[rank.ID()]->updateState(commandPair.first, commandPair.second); + refreshManagers[rank.ID()]->updateState(commandPair.first); powerDownManagers[rank.ID()]->updateState(commandPair.first); checker->insert(commandPair.first, rank, bankgroup, bank); diff --git a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp index 3dc894f9..b13295c7 100644 --- a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp @@ -54,16 +54,16 @@ CheckerLPDDR4::CheckerLPDDR4() tRDWR_R = memSpec->tRL + tBURST + memSpec->tRTRS - memSpec->tWL; tWRRD = memSpec->tWL + memSpec->tCK + tBURST + memSpec->tWTR; tWRRD_R = memSpec->tWL + tBURST + memSpec->tRTRS - memSpec->tRL; - tRDPRE = memSpec->tRTP + tBURST - 6 * memSpec->tCK; + tRDPRE = memSpec->tRTP + tBURST - 8 * memSpec->tCK; tRDAACT = memSpec->tRTP + tBURST - 8 * memSpec->tCK + memSpec->tRPpb; - tWRPRE = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR + 2 * memSpec->tCK; + tWRPRE = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR; tWRAACT = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR + memSpec->tRPpb; - tACTPDEN = 3 * memSpec->tCK + memSpec->tCMDCKE; - tPRPDEN = memSpec->tCK + memSpec->tCMDCKE; - tRDPDEN = 3 * memSpec->tCK + memSpec->tRL + memSpec->tDQSCK + tBURST + memSpec->tRPST; - tWRPDEN = 3 * memSpec->tCK + memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR; - tWRAPDEN = 3 * memSpec->tCK + memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR + 2 * memSpec->tCK; - tREFPDEN = memSpec->tCK + memSpec->tCMDCKE; + tACTPDEN = memSpec->tCMDCKE; + tPRPDEN = memSpec->tCMDCKE; + tRDPDEN = memSpec->tRL + memSpec->tDQSCK + tBURST + memSpec->tRPST; + tWRPDEN = memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR; + tWRAPDEN = memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR + 2 * memSpec->tCK; + tREFPDEN = memSpec->tCMDCKE; } sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) const @@ -118,7 +118,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); } else if (command == Command::WR || command == Command::WRA) { @@ -160,7 +160,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); } else if (command == Command::ACT) { @@ -182,44 +182,44 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPpb - 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPpb); lastCommandStart = lastScheduledByCommandAndRank[Command::PREA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPab - 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPab); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCab - 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCab); lastCommandStart = lastScheduledByCommandAndBank[Command::REFB][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb - 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb); lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD - 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD); lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR - 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR); if (last4Activates[rank.ID()].size() >= 4) - earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW - 3 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); } else if (command == Command::PRE) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -235,13 +235,13 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); } else if (command == Command::PREA) { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -265,7 +265,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -275,7 +275,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -295,7 +295,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -313,11 +313,11 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb); lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD + 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD); lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -337,11 +337,11 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -356,7 +356,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR); if (last4Activates[rank.ID()].size() >= 4) - earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); } else if (command == Command::PDEA) { @@ -446,7 +446,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -466,7 +466,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -490,7 +490,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank SC_REPORT_FATAL("CheckerLPDDR4", "Unknown command!"); // Check if command bus is free - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->getCommandLength(command)); return earliestTimeToStart; } @@ -504,7 +504,7 @@ void CheckerLPDDR4::insert(Command command, Rank rank, BankGroup, Bank bank) lastScheduledByCommandAndRank[command][rank.ID()] = sc_time_stamp(); lastScheduledByCommand[command] = sc_time_stamp(); - lastCommandOnBus = sc_time_stamp() + memSpec->getCommandLength(command) - memSpec->tCK; + lastCommandOnBus = sc_time_stamp(); if (command == Command::ACT || command == Command::REFB) { diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index 7a23ca07..eb93dc57 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -91,17 +91,14 @@ sc_time RefreshManagerBankwise::start() bool forcedRefresh = (flexibilityCounter == maxPostponed); bool allBanksBusy = true; - if (!skipSelection) + for (auto it = remainingBankMachines.begin(); it != remainingBankMachines.end(); it++) { - for (auto it = remainingBankMachines.begin(); it != remainingBankMachines.end(); it++) + if ((*it)->isIdle()) { - if ((*it)->isIdle()) - { - currentIterator = it; - currentBankMachine = *it; - allBanksBusy = false; - break; - } + currentIterator = it; + currentBankMachine = *it; + allBanksBusy = false; + break; } } @@ -116,16 +113,8 @@ sc_time RefreshManagerBankwise::start() if (currentBankMachine->getState() == BmState::Activated) nextCommand = Command::PRE; else - { nextCommand = Command::REFB; - if (forcedRefresh) - { - currentBankMachine->block(); - skipSelection = true; - } - } - timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, currentBankMachine->getBankGroup(), currentBankMachine->getBank()); return timeToSchedule; @@ -168,12 +157,11 @@ sc_time RefreshManagerBankwise::start() return timeForNextTrigger; } -void RefreshManagerBankwise::updateState(Command command, tlm_generic_payload *payload) +void RefreshManagerBankwise::updateState(Command command) { switch (command) { case Command::REFB: - skipSelection = false; remainingBankMachines.erase(currentIterator); if (remainingBankMachines.empty()) remainingBankMachines = allBankMachines; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h index 94b2bd08..7a76ceb5 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h @@ -50,7 +50,7 @@ public: virtual std::pair getNextCommand() override; virtual sc_time start() override; - virtual void updateState(Command, tlm::tlm_generic_payload *) override; + virtual void updateState(Command) override; private: enum class RmState {Regular, Pulledin} state = RmState::Regular; @@ -74,7 +74,6 @@ private: int maxPulledin = 0; bool sleeping = false; - bool skipSelection = false; }; #endif // REFRESHMANAGERBANKWISE_H diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h index f543310b..51c19d2d 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h @@ -46,7 +46,7 @@ class RefreshManagerDummy final : public RefreshManagerIF public: virtual std::pair getNextCommand() override; virtual sc_time start() override; - virtual void updateState(Command, tlm::tlm_generic_payload *) override {} + virtual void updateState(Command) override {} }; #endif // REFRESHMANAGERDUMMY_H diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h b/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h index aa7bf44b..1c2db4fd 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h @@ -47,7 +47,7 @@ public: virtual std::pair getNextCommand() = 0; virtual sc_time start() = 0; - virtual void updateState(Command, tlm::tlm_generic_payload *) = 0; + virtual void updateState(Command) = 0; }; #endif // REFRESHMANAGERIF_H diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp index 98004383..9e9a5830 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp @@ -140,7 +140,7 @@ sc_time RefreshManagerRankwise::start() return timeForNextTrigger; } -void RefreshManagerRankwise::updateState(Command command, tlm_generic_payload *) +void RefreshManagerRankwise::updateState(Command command) { switch (command) { diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h index 31a484ea..a7d84f2d 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h @@ -48,7 +48,7 @@ public: virtual std::pair getNextCommand() override; virtual sc_time start() override; - virtual void updateState(Command, tlm::tlm_generic_payload *) override; + virtual void updateState(Command) override; private: enum class RmState {Regular, Pulledin} state = RmState::Regular; diff --git a/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp b/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp index 9156a5d8..f11e2072 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp @@ -60,49 +60,49 @@ shared_ptr PhaseFactory::CreatePhase(ID id, const QString &dbPhaseName, {Timespan(span.Begin(), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "PRE") return shared_ptr(new PRE(id, span, trans, - {Timespan(span.Begin(), span.Begin() + clk * cl.PRE)}, std::shared_ptr())); + {Timespan(span.Begin() - clk * (cl.PRE - 1), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "ACTB") return shared_ptr(new ACTB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "ACT") return shared_ptr(new ACT(id, span, trans, - {Timespan(span.Begin(), span.Begin() + clk * cl.ACT)}, std::shared_ptr())); + {Timespan(span.Begin() - clk * (cl.ACT - 1), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "PREA") return shared_ptr(new PRECHARGE_ALL(id, span, trans, - {Timespan(span.Begin(), span.Begin() + clk * cl.PREA)}, std::shared_ptr())); + {Timespan(span.Begin() - clk * (cl.PREA - 1), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "REFA") return shared_ptr(new REFA(id, span, trans, - {Timespan(span.Begin(), span.Begin() + clk * cl.REFA)}, std::shared_ptr())); + {Timespan(span.Begin() - clk * (cl.REFA - 1), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "REFB") return shared_ptr(new REFB(id, span, trans, - {Timespan(span.Begin(), span.Begin() + clk * cl.REFB)}, std::shared_ptr())); + {Timespan(span.Begin() - clk * (cl.REFB - 1), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "RD") - return shared_ptr(new RD(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.RD)}, + return shared_ptr(new RD(id, span, trans, {Timespan(span.Begin() - clk * (cl.RD - 1), span.Begin() + clk)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "RDA") - return shared_ptr(new RDA(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.RDA)}, + return shared_ptr(new RDA(id, span, trans, {Timespan(span.Begin() - clk * (cl.RDA - 1), span.Begin() + clk)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "WR") - return shared_ptr(new WR(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.WR)}, + return shared_ptr(new WR(id, span, trans, {Timespan(span.Begin() - clk * (cl.WR - 1), span.Begin() + clk)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "WRA") - return shared_ptr(new WRA(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.WRA)}, + return shared_ptr(new WRA(id, span, trans, {Timespan(span.Begin() - clk * (cl.WRA - 1), span.Begin() + clk)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "PDNA") - return shared_ptr(new PDNA(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.PDEA), - Timespan(span.End() - clk * cl.PDXA, span.End())}, std::shared_ptr())); + return shared_ptr(new PDNA(id, span, trans, {Timespan(span.Begin() - clk * (cl.PDEA - 1), span.Begin() + clk), + Timespan(span.End() - clk * (cl.PDXA - 1), span.End() + clk)}, std::shared_ptr())); else if (dbPhaseName == "PDNAB") return shared_ptr(new PDNAB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk), Timespan(span.End() - clk, span.End())}, std::shared_ptr())); else if (dbPhaseName == "PDNP") - return shared_ptr(new PDNP(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.PDEP), - Timespan(span.End() - clk * cl.PDXP, span.End())}, std::shared_ptr())); + return shared_ptr(new PDNP(id, span, trans, {Timespan(span.Begin() - clk * (cl.PDEP - 1), span.Begin() + clk), + Timespan(span.End() - clk * (cl.PDXP - 1), span.End() + clk)}, std::shared_ptr())); else if (dbPhaseName == "PDNPB") return shared_ptr(new PDNPB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk), Timespan(span.End() - clk, span.End())}, std::shared_ptr())); else if (dbPhaseName == "SREF") - return shared_ptr(new SREF(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.SREFEN), - Timespan(span.End() - clk * cl.SREFEX, span.End())}, std::shared_ptr())); + return shared_ptr(new SREF(id, span, trans, {Timespan(span.Begin() - clk * (cl.SREFEN - 1), span.Begin() + clk), + Timespan(span.End() - clk * (cl.SREFEX - 1), span.End() + clk)}, std::shared_ptr())); else if (dbPhaseName == "SREFB") return shared_ptr(new SREFB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk), Timespan(span.End() - clk, span.End())}, std::shared_ptr())); From f23ea816c3bd159fd374ebcfecead2b55e2339f3 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Wed, 29 Jul 2020 14:58:26 +0200 Subject: [PATCH 02/11] std::pair to std::tuple for new command multiplexer. --- .../library/src/controller/BankMachine.cpp | 6 +-- DRAMSys/library/src/controller/BankMachine.h | 2 +- DRAMSys/library/src/controller/Controller.cpp | 52 +++++++++---------- .../library/src/controller/cmdmux/CmdMuxIF.h | 4 +- .../src/controller/cmdmux/CmdMuxOldest.cpp | 8 +-- .../src/controller/cmdmux/CmdMuxOldest.h | 4 +- .../src/controller/cmdmux/CmdMuxStrict.cpp | 10 ++-- .../src/controller/cmdmux/CmdMuxStrict.h | 4 +- .../powerdown/PowerDownManagerDummy.cpp | 4 +- .../powerdown/PowerDownManagerDummy.h | 2 +- .../controller/powerdown/PowerDownManagerIF.h | 2 +- .../powerdown/PowerDownManagerStaggered.cpp | 6 +-- .../powerdown/PowerDownManagerStaggered.h | 2 +- .../refresh/RefreshManagerBankwise.cpp | 6 +-- .../refresh/RefreshManagerBankwise.h | 2 +- .../refresh/RefreshManagerDummy.cpp | 4 +- .../controller/refresh/RefreshManagerDummy.h | 2 +- .../src/controller/refresh/RefreshManagerIF.h | 2 +- .../refresh/RefreshManagerRankwise.cpp | 6 +-- .../refresh/RefreshManagerRankwise.h | 2 +- 20 files changed, 65 insertions(+), 65 deletions(-) diff --git a/DRAMSys/library/src/controller/BankMachine.cpp b/DRAMSys/library/src/controller/BankMachine.cpp index 836f8d42..ed821c19 100644 --- a/DRAMSys/library/src/controller/BankMachine.cpp +++ b/DRAMSys/library/src/controller/BankMachine.cpp @@ -44,12 +44,12 @@ BankMachine::BankMachine(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) bankgroup = BankGroup(bank.ID() / memSpec->banksPerGroup); } -std::pair BankMachine::getNextCommand() +std::tuple BankMachine::getNextCommand() { if (sc_time_stamp() == timeToSchedule) - return std::pair(nextCommand, currentPayload); + return std::tuple(nextCommand, currentPayload); else - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr); } void BankMachine::updateState(Command command) diff --git a/DRAMSys/library/src/controller/BankMachine.h b/DRAMSys/library/src/controller/BankMachine.h index 1b647417..9c3b4cfc 100644 --- a/DRAMSys/library/src/controller/BankMachine.h +++ b/DRAMSys/library/src/controller/BankMachine.h @@ -58,7 +58,7 @@ class BankMachine public: virtual ~BankMachine() {} virtual sc_time start() = 0; - std::pair getNextCommand(); + std::tuple getNextCommand(); void updateState(Command); void block(); diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index 20caeda1..a9265dbd 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -239,28 +239,28 @@ void Controller::controllerMethod() it->start(); // (5) Choose one request and send it to DRAM - std::pair commandPair; - std::vector> readyCommands; + std::tuple commandTuple; + std::vector> readyCommands; // (5.1) Check for power-down commands (PDEA/PDEP/SREFEN or PDXA/PDXP/SREFEX) for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { - commandPair = powerDownManagers[rankID]->getNextCommand(); - if (commandPair.second != nullptr) - readyCommands.push_back(commandPair); + commandTuple = powerDownManagers[rankID]->getNextCommand(); + if (std::get<1>(commandTuple) != nullptr) + readyCommands.push_back(commandTuple); else { // (5.2) Check for refresh commands (PREA/PRE or REFA/REFB) - commandPair = refreshManagers[rankID]->getNextCommand(); - if (commandPair.second != nullptr) - readyCommands.push_back(commandPair); + commandTuple = refreshManagers[rankID]->getNextCommand(); + if (std::get<1>(commandTuple) != nullptr) + readyCommands.push_back(commandTuple); else { // (5.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA) for (auto it : bankMachinesOnRank[rankID]) { - commandPair = it->getNextCommand(); - if (commandPair.second != nullptr) - readyCommands.push_back(commandPair); + commandTuple = it->getNextCommand(); + if (std::get<1>(commandTuple) != nullptr) + readyCommands.push_back(commandTuple); } } } @@ -269,29 +269,29 @@ void Controller::controllerMethod() bool readyCmdBlocked = false; if (!readyCommands.empty()) { - commandPair = cmdMux->selectCommand(readyCommands); - if (commandPair.second != nullptr) // can happen with FIFO strict + commandTuple = cmdMux->selectCommand(readyCommands); + if (std::get<1>(commandTuple) != nullptr) // can happen with FIFO strict { - Rank rank = DramExtension::getRank(commandPair.second); - BankGroup bankgroup = DramExtension::getBankGroup(commandPair.second); - Bank bank = DramExtension::getBank(commandPair.second); + Rank rank = DramExtension::getRank(std::get<1>(commandTuple)); + BankGroup bankgroup = DramExtension::getBankGroup(std::get<1>(commandTuple)); + Bank bank = DramExtension::getBank(std::get<1>(commandTuple)); - if (isRankCommand(commandPair.first)) + if (isRankCommand(std::get<0>(commandTuple))) { for (auto it : bankMachinesOnRank[rank.ID()]) - it->updateState(commandPair.first); + it->updateState(std::get<0>(commandTuple)); } else - bankMachines[bank.ID()]->updateState(commandPair.first); + bankMachines[bank.ID()]->updateState(std::get<0>(commandTuple)); - refreshManagers[rank.ID()]->updateState(commandPair.first); - powerDownManagers[rank.ID()]->updateState(commandPair.first); - checker->insert(commandPair.first, rank, bankgroup, bank); + refreshManagers[rank.ID()]->updateState(std::get<0>(commandTuple)); + powerDownManagers[rank.ID()]->updateState(std::get<0>(commandTuple)); + checker->insert(std::get<0>(commandTuple), rank, bankgroup, bank); - if (isCasCommand(commandPair.first)) + if (isCasCommand(std::get<0>(commandTuple))) { - scheduler->removeRequest(commandPair.second); - respQueue->insertPayload(commandPair.second, memSpec->getIntervalOnDataStrobe(commandPair.first).end); + scheduler->removeRequest(std::get<1>(commandTuple)); + respQueue->insertPayload(std::get<1>(commandTuple), memSpec->getIntervalOnDataStrobe(std::get<0>(commandTuple)).end); sc_time triggerTime = respQueue->getTriggerTime(); if (triggerTime != sc_max_time()) @@ -302,7 +302,7 @@ void Controller::controllerMethod() if (ranksNumberOfPayloads[rank.ID()] == 0) powerDownManagers[rank.ID()]->triggerEntry(); - sendToDram(commandPair.first, commandPair.second); + sendToDram(std::get<0>(commandTuple), std::get<1>(commandTuple)); } else readyCmdBlocked = true; diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h index a53b9a41..5c683cbd 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h @@ -44,8 +44,8 @@ class CmdMuxIF { public: virtual ~CmdMuxIF() {} - virtual std::pair - selectCommand(std::vector> &) = 0; + virtual std::tuple + selectCommand(std::vector> &) = 0; }; #endif // CMDMUXIF_H diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp index 31c98ef2..4ddedb5e 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp @@ -38,17 +38,17 @@ using namespace tlm; -std::pair -CmdMuxOldest::selectCommand(std::vector> &readyCommands) +std::tuple +CmdMuxOldest::selectCommand(std::vector> &readyCommands) { auto it = readyCommands.begin(); auto result = it; - unsigned lastPayloadID = DramExtension::getPayloadID(it->second); + uint64_t lastPayloadID = DramExtension::getPayloadID(std::get<1>(*it)); it++; while (it != readyCommands.end()) { - unsigned newPayloadID = DramExtension::getPayloadID(it->second); + uint64_t newPayloadID = DramExtension::getPayloadID(std::get<1>(*it)); if (newPayloadID < lastPayloadID) { lastPayloadID = newPayloadID; diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h index 419479b2..8f5131af 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h @@ -40,8 +40,8 @@ class CmdMuxOldest : public CmdMuxIF { public: - std::pair - selectCommand(std::vector> &); + std::tuple + selectCommand(std::vector> &); }; #endif // CMDMUXOLDEST_H diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp index 989c8d96..d91ac117 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp @@ -38,14 +38,14 @@ using namespace tlm; -std::pair -CmdMuxStrict::selectCommand(std::vector> &readyCommands) +std::tuple +CmdMuxStrict::selectCommand(std::vector> &readyCommands) { for (auto it : readyCommands) { - if (isCasCommand(it.first)) + if (isCasCommand(std::get<0>(it))) { - if (DramExtension::getPayloadID(it.second) == nextPayloadID) + if (DramExtension::getPayloadID(std::get<1>(it)) == nextPayloadID) { nextPayloadID++; return it; @@ -54,7 +54,7 @@ CmdMuxStrict::selectCommand(std::vector(it))) return it; } return std::pair(Command::NOP, nullptr); diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h index 1ee53914..fd388350 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h @@ -40,8 +40,8 @@ class CmdMuxStrict : public CmdMuxIF { public: - std::pair - selectCommand(std::vector> &); + std::tuple + selectCommand(std::vector> &); private: uint64_t nextPayloadID = 0; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp index 4124d43d..2e810c17 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp @@ -36,9 +36,9 @@ using namespace tlm; -std::pair PowerDownManagerDummy::getNextCommand() +std::tuple PowerDownManagerDummy::getNextCommand() { - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr); } sc_time PowerDownManagerDummy::start() diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h index 354768eb..4f6e763f 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h @@ -46,7 +46,7 @@ public: virtual void triggerExit() override {} virtual void triggerInterruption() override {} - virtual std::pair getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual void updateState(Command) override {} virtual sc_time start() override; }; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h b/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h index 41474c44..5d0614f4 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h @@ -49,7 +49,7 @@ public: virtual void triggerExit() = 0; virtual void triggerInterruption() = 0; - virtual std::pair getNextCommand() = 0; + virtual std::tuple getNextCommand() = 0; virtual void updateState(Command) = 0; virtual sc_time start() = 0; }; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp index a6fb3ef5..8fca2304 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp @@ -69,12 +69,12 @@ void PowerDownManagerStaggered::triggerInterruption() exitTriggered = true; } -std::pair PowerDownManagerStaggered::getNextCommand() +std::tuple PowerDownManagerStaggered::getNextCommand() { if (sc_time_stamp() == timeToSchedule) - return std::pair(nextCommand, &powerDownPayload); + return std::tuple(nextCommand, &powerDownPayload); else - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr); } sc_time PowerDownManagerStaggered::start() diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h index 499ca3d4..5f41a72a 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h @@ -48,7 +48,7 @@ public: virtual void triggerExit() override; virtual void triggerInterruption() override; - virtual std::pair getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual void updateState(Command) override; virtual sc_time start() override; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index eb93dc57..77e95938 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -59,13 +59,13 @@ RefreshManagerBankwise::RefreshManagerBankwise(std::vector &bankM maxPulledin = -(config.refreshMaxPulledin * memSpec->banksPerRank); } -std::pair RefreshManagerBankwise::getNextCommand() +std::tuple RefreshManagerBankwise::getNextCommand() { if (sc_time_stamp() == timeToSchedule) - return std::pair + return std::tuple (nextCommand, &refreshPayloads[currentBankMachine->getBank().ID() % memSpec->banksPerRank]); else - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr); } sc_time RefreshManagerBankwise::start() diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h index 7a76ceb5..c6dfbf63 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h @@ -48,7 +48,7 @@ class RefreshManagerBankwise final : public RefreshManagerIF public: RefreshManagerBankwise(std::vector &, PowerDownManagerIF *, Rank, CheckerIF *); - virtual std::pair getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual sc_time start() override; virtual void updateState(Command) override; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp index 6e98d9cd..db03b731 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp @@ -36,9 +36,9 @@ using namespace tlm; -std::pair RefreshManagerDummy::getNextCommand() +std::tuple RefreshManagerDummy::getNextCommand() { - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr); } sc_time RefreshManagerDummy::start() diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h index 51c19d2d..93021627 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h @@ -44,7 +44,7 @@ class RefreshManagerDummy final : public RefreshManagerIF { public: - virtual std::pair getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual sc_time start() override; virtual void updateState(Command) override {} }; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h b/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h index 1c2db4fd..3dd53d07 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h @@ -45,7 +45,7 @@ class RefreshManagerIF public: virtual ~RefreshManagerIF() {} - virtual std::pair getNextCommand() = 0; + virtual std::tuple getNextCommand() = 0; virtual sc_time start() = 0; virtual void updateState(Command) = 0; }; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp index 9e9a5830..e59a82b1 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp @@ -52,12 +52,12 @@ RefreshManagerRankwise::RefreshManagerRankwise(std::vector &bankM maxPulledin = -config.refreshMaxPulledin; } -std::pair RefreshManagerRankwise::getNextCommand() +std::tuple RefreshManagerRankwise::getNextCommand() { if (sc_time_stamp() == timeToSchedule) - return std::pair(nextCommand, &refreshPayload); + return std::tuple(nextCommand, &refreshPayload); else - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr); } sc_time RefreshManagerRankwise::start() diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h index a7d84f2d..6b336754 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h @@ -46,7 +46,7 @@ class RefreshManagerRankwise final : public RefreshManagerIF public: RefreshManagerRankwise(std::vector &, PowerDownManagerIF *, Rank, CheckerIF *); - virtual std::pair getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual sc_time start() override; virtual void updateState(Command) override; From f68bef7e7477d466b3040472bb07ebc497f227d2 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Thu, 30 Jul 2020 14:33:34 +0200 Subject: [PATCH 03/11] Add earliest time of issuance to command tuple and adapt cmd muxes. --- .../library/src/controller/BankMachine.cpp | 71 ++++++------------- DRAMSys/library/src/controller/BankMachine.h | 4 +- DRAMSys/library/src/controller/Controller.cpp | 37 +++++----- .../library/src/controller/cmdmux/CmdMuxIF.h | 7 +- .../src/controller/cmdmux/CmdMuxOldest.cpp | 37 ++++++---- .../src/controller/cmdmux/CmdMuxOldest.h | 4 +- .../src/controller/cmdmux/CmdMuxStrict.cpp | 31 ++++---- .../src/controller/cmdmux/CmdMuxStrict.h | 4 +- .../powerdown/PowerDownManagerDummy.cpp | 4 +- .../powerdown/PowerDownManagerDummy.h | 2 +- .../controller/powerdown/PowerDownManagerIF.h | 2 +- .../powerdown/PowerDownManagerStaggered.cpp | 8 +-- .../powerdown/PowerDownManagerStaggered.h | 4 +- .../refresh/RefreshManagerBankwise.cpp | 11 ++- .../refresh/RefreshManagerBankwise.h | 4 +- .../refresh/RefreshManagerDummy.cpp | 4 +- .../controller/refresh/RefreshManagerDummy.h | 2 +- .../src/controller/refresh/RefreshManagerIF.h | 2 +- .../refresh/RefreshManagerRankwise.cpp | 10 ++- .../refresh/RefreshManagerRankwise.h | 4 +- README.md | 2 +- 21 files changed, 116 insertions(+), 138 deletions(-) diff --git a/DRAMSys/library/src/controller/BankMachine.cpp b/DRAMSys/library/src/controller/BankMachine.cpp index ed821c19..82259337 100644 --- a/DRAMSys/library/src/controller/BankMachine.cpp +++ b/DRAMSys/library/src/controller/BankMachine.cpp @@ -44,12 +44,9 @@ BankMachine::BankMachine(SchedulerIF *scheduler, CheckerIF *checker, Bank bank) bankgroup = BankGroup(bank.ID() / memSpec->banksPerGroup); } -std::tuple BankMachine::getNextCommand() +std::tuple BankMachine::getNextCommand() { - if (sc_time_stamp() == timeToSchedule) - return std::tuple(nextCommand, currentPayload); - else - return std::tuple(Command::NOP, nullptr); + return std::tuple(nextCommand, currentPayload, timeToSchedule); } void BankMachine::updateState(Command command) @@ -124,6 +121,7 @@ BankMachineOpen::BankMachineOpen(SchedulerIF *scheduler, CheckerIF *checker, Ban sc_time BankMachineOpen::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (sleeping) return timeToSchedule; @@ -134,30 +132,26 @@ sc_time BankMachineOpen::start() if (currentState == BmState::Precharged && !blocked) // row miss { - timeToSchedule = checker->timeToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (currentState == BmState::Activated) { if (DramExtension::getRow(currentPayload) == currentRow) // row hit { - if (currentPayload->get_command() == TLM_READ_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::RD, rank, bankgroup, bank); + if (currentPayload->get_command() == TLM_READ_COMMAND) nextCommand = Command::RD; - } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::WR, rank, bankgroup, bank); nextCommand = Command::WR; - } else SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); + + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (!blocked) // row miss { - timeToSchedule = checker->timeToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } } return timeToSchedule; @@ -169,6 +163,7 @@ BankMachineClosed::BankMachineClosed(SchedulerIF *scheduler, CheckerIF *checker, sc_time BankMachineClosed::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (sleeping) return timeToSchedule; @@ -179,23 +174,19 @@ sc_time BankMachineClosed::start() if (currentState == BmState::Precharged && !blocked) // row miss { - timeToSchedule = checker->timeToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (currentState == BmState::Activated) { if (currentPayload->get_command() == TLM_READ_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::RDA, rank, bankgroup, bank); nextCommand = Command::RDA; - } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::WRA, rank, bankgroup, bank); nextCommand = Command::WRA; - } else SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); + + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } return timeToSchedule; } @@ -206,6 +197,7 @@ BankMachineOpenAdaptive::BankMachineOpenAdaptive(SchedulerIF *scheduler, Checker sc_time BankMachineOpenAdaptive::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (sleeping) return timeToSchedule; @@ -216,8 +208,8 @@ sc_time BankMachineOpenAdaptive::start() if (currentState == BmState::Precharged && !blocked) // row miss { - timeToSchedule = checker->timeToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (currentState == BmState::Activated) { @@ -226,38 +218,27 @@ sc_time BankMachineOpenAdaptive::start() if (scheduler->hasFurtherRequest(bank) && !scheduler->hasFurtherRowHit(bank, currentRow)) { if (currentPayload->get_command() == TLM_READ_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::RDA, rank, bankgroup, bank); nextCommand = Command::RDA; - } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::WRA, rank, bankgroup, bank); nextCommand = Command::WRA; - } else SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); } else { if (currentPayload->get_command() == TLM_READ_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::RD, rank, bankgroup, bank); nextCommand = Command::RD; - } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::WR, rank, bankgroup, bank); nextCommand = Command::WR; - } else - SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); + SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); } + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (!blocked) // row miss { - timeToSchedule = checker->timeToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } } return timeToSchedule; @@ -269,6 +250,7 @@ BankMachineClosedAdaptive::BankMachineClosedAdaptive(SchedulerIF *scheduler, Che sc_time BankMachineClosedAdaptive::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (sleeping) return timeToSchedule; @@ -279,8 +261,8 @@ sc_time BankMachineClosedAdaptive::start() if (currentState == BmState::Precharged && !blocked) // row miss { - timeToSchedule = checker->timeToSatisfyConstraints(Command::ACT, rank, bankgroup, bank); nextCommand = Command::ACT; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (currentState == BmState::Activated) { @@ -289,38 +271,27 @@ sc_time BankMachineClosedAdaptive::start() if (scheduler->hasFurtherRowHit(bank, currentRow)) { if (currentPayload->get_command() == TLM_READ_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::RD, rank, bankgroup, bank); nextCommand = Command::RD; - } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::WR, rank, bankgroup, bank); nextCommand = Command::WR; - } else SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); } else { if (currentPayload->get_command() == TLM_READ_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::RDA, rank, bankgroup, bank); nextCommand = Command::RDA; - } else if (currentPayload->get_command() == TLM_WRITE_COMMAND) - { - timeToSchedule = checker->timeToSatisfyConstraints(Command::WRA, rank, bankgroup, bank); nextCommand = Command::WRA; - } else SC_REPORT_FATAL("BankMachine", "Wrong TLM command"); } + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); } else if (!blocked) // row miss TODO: remove this, can never happen { - timeToSchedule = checker->timeToSatisfyConstraints(Command::PRE, rank, bankgroup, bank); nextCommand = Command::PRE; + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, bankgroup, bank); SC_REPORT_FATAL("BankMachine", "Should never be reached for this policy"); } } diff --git a/DRAMSys/library/src/controller/BankMachine.h b/DRAMSys/library/src/controller/BankMachine.h index 9c3b4cfc..651f8da7 100644 --- a/DRAMSys/library/src/controller/BankMachine.h +++ b/DRAMSys/library/src/controller/BankMachine.h @@ -58,7 +58,7 @@ class BankMachine public: virtual ~BankMachine() {} virtual sc_time start() = 0; - std::tuple getNextCommand(); + std::tuple getNextCommand(); void updateState(Command); void block(); @@ -74,7 +74,7 @@ protected: tlm::tlm_generic_payload *currentPayload = nullptr; SchedulerIF *scheduler; CheckerIF *checker; - Command nextCommand; + Command nextCommand = Command::NOP; BmState currentState = BmState::Precharged; Row currentRow; sc_time timeToSchedule = sc_max_time(); diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index a9265dbd..f3bba1e3 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -239,30 +239,26 @@ void Controller::controllerMethod() it->start(); // (5) Choose one request and send it to DRAM - std::tuple commandTuple; - std::vector> readyCommands; - // (5.1) Check for power-down commands (PDEA/PDEP/SREFEN or PDXA/PDXP/SREFEX) + std::tuple commandTuple; + std::list> readyCommands; for (unsigned rankID = 0; rankID < memSpec->numberOfRanks; rankID++) { + // (5.1) Check for power-down commands (PDEA/PDEP/SREFEN or PDXA/PDXP/SREFEX) commandTuple = powerDownManagers[rankID]->getNextCommand(); - if (std::get<1>(commandTuple) != nullptr) + if (std::get<0>(commandTuple) != Command::NOP) readyCommands.push_back(commandTuple); - else + + // (5.2) Check for refresh commands (PREA/PRE or REFA/REFB) + commandTuple = refreshManagers[rankID]->getNextCommand(); + if (std::get<0>(commandTuple) != Command::NOP) + readyCommands.push_back(commandTuple); + + // (5.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA) + for (auto it : bankMachinesOnRank[rankID]) { - // (5.2) Check for refresh commands (PREA/PRE or REFA/REFB) - commandTuple = refreshManagers[rankID]->getNextCommand(); - if (std::get<1>(commandTuple) != nullptr) + commandTuple = it->getNextCommand(); + if (std::get<0>(commandTuple) != Command::NOP) readyCommands.push_back(commandTuple); - else - { - // (5.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA) - for (auto it : bankMachinesOnRank[rankID]) - { - commandTuple = it->getNextCommand(); - if (std::get<1>(commandTuple) != nullptr) - readyCommands.push_back(commandTuple); - } - } } } @@ -270,7 +266,7 @@ void Controller::controllerMethod() if (!readyCommands.empty()) { commandTuple = cmdMux->selectCommand(readyCommands); - if (std::get<1>(commandTuple) != nullptr) // can happen with FIFO strict + if (std::get<0>(commandTuple) != Command::NOP) // can happen with FIFO strict { Rank rank = DramExtension::getRank(std::get<1>(commandTuple)); BankGroup bankgroup = DramExtension::getBankGroup(std::get<1>(commandTuple)); @@ -305,7 +301,10 @@ void Controller::controllerMethod() sendToDram(std::get<0>(commandTuple), std::get<1>(commandTuple)); } else + { + //std::cout << "Ready command blocked at " << sc_time_stamp() << std::endl; readyCmdBlocked = true; + } } // (6) Accept request from arbiter if scheduler is not full, otherwise backpressure (start END_REQ) diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h index 5c683cbd..8f671327 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxIF.h @@ -35,17 +35,18 @@ #ifndef CMDMUXIF_H #define CMDMUXIF_H +#include #include #include -#include +#include #include "../Command.h" class CmdMuxIF { public: virtual ~CmdMuxIF() {} - virtual std::tuple - selectCommand(std::vector> &) = 0; + virtual std::tuple + selectCommand(std::list> &) = 0; }; #endif // CMDMUXIF_H diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp index 4ddedb5e..9d002b90 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.cpp @@ -38,23 +38,30 @@ using namespace tlm; -std::tuple -CmdMuxOldest::selectCommand(std::vector> &readyCommands) -{ - auto it = readyCommands.begin(); - auto result = it; - uint64_t lastPayloadID = DramExtension::getPayloadID(std::get<1>(*it)); - it++; +std::tuple +CmdMuxOldest::selectCommand(std::list> &readyCommands) +{ + readyCommands.remove_if([](std::tuple element){return std::get<2>(element) != sc_time_stamp();}); - while (it != readyCommands.end()) + if (!readyCommands.empty()) { - uint64_t newPayloadID = DramExtension::getPayloadID(std::get<1>(*it)); - if (newPayloadID < lastPayloadID) - { - lastPayloadID = newPayloadID; - result = it; - } + auto it = readyCommands.begin(); + auto result = it; + uint64_t lastPayloadID = DramExtension::getPayloadID(std::get<1>(*it)); it++; + + while (it != readyCommands.end()) + { + uint64_t newPayloadID = DramExtension::getPayloadID(std::get<1>(*it)); + if (newPayloadID < lastPayloadID) + { + lastPayloadID = newPayloadID; + result = it; + } + it++; + } + return *result; } - return *result; + else + return std::tuple(Command::NOP, nullptr, sc_max_time()); } diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h index 8f5131af..40c69ff9 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxOldest.h @@ -40,8 +40,8 @@ class CmdMuxOldest : public CmdMuxIF { public: - std::tuple - selectCommand(std::vector> &); + std::tuple + selectCommand(std::list> &); }; #endif // CMDMUXOLDEST_H diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp index d91ac117..87c34f05 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.cpp @@ -38,24 +38,29 @@ using namespace tlm; -std::tuple -CmdMuxStrict::selectCommand(std::vector> &readyCommands) +std::tuple +CmdMuxStrict::selectCommand(std::list> &readyCommands) { - for (auto it : readyCommands) + readyCommands.remove_if([](std::tuple element){return std::get<2>(element) != sc_time_stamp();}); + + if (!readyCommands.empty()) { - if (isCasCommand(std::get<0>(it))) + for (auto it : readyCommands) { - if (DramExtension::getPayloadID(std::get<1>(it)) == nextPayloadID) + if (isCasCommand(std::get<0>(it))) { - nextPayloadID++; - return it; + if (DramExtension::getPayloadID(std::get<1>(it)) == nextPayloadID) + { + nextPayloadID++; + return it; + } } } + for (auto it : readyCommands) + { + if (isRasCommand(std::get<0>(it))) + return it; + } } - for (auto it : readyCommands) - { - if (isRasCommand(std::get<0>(it))) - return it; - } - return std::pair(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr, sc_max_time()); } diff --git a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h index fd388350..a0389771 100644 --- a/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h +++ b/DRAMSys/library/src/controller/cmdmux/CmdMuxStrict.h @@ -40,8 +40,8 @@ class CmdMuxStrict : public CmdMuxIF { public: - std::tuple - selectCommand(std::vector> &); + std::tuple + selectCommand(std::list> &); private: uint64_t nextPayloadID = 0; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp index 2e810c17..8439982f 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.cpp @@ -36,9 +36,9 @@ using namespace tlm; -std::tuple PowerDownManagerDummy::getNextCommand() +std::tuple PowerDownManagerDummy::getNextCommand() { - return std::tuple(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr, sc_max_time()); } sc_time PowerDownManagerDummy::start() diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h index 4f6e763f..82b5e60e 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerDummy.h @@ -46,7 +46,7 @@ public: virtual void triggerExit() override {} virtual void triggerInterruption() override {} - virtual std::tuple getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual void updateState(Command) override {} virtual sc_time start() override; }; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h b/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h index 5d0614f4..b501c10e 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerIF.h @@ -49,7 +49,7 @@ public: virtual void triggerExit() = 0; virtual void triggerInterruption() = 0; - virtual std::tuple getNextCommand() = 0; + virtual std::tuple getNextCommand() = 0; virtual void updateState(Command) = 0; virtual sc_time start() = 0; }; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp index 8fca2304..9fca93cd 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp @@ -69,17 +69,15 @@ void PowerDownManagerStaggered::triggerInterruption() exitTriggered = true; } -std::tuple PowerDownManagerStaggered::getNextCommand() +std::tuple PowerDownManagerStaggered::getNextCommand() { - if (sc_time_stamp() == timeToSchedule) - return std::tuple(nextCommand, &powerDownPayload); - else - return std::tuple(Command::NOP, nullptr); + return std::tuple(nextCommand, &powerDownPayload, timeToSchedule); } sc_time PowerDownManagerStaggered::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (exitTriggered) { diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h index 5f41a72a..5f4120e1 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.h @@ -48,7 +48,7 @@ public: virtual void triggerExit() override; virtual void triggerInterruption() override; - virtual std::tuple getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual void updateState(Command) override; virtual sc_time start() override; @@ -59,7 +59,7 @@ private: CheckerIF *checker; sc_time timeToSchedule = sc_max_time(); - Command nextCommand; + Command nextCommand = Command::NOP; bool controllerIdle = true; bool entryTriggered = true; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index 77e95938..76d74352 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -54,23 +54,22 @@ RefreshManagerBankwise::RefreshManagerBankwise(std::vector &bankM allBankMachines.push_back(bankMachines[bankID]); } remainingBankMachines = allBankMachines; + currentBankMachine = *remainingBankMachines.begin(); maxPostponed = config.refreshMaxPostponed * memSpec->banksPerRank; maxPulledin = -(config.refreshMaxPulledin * memSpec->banksPerRank); } -std::tuple RefreshManagerBankwise::getNextCommand() +std::tuple RefreshManagerBankwise::getNextCommand() { - if (sc_time_stamp() == timeToSchedule) - return std::tuple - (nextCommand, &refreshPayloads[currentBankMachine->getBank().ID() % memSpec->banksPerRank]); - else - return std::tuple(Command::NOP, nullptr); + return std::tuple + (nextCommand, &refreshPayloads[currentBankMachine->getBank().ID() % memSpec->banksPerRank], timeToSchedule); } sc_time RefreshManagerBankwise::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (sc_time_stamp() >= timeForNextTrigger) { diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h index c6dfbf63..9e7752fb 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h @@ -48,7 +48,7 @@ class RefreshManagerBankwise final : public RefreshManagerIF public: RefreshManagerBankwise(std::vector &, PowerDownManagerIF *, Rank, CheckerIF *); - virtual std::tuple getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual sc_time start() override; virtual void updateState(Command) override; @@ -62,7 +62,7 @@ private: sc_time timeToSchedule = sc_max_time(); Rank rank; CheckerIF *checker; - Command nextCommand; + Command nextCommand = Command::NOP; std::list remainingBankMachines; std::list allBankMachines; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp index db03b731..33206fc6 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.cpp @@ -36,9 +36,9 @@ using namespace tlm; -std::tuple RefreshManagerDummy::getNextCommand() +std::tuple RefreshManagerDummy::getNextCommand() { - return std::tuple(Command::NOP, nullptr); + return std::tuple(Command::NOP, nullptr, sc_max_time()); } sc_time RefreshManagerDummy::start() diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h index 93021627..a7a26f79 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerDummy.h @@ -44,7 +44,7 @@ class RefreshManagerDummy final : public RefreshManagerIF { public: - virtual std::tuple getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual sc_time start() override; virtual void updateState(Command) override {} }; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h b/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h index 3dd53d07..ff8bc949 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerIF.h @@ -45,7 +45,7 @@ class RefreshManagerIF public: virtual ~RefreshManagerIF() {} - virtual std::tuple getNextCommand() = 0; + virtual std::tuple getNextCommand() = 0; virtual sc_time start() = 0; virtual void updateState(Command) = 0; }; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp index e59a82b1..956982c8 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp @@ -52,17 +52,15 @@ RefreshManagerRankwise::RefreshManagerRankwise(std::vector &bankM maxPulledin = -config.refreshMaxPulledin; } -std::tuple RefreshManagerRankwise::getNextCommand() +std::tuple RefreshManagerRankwise::getNextCommand() { - if (sc_time_stamp() == timeToSchedule) - return std::tuple(nextCommand, &refreshPayload); - else - return std::tuple(Command::NOP, nullptr); + return std::tuple(nextCommand, &refreshPayload, timeToSchedule); } sc_time RefreshManagerRankwise::start() { timeToSchedule = sc_max_time(); + nextCommand = Command::NOP; if (sc_time_stamp() >= timeForNextTrigger) { @@ -130,7 +128,7 @@ sc_time RefreshManagerRankwise::start() } else { - // nextCommand stays Command::REFA + nextCommand = Command::REFA; timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, BankGroup(0), Bank(0)); return timeToSchedule; } diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h index 6b336754..778e0045 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.h @@ -46,7 +46,7 @@ class RefreshManagerRankwise final : public RefreshManagerIF public: RefreshManagerRankwise(std::vector &, PowerDownManagerIF *, Rank, CheckerIF *); - virtual std::tuple getNextCommand() override; + virtual std::tuple getNextCommand() override; virtual sc_time start() override; virtual void updateState(Command) override; @@ -60,7 +60,7 @@ private: sc_time timeToSchedule = sc_max_time(); Rank rank; CheckerIF *checker; - Command nextCommand; + Command nextCommand = Command::NOP; unsigned activatedBanks = 0; diff --git a/README.md b/README.md index b6351eb5..909d2fe4 100644 --- a/README.md +++ b/README.md @@ -204,7 +204,7 @@ The content of [ddr3.json](DRAMSys/library/resources/configs/simulator/ddr3.json } ``` - - *SimulationName* (boolean) + - *SimulationName* (string) - Give the name of the simulation for distinguishing from other simulations. - *Debug* (boolean) - true: enables debug output on console (only supported by a debug build) From d8f8f83a88f01fb4255245a442160a324e0bfeb6 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Thu, 30 Jul 2020 15:01:00 +0200 Subject: [PATCH 04/11] Update HBM to new command view. --- .../src/configuration/memspec/MemSpecHBM2.cpp | 4 +- .../src/controller/checker/CheckerHBM2.cpp | 82 +++++++------------ .../src/controller/checker/CheckerLPDDR4.cpp | 2 +- 3 files changed, 33 insertions(+), 55 deletions(-) diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp index 784b4f99..09897b09 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp @@ -101,9 +101,9 @@ sc_time MemSpecHBM2::getExecutionTime(Command command, const tlm_generic_payload else if (command == Command::ACT) { if (payload.get_command() == TLM_READ_COMMAND) - return tRCDRD + tCK; + return tRCDRD; else - return tRCDWR + tCK; + return tRCDWR; } else if (command == Command::RD) return tRL + tDQSCK + burstDuration; diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp index a9dc4ec6..d1c316b0 100644 --- a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp @@ -71,7 +71,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -115,14 +115,12 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->tCK); } else if (command == Command::WR || command == Command::WRA) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR); lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -151,8 +149,6 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->tCK); } else if (command == Command::ACT) { @@ -170,54 +166,52 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP); lastCommandStart = lastScheduledByCommandAndRank[Command::PREA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP); lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommand[Command::PDXP]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC); lastCommandStart = lastScheduledByCommandAndBank[Command::REFB][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB); lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD); lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS - memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); if (last4Activates[rank.ID()].size() >= 4) - earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW - memSpec->tCK); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); } else if (command == Command::PRE) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -230,14 +224,12 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PREA) { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -262,14 +254,12 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::REFA) { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -302,22 +292,20 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::REFB) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::ACT][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL); lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS); lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -366,8 +354,6 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr if (last4Activates[rank.ID()].size() >= 4) earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDEA) { @@ -390,16 +376,12 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCKE); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDXA) { lastCommandStart = lastScheduledByCommand[Command::PDEA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPD); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDEP) { @@ -422,22 +404,18 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDXP) { lastCommandStart = lastScheduledByCommand[Command::PDEP]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPD); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::SREFEN) { lastCommandStart = lastScheduledByCommand[Command::ACT]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) @@ -470,20 +448,22 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::SREFEX) { lastCommandStart = lastScheduledByCommand[Command::SREFEN]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCKESR); - - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else SC_REPORT_FATAL("CheckerHBM2", "Unknown command!"); + // Check if command bus is free + if (isRasCommand(command)) + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->getCommandLength(command)); + else + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->tCK); + return earliestTimeToStart; } @@ -497,18 +477,16 @@ void CheckerHBM2::insert(Command command, Rank rank, BankGroup bankgroup, Bank b lastScheduledByCommandAndRank[command][rank.ID()] = sc_time_stamp(); lastScheduledByCommand[command] = sc_time_stamp(); - if (isCasCommand(command)) - lastCommandOnCasBus = sc_time_stamp(); - else if (command == Command::ACT) - lastCommandOnRasBus = sc_time_stamp() + memSpec->tCK; - else + if (isRasCommand(command)) lastCommandOnRasBus = sc_time_stamp(); + else + lastCommandOnCasBus = sc_time_stamp(); if (command == Command::ACT || command == Command::REFB) { if (last4Activates[rank.ID()].size() == 4) last4Activates[rank.ID()].pop(); - last4Activates[rank.ID()].push(lastCommandOnRasBus); + last4Activates[rank.ID()].push(sc_time_stamp()); } if (command == Command::REFB) diff --git a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp index b13295c7..57c95988 100644 --- a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp @@ -510,6 +510,6 @@ void CheckerLPDDR4::insert(Command command, Rank rank, BankGroup, Bank bank) { if (last4Activates[rank.ID()].size() == 4) last4Activates[rank.ID()].pop(); - last4Activates[rank.ID()].push(lastCommandOnBus); + last4Activates[rank.ID()].push(sc_time_stamp()); } } From 764135eb0079675b79257d9f9cbe286e5a9bc3ad Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Thu, 30 Jul 2020 15:58:13 +0200 Subject: [PATCH 05/11] Revert changes in timing checkers. --- .../src/configuration/memspec/MemSpecHBM2.cpp | 4 +- .../configuration/memspec/MemSpecLPDDR4.cpp | 26 +++--- .../src/controller/checker/CheckerHBM2.cpp | 82 ++++++++++++------- .../src/controller/checker/CheckerLPDDR4.cpp | 70 ++++++++-------- .../businessObjects/phases/phasefactory.cpp | 30 +++---- 5 files changed, 117 insertions(+), 95 deletions(-) diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp index 09897b09..784b4f99 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp @@ -101,9 +101,9 @@ sc_time MemSpecHBM2::getExecutionTime(Command command, const tlm_generic_payload else if (command == Command::ACT) { if (payload.get_command() == TLM_READ_COMMAND) - return tRCDRD; + return tRCDRD + tCK; else - return tRCDWR; + return tRCDWR + tCK; } else if (command == Command::RD) return tRL + tDQSCK + burstDuration; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp index c4d2050e..915c14c4 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp @@ -107,23 +107,23 @@ sc_time MemSpecLPDDR4::getRefreshIntervalPB() const sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_payload &) const { if (command == Command::PRE) - return tRPpb; + return tRPpb + tCK; else if (command == Command::PREA) - return tRPab; + return tRPab + tCK; else if (command == Command::ACT) - return tRCD; + return tRCD + 3 * tCK; else if (command == Command::RD) - return tRL + tDQSCK + burstDuration; + return tRL + tDQSCK + burstDuration + 3 * tCK; else if (command == Command::RDA) - return burstDuration + tRTP - 8 * tCK + tRPpb; + return burstDuration + tRTP - 5 * tCK + tRPpb; else if (command == Command::WR) - return tWL + tDQSS + tDQS2DQ + burstDuration; + return tWL + tDQSS + tDQS2DQ + burstDuration + 3 * tCK; else if (command == Command::WRA) - return tWL + tCK + burstDuration + tWR + tRPpb; + return tWL + 4 * tCK + burstDuration + tWR + tRPpb; else if (command == Command::REFA) - return tRFCab; + return tRFCab + tCK; else if (command == Command::REFB) - return tRFCpb; + return tRFCpb + tCK; else { SC_REPORT_FATAL("getExecutionTime", @@ -135,11 +135,11 @@ sc_time MemSpecLPDDR4::getExecutionTime(Command command, const tlm_generic_paylo TimeInterval MemSpecLPDDR4::getIntervalOnDataStrobe(Command command) const { if (command == Command::RD || command == Command::RDA) - return TimeInterval(sc_time_stamp() + tRL + tDQSCK, - sc_time_stamp() + tRL + tDQSCK + burstDuration); + return TimeInterval(sc_time_stamp() + tRL + tDQSCK + 3 * tCK, + sc_time_stamp() + tRL + tDQSCK + burstDuration + 3 * tCK); else if (command == Command::WR || command == Command::WRA) - return TimeInterval(sc_time_stamp() + tWL + tDQSS + tDQS2DQ, - sc_time_stamp() + tWL + tDQSS + tDQS2DQ + burstDuration); + return TimeInterval(sc_time_stamp() + tWL + tDQSS + tDQS2DQ + 3 * tCK, + sc_time_stamp() + tWL + tDQSS + tDQS2DQ + burstDuration + 3 * tCK); else { SC_REPORT_FATAL("MemSpecLPDDR4", "Method was called with invalid argument"); diff --git a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp index d1c316b0..a9dc4ec6 100644 --- a/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerHBM2.cpp @@ -71,7 +71,7 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDRD + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::RD][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -115,12 +115,14 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->tCK); } else if (command == Command::WR || command == Command::WRA) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCDWR + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -149,6 +151,8 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->tCK); } else if (command == Command::ACT) { @@ -166,52 +170,54 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRTP + memSpec->tRP - memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::WRA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + tWRPRE + memSpec->tRP - memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::PREA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRP - memSpec->tCK); lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK); lastCommandStart = lastScheduledByCommand[Command::PDXP]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP - memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFC - memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::REFB][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB - memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRREFD - memSpec->tCK); lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS - memSpec->tCK); if (last4Activates[rank.ID()].size() >= 4) - earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); + earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW - memSpec->tCK); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PRE) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -224,12 +230,14 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PREA) { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -254,12 +262,14 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCSB); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::REFA) { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -292,20 +302,22 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::REFB) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBankGroup[Command::ACT][bankgroup.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDL + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRDS + memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -354,6 +366,8 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr if (last4Activates[rank.ID()].size() >= 4) earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDEA) { @@ -376,12 +390,16 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::PDXA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCKE); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDXA) { lastCommandStart = lastScheduledByCommand[Command::PDEA]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPD); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDEP) { @@ -404,18 +422,22 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::PDXP) { lastCommandStart = lastScheduledByCommand[Command::PDEP]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tPD); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::SREFEN) { lastCommandStart = lastScheduledByCommand[Command::ACT]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRC + memSpec->tCK); lastCommandStart = lastScheduledByCommand[Command::RDA]; if (lastCommandStart != SC_ZERO_TIME) @@ -448,22 +470,20 @@ sc_time CheckerHBM2::timeToSatisfyConstraints(Command command, Rank rank, BankGr lastCommandStart = lastScheduledByCommand[Command::SREFEX]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXS); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else if (command == Command::SREFEX) { lastCommandStart = lastScheduledByCommand[Command::SREFEN]; if (lastCommandStart != SC_ZERO_TIME) earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tCKESR); + + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->tCK); } else SC_REPORT_FATAL("CheckerHBM2", "Unknown command!"); - // Check if command bus is free - if (isRasCommand(command)) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnRasBus + memSpec->getCommandLength(command)); - else - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnCasBus + memSpec->tCK); - return earliestTimeToStart; } @@ -477,16 +497,18 @@ void CheckerHBM2::insert(Command command, Rank rank, BankGroup bankgroup, Bank b lastScheduledByCommandAndRank[command][rank.ID()] = sc_time_stamp(); lastScheduledByCommand[command] = sc_time_stamp(); - if (isRasCommand(command)) - lastCommandOnRasBus = sc_time_stamp(); - else + if (isCasCommand(command)) lastCommandOnCasBus = sc_time_stamp(); + else if (command == Command::ACT) + lastCommandOnRasBus = sc_time_stamp() + memSpec->tCK; + else + lastCommandOnRasBus = sc_time_stamp(); if (command == Command::ACT || command == Command::REFB) { if (last4Activates[rank.ID()].size() == 4) last4Activates[rank.ID()].pop(); - last4Activates[rank.ID()].push(sc_time_stamp()); + last4Activates[rank.ID()].push(lastCommandOnRasBus); } if (command == Command::REFB) diff --git a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp index 57c95988..3dc894f9 100644 --- a/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp +++ b/DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp @@ -54,16 +54,16 @@ CheckerLPDDR4::CheckerLPDDR4() tRDWR_R = memSpec->tRL + tBURST + memSpec->tRTRS - memSpec->tWL; tWRRD = memSpec->tWL + memSpec->tCK + tBURST + memSpec->tWTR; tWRRD_R = memSpec->tWL + tBURST + memSpec->tRTRS - memSpec->tRL; - tRDPRE = memSpec->tRTP + tBURST - 8 * memSpec->tCK; + tRDPRE = memSpec->tRTP + tBURST - 6 * memSpec->tCK; tRDAACT = memSpec->tRTP + tBURST - 8 * memSpec->tCK + memSpec->tRPpb; - tWRPRE = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR; + tWRPRE = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR + 2 * memSpec->tCK; tWRAACT = memSpec->tWL + tBURST + memSpec->tCK + memSpec->tWR + memSpec->tRPpb; - tACTPDEN = memSpec->tCMDCKE; - tPRPDEN = memSpec->tCMDCKE; - tRDPDEN = memSpec->tRL + memSpec->tDQSCK + tBURST + memSpec->tRPST; - tWRPDEN = memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR; - tWRAPDEN = memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR + 2 * memSpec->tCK; - tREFPDEN = memSpec->tCMDCKE; + tACTPDEN = 3 * memSpec->tCK + memSpec->tCMDCKE; + tPRPDEN = memSpec->tCK + memSpec->tCMDCKE; + tRDPDEN = 3 * memSpec->tCK + memSpec->tRL + memSpec->tDQSCK + tBURST + memSpec->tRPST; + tWRPDEN = 3 * memSpec->tCK + memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR; + tWRAPDEN = 3 * memSpec->tCK + memSpec->tWL + (std::ceil(memSpec->tDQSS / memSpec->tCK) + std::ceil(memSpec->tDQS2DQ / memSpec->tCK)) * memSpec->tCK + tBURST + memSpec->tWR + 2 * memSpec->tCK; + tREFPDEN = memSpec->tCK + memSpec->tCMDCKE; } sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, BankGroup, Bank bank) const @@ -118,7 +118,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); } else if (command == Command::WR || command == Command::WRA) { @@ -160,7 +160,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); } else if (command == Command::ACT) { @@ -182,44 +182,44 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndBank[Command::PRE][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPpb); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPpb - 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::PREA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPab); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRPab - 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + 3 * memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCab); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCab - 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::REFB][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRFCpb - 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD - 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::SREFEX][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR - 2 * memSpec->tCK); if (last4Activates[rank.ID()].size() >= 4) - earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); + earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW - 3 * memSpec->tCK); } else if (command == Command::PRE) { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::RD][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -235,13 +235,13 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); } else if (command == Command::PREA) { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRAS + 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::RD][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -265,7 +265,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::REFB][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -275,7 +275,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -295,7 +295,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -313,11 +313,11 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndBank[Command::ACT][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRRD + 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndBank[Command::RDA][bank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -337,11 +337,11 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -356,7 +356,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXSR); if (last4Activates[rank.ID()].size() >= 4) - earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW); + earliestTimeToStart = std::max(earliestTimeToStart, last4Activates[rank.ID()].front() + memSpec->tFAW - memSpec->tCK); } else if (command == Command::PDEA) { @@ -446,7 +446,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank { lastCommandStart = lastScheduledByCommandAndRank[Command::ACT][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tRCpb + 2 * memSpec->tCK); lastCommandStart = lastScheduledByCommandAndRank[Command::RDA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -466,7 +466,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank lastCommandStart = lastScheduledByCommandAndRank[Command::PDXP][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP + memSpec->tCK); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandStart + memSpec->tXP); lastCommandStart = lastScheduledByCommandAndRank[Command::REFA][rank.ID()]; if (lastCommandStart != SC_ZERO_TIME) @@ -490,7 +490,7 @@ sc_time CheckerLPDDR4::timeToSatisfyConstraints(Command command, Rank rank, Bank SC_REPORT_FATAL("CheckerLPDDR4", "Unknown command!"); // Check if command bus is free - earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->getCommandLength(command)); + earliestTimeToStart = std::max(earliestTimeToStart, lastCommandOnBus + memSpec->tCK); return earliestTimeToStart; } @@ -504,12 +504,12 @@ void CheckerLPDDR4::insert(Command command, Rank rank, BankGroup, Bank bank) lastScheduledByCommandAndRank[command][rank.ID()] = sc_time_stamp(); lastScheduledByCommand[command] = sc_time_stamp(); - lastCommandOnBus = sc_time_stamp(); + lastCommandOnBus = sc_time_stamp() + memSpec->getCommandLength(command) - memSpec->tCK; if (command == Command::ACT || command == Command::REFB) { if (last4Activates[rank.ID()].size() == 4) last4Activates[rank.ID()].pop(); - last4Activates[rank.ID()].push(sc_time_stamp()); + last4Activates[rank.ID()].push(lastCommandOnBus); } } diff --git a/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp b/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp index f11e2072..9156a5d8 100644 --- a/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp +++ b/DRAMSys/traceAnalyzer/businessObjects/phases/phasefactory.cpp @@ -60,49 +60,49 @@ shared_ptr PhaseFactory::CreatePhase(ID id, const QString &dbPhaseName, {Timespan(span.Begin(), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "PRE") return shared_ptr(new PRE(id, span, trans, - {Timespan(span.Begin() - clk * (cl.PRE - 1), span.Begin() + clk)}, std::shared_ptr())); + {Timespan(span.Begin(), span.Begin() + clk * cl.PRE)}, std::shared_ptr())); else if (dbPhaseName == "ACTB") return shared_ptr(new ACTB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk)}, std::shared_ptr())); else if (dbPhaseName == "ACT") return shared_ptr(new ACT(id, span, trans, - {Timespan(span.Begin() - clk * (cl.ACT - 1), span.Begin() + clk)}, std::shared_ptr())); + {Timespan(span.Begin(), span.Begin() + clk * cl.ACT)}, std::shared_ptr())); else if (dbPhaseName == "PREA") return shared_ptr(new PRECHARGE_ALL(id, span, trans, - {Timespan(span.Begin() - clk * (cl.PREA - 1), span.Begin() + clk)}, std::shared_ptr())); + {Timespan(span.Begin(), span.Begin() + clk * cl.PREA)}, std::shared_ptr())); else if (dbPhaseName == "REFA") return shared_ptr(new REFA(id, span, trans, - {Timespan(span.Begin() - clk * (cl.REFA - 1), span.Begin() + clk)}, std::shared_ptr())); + {Timespan(span.Begin(), span.Begin() + clk * cl.REFA)}, std::shared_ptr())); else if (dbPhaseName == "REFB") return shared_ptr(new REFB(id, span, trans, - {Timespan(span.Begin() - clk * (cl.REFB - 1), span.Begin() + clk)}, std::shared_ptr())); + {Timespan(span.Begin(), span.Begin() + clk * cl.REFB)}, std::shared_ptr())); else if (dbPhaseName == "RD") - return shared_ptr(new RD(id, span, trans, {Timespan(span.Begin() - clk * (cl.RD - 1), span.Begin() + clk)}, + return shared_ptr(new RD(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.RD)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "RDA") - return shared_ptr(new RDA(id, span, trans, {Timespan(span.Begin() - clk * (cl.RDA - 1), span.Begin() + clk)}, + return shared_ptr(new RDA(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.RDA)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "WR") - return shared_ptr(new WR(id, span, trans, {Timespan(span.Begin() - clk * (cl.WR - 1), span.Begin() + clk)}, + return shared_ptr(new WR(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.WR)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "WRA") - return shared_ptr(new WRA(id, span, trans, {Timespan(span.Begin() - clk * (cl.WRA - 1), span.Begin() + clk)}, + return shared_ptr(new WRA(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.WRA)}, std::shared_ptr(new Timespan(trans->SpanOnDataStrobe())))); else if (dbPhaseName == "PDNA") - return shared_ptr(new PDNA(id, span, trans, {Timespan(span.Begin() - clk * (cl.PDEA - 1), span.Begin() + clk), - Timespan(span.End() - clk * (cl.PDXA - 1), span.End() + clk)}, std::shared_ptr())); + return shared_ptr(new PDNA(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.PDEA), + Timespan(span.End() - clk * cl.PDXA, span.End())}, std::shared_ptr())); else if (dbPhaseName == "PDNAB") return shared_ptr(new PDNAB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk), Timespan(span.End() - clk, span.End())}, std::shared_ptr())); else if (dbPhaseName == "PDNP") - return shared_ptr(new PDNP(id, span, trans, {Timespan(span.Begin() - clk * (cl.PDEP - 1), span.Begin() + clk), - Timespan(span.End() - clk * (cl.PDXP - 1), span.End() + clk)}, std::shared_ptr())); + return shared_ptr(new PDNP(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.PDEP), + Timespan(span.End() - clk * cl.PDXP, span.End())}, std::shared_ptr())); else if (dbPhaseName == "PDNPB") return shared_ptr(new PDNPB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk), Timespan(span.End() - clk, span.End())}, std::shared_ptr())); else if (dbPhaseName == "SREF") - return shared_ptr(new SREF(id, span, trans, {Timespan(span.Begin() - clk * (cl.SREFEN - 1), span.Begin() + clk), - Timespan(span.End() - clk * (cl.SREFEX - 1), span.End() + clk)}, std::shared_ptr())); + return shared_ptr(new SREF(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk * cl.SREFEN), + Timespan(span.End() - clk * cl.SREFEX, span.End())}, std::shared_ptr())); else if (dbPhaseName == "SREFB") return shared_ptr(new SREFB(id, span, trans, {Timespan(span.Begin(), span.Begin() + clk), Timespan(span.End() - clk, span.End())}, std::shared_ptr())); From 25a268fc8c4443efb640dcda1781b1425f48252a Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Fri, 31 Jul 2020 09:16:09 +0200 Subject: [PATCH 06/11] Move to old bankwise refresh manager. --- DRAMSys/library/src/controller/Controller.cpp | 3 -- .../refresh/RefreshManagerBankwise.cpp | 28 +++++++++++++------ .../refresh/RefreshManagerBankwise.h | 1 + 3 files changed, 21 insertions(+), 11 deletions(-) diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index f3bba1e3..232311fa 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -301,10 +301,7 @@ void Controller::controllerMethod() sendToDram(std::get<0>(commandTuple), std::get<1>(commandTuple)); } else - { - //std::cout << "Ready command blocked at " << sc_time_stamp() << std::endl; readyCmdBlocked = true; - } } // (6) Accept request from arbiter if scheduler is not full, otherwise backpressure (start END_REQ) diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index 76d74352..26de7e6e 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -85,19 +85,23 @@ sc_time RefreshManagerBankwise::start() if (state == RmState::Regular) { - currentIterator = remainingBankMachines.begin(); - currentBankMachine = *remainingBankMachines.begin(); bool forcedRefresh = (flexibilityCounter == maxPostponed); bool allBanksBusy = true; - for (auto it = remainingBankMachines.begin(); it != remainingBankMachines.end(); it++) + if (!skipSelection) { - if ((*it)->isIdle()) + currentIterator = remainingBankMachines.begin(); + currentBankMachine = *remainingBankMachines.begin(); + + for (auto it = remainingBankMachines.begin(); it != remainingBankMachines.end(); it++) { - currentIterator = it; - currentBankMachine = *it; - allBanksBusy = false; - break; + if ((*it)->isIdle()) + { + currentIterator = it; + currentBankMachine = *it; + allBanksBusy = false; + break; + } } } @@ -112,8 +116,16 @@ sc_time RefreshManagerBankwise::start() if (currentBankMachine->getState() == BmState::Activated) nextCommand = Command::PRE; else + { nextCommand = Command::REFB; + if (forcedRefresh) + { + currentBankMachine->block(); + skipSelection = true; + } + } + timeToSchedule = checker->timeToSatisfyConstraints(nextCommand, rank, currentBankMachine->getBankGroup(), currentBankMachine->getBank()); return timeToSchedule; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h index 9e7752fb..f3b39906 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.h @@ -74,6 +74,7 @@ private: int maxPulledin = 0; bool sleeping = false; + bool skipSelection = false; }; #endif // REFRESHMANAGERBANKWISE_H From 00836f432d46fb6738e7616b2642e33c1b825441 Mon Sep 17 00:00:00 2001 From: Matthias Jung Date: Wed, 5 Aug 2020 10:59:38 +0200 Subject: [PATCH 07/11] Added DRAMSys Logo --- DRAMSys/library/src/simulation/DRAMSys.cpp | 32 ++++++++++++++-------- 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/DRAMSys/library/src/simulation/DRAMSys.cpp b/DRAMSys/library/src/simulation/DRAMSys.cpp index eae66646..30a74d63 100644 --- a/DRAMSys/library/src/simulation/DRAMSys.cpp +++ b/DRAMSys/library/src/simulation/DRAMSys.cpp @@ -143,19 +143,27 @@ DRAMSys::~DRAMSys() void DRAMSys::logo() { -#define REDTXT(s) std::string("\033[0;31m" + std::string(s) + "\033[0m") -#define BOLDBLUETXT(s) std::string("\033[1;34m" + std::string(s) + "\033[0m") - std::cout << std::endl; - std::cout << REDTXT(" |||") << std::endl; - std::cout << REDTXT(" +---+ Microelectronic Systems") << std::endl; - std::cout << REDTXT("=| |= Design Research Group") << std::endl; - std::cout << REDTXT("=| |= ") << BOLDBLUETXT("Technische Universität Kaiserslautern") +#define GREENTXT(s) std::string(("\u001b[38;5;28m"+std::string((s))+"\033[0m")) +#define DGREENTXT(s) std::string(("\u001b[38;5;22m"+std::string((s))+"\033[0m")) +#define LGREENTXT(s) std::string(("\u001b[38;5;82m"+std::string((s))+"\033[0m")) +#define BLACKTXT(s) std::string(("\u001b[38;5;232m"+std::string((s))+"\033[0m")) +#define BOLDTXT(s) std::string(("\033[1;37m"+std::string((s))+"\033[0m")) + cout << std::endl + << BLACKTXT("■ ■ ")<< DGREENTXT("■ ") + << BOLDTXT("DRAMSys 4.0, Copyright (c) 2020") + << std::endl + << BLACKTXT("■ ") << DGREENTXT("■ ") << GREENTXT("■ ") + << "Technische Universitaet Kaiserslautern," + << std::endl + << DGREENTXT("■ ") << GREENTXT("■ ") << LGREENTXT("■ " ) + << "Fraunhofer IESE" + << std::endl << std::endl; - std::cout << REDTXT(" +---+ ") << std::endl; - std::cout << REDTXT(" ||| ") << "DRAMSys4.0" << std::endl; - std::cout << std::endl; -#undef REDTXT -#undef BOLDBLUETXT +#undef GREENTXT +#undef DGREENTXT +#undef LGREENTXT +#undef BLACKTXT +#undef BOLDTXT } void DRAMSys::setupDebugManager(const std::string &traceName __attribute__((unused))) From 772f6c8eedefe2b146840146434d37c5b458c6d2 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Wed, 5 Aug 2020 15:12:27 +0200 Subject: [PATCH 08/11] Prioritize command of PDM for staggered entry. --- DRAMSys/library/src/common/utils.cpp | 6 +++--- DRAMSys/library/src/common/utils.h | 2 +- DRAMSys/library/src/controller/Controller.cpp | 20 ++++++++++--------- DRAMSys/library/src/controller/Controller.h | 6 +++--- .../src/controller/ControllerRecordable.h | 18 ++++++++--------- .../powerdown/PowerDownManagerStaggered.cpp | 2 +- .../refresh/RefreshManagerBankwise.cpp | 2 +- .../refresh/RefreshManagerRankwise.cpp | 2 +- DRAMSys/library/src/simulation/Arbiter.h | 2 +- .../src/simulation/dram/DramRecordable.h | 3 ++- 10 files changed, 33 insertions(+), 30 deletions(-) diff --git a/DRAMSys/library/src/common/utils.cpp b/DRAMSys/library/src/common/utils.cpp index 014e957f..76237841 100644 --- a/DRAMSys/library/src/common/utils.cpp +++ b/DRAMSys/library/src/common/utils.cpp @@ -140,7 +140,7 @@ std::string parseString(json &obj, std::string name) SC_REPORT_FATAL("Query json", ("Parameter '" + name + "' does not exist.").c_str()); } -void setUpDummy(tlm_generic_payload &payload, Rank rank, Bank bank) +void setUpDummy(tlm_generic_payload &payload, uint64_t payloadID, Rank rank, BankGroup bankgroup, Bank bank) { payload.set_address(bank.getStartAddress()); payload.set_command(TLM_READ_COMMAND); @@ -149,6 +149,6 @@ void setUpDummy(tlm_generic_payload &payload, Rank rank, Bank bank) payload.set_dmi_allowed(false); payload.set_byte_enable_length(0); payload.set_streaming_width(0); - payload.set_extension(new DramExtension(Thread(UINT_MAX), rank, BankGroup(0), - bank, Row(0), Column(0), 0, 0)); + payload.set_extension(new DramExtension(Thread(UINT_MAX), rank, bankgroup, + bank, Row(0), Column(0), 0, payloadID)); } diff --git a/DRAMSys/library/src/common/utils.h b/DRAMSys/library/src/common/utils.h index 872fb3ba..6a073c81 100644 --- a/DRAMSys/library/src/common/utils.h +++ b/DRAMSys/library/src/common/utils.h @@ -110,7 +110,7 @@ unsigned int parseUint(nlohmann::json &obj, std::string name); double parseUdouble(nlohmann::json &obj, std::string name); std::string parseString(nlohmann::json &obj, std::string name); -void setUpDummy(tlm::tlm_generic_payload &payload, Rank rank = Rank(0), Bank bank = Bank(0)); +void setUpDummy(tlm::tlm_generic_payload &payload, uint64_t payloadID, Rank rank = Rank(0), BankGroup bankgroup = BankGroup(0), Bank bank = Bank(0)); #endif // UTILS_H diff --git a/DRAMSys/library/src/controller/Controller.cpp b/DRAMSys/library/src/controller/Controller.cpp index 232311fa..169e90ae 100644 --- a/DRAMSys/library/src/controller/Controller.cpp +++ b/DRAMSys/library/src/controller/Controller.cpp @@ -247,18 +247,20 @@ void Controller::controllerMethod() commandTuple = powerDownManagers[rankID]->getNextCommand(); if (std::get<0>(commandTuple) != Command::NOP) readyCommands.push_back(commandTuple); - - // (5.2) Check for refresh commands (PREA/PRE or REFA/REFB) - commandTuple = refreshManagers[rankID]->getNextCommand(); - if (std::get<0>(commandTuple) != Command::NOP) - readyCommands.push_back(commandTuple); - - // (5.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA) - for (auto it : bankMachinesOnRank[rankID]) + else { - commandTuple = it->getNextCommand(); + // (5.2) Check for refresh commands (PREA/PRE or REFA/REFB) + commandTuple = refreshManagers[rankID]->getNextCommand(); if (std::get<0>(commandTuple) != Command::NOP) readyCommands.push_back(commandTuple); + + // (5.3) Check for bank commands (PRE, ACT, RD/RDA or WR/WRA) + for (auto it : bankMachinesOnRank[rankID]) + { + commandTuple = it->getNextCommand(); + if (std::get<0>(commandTuple) != Command::NOP) + readyCommands.push_back(commandTuple); + } } } diff --git a/DRAMSys/library/src/controller/Controller.h b/DRAMSys/library/src/controller/Controller.h index f998afc3..bf22c2f2 100644 --- a/DRAMSys/library/src/controller/Controller.h +++ b/DRAMSys/library/src/controller/Controller.h @@ -65,9 +65,9 @@ public: virtual ~Controller(); protected: - virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &, tlm::tlm_phase &, sc_time &); - virtual tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &, tlm::tlm_phase &, sc_time &); - virtual unsigned int transport_dbg(tlm::tlm_generic_payload &); + virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &, tlm::tlm_phase &, sc_time &) override; + virtual tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &, tlm::tlm_phase &, sc_time &) override; + virtual unsigned int transport_dbg(tlm::tlm_generic_payload &) override; virtual void sendToFrontend(tlm::tlm_generic_payload *, tlm::tlm_phase); virtual void sendToDram(Command, tlm::tlm_generic_payload *); diff --git a/DRAMSys/library/src/controller/ControllerRecordable.h b/DRAMSys/library/src/controller/ControllerRecordable.h index a7bd6ea6..e39555f0 100644 --- a/DRAMSys/library/src/controller/ControllerRecordable.h +++ b/DRAMSys/library/src/controller/ControllerRecordable.h @@ -44,17 +44,17 @@ public: ControllerRecordable(sc_module_name name, TlmRecorder *tlmRecorder) : Controller(name), tlmRecorder(tlmRecorder) {} +protected: + virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &trans, + tlm::tlm_phase &phase, sc_time &delay) override; + virtual tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &trans, + tlm::tlm_phase &phase, sc_time &delay) override; + + virtual void sendToFrontend(tlm::tlm_generic_payload *, tlm::tlm_phase) override; + virtual void sendToDram(Command, tlm::tlm_generic_payload *) override; + private: - tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &trans, - tlm::tlm_phase &phase, sc_time &delay) override; - tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &trans, - tlm::tlm_phase &phase, sc_time &delay) override; - - void sendToFrontend(tlm::tlm_generic_payload *, tlm::tlm_phase) override; - void sendToDram(Command, tlm::tlm_generic_payload *) override; - void recordPhase(tlm::tlm_generic_payload &trans, tlm::tlm_phase phase, sc_time delay); - TlmRecorder *tlmRecorder; }; diff --git a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp index 9fca93cd..08a57e16 100644 --- a/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp +++ b/DRAMSys/library/src/controller/powerdown/PowerDownManagerStaggered.cpp @@ -40,7 +40,7 @@ using namespace tlm; PowerDownManagerStaggered::PowerDownManagerStaggered(Rank rank, CheckerIF *checker) : rank(rank), checker(checker) { - setUpDummy(powerDownPayload, rank); + setUpDummy(powerDownPayload, UINT64_MAX, rank); } void PowerDownManagerStaggered::triggerEntry() diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index 26de7e6e..3bdb71e3 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -50,7 +50,7 @@ RefreshManagerBankwise::RefreshManagerBankwise(std::vector &bankM refreshPayloads = std::vector(memSpec->banksPerRank); for (unsigned bankID = 0; bankID < memSpec->banksPerRank; bankID++) { - setUpDummy(refreshPayloads[bankID], rank, bankMachines[bankID]->getBank()); + setUpDummy(refreshPayloads[bankID], 0, rank, bankMachines[bankID]->getBankGroup(), bankMachines[bankID]->getBank()); allBankMachines.push_back(bankMachines[bankID]); } remainingBankMachines = allBankMachines; diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp index 956982c8..40df47e3 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerRankwise.cpp @@ -46,7 +46,7 @@ RefreshManagerRankwise::RefreshManagerRankwise(std::vector &bankM Configuration &config = Configuration::getInstance(); memSpec = config.memSpec; timeForNextTrigger = memSpec->getRefreshIntervalAB(); - setUpDummy(refreshPayload, rank); + setUpDummy(refreshPayload, 0, rank); maxPostponed = config.refreshMaxPostponed; maxPulledin = -config.refreshMaxPulledin; diff --git a/DRAMSys/library/src/simulation/Arbiter.h b/DRAMSys/library/src/simulation/Arbiter.h index 09936d51..a6373b33 100644 --- a/DRAMSys/library/src/simulation/Arbiter.h +++ b/DRAMSys/library/src/simulation/Arbiter.h @@ -82,7 +82,7 @@ private: tlm::tlm_sync_enum nb_transport_bw(int channelId, tlm::tlm_generic_payload &payload, tlm::tlm_phase &phase, sc_time &bwDelay); - virtual unsigned int transport_dbg(int /*id*/, tlm::tlm_generic_payload &trans); + unsigned int transport_dbg(int /*id*/, tlm::tlm_generic_payload &trans); void peqCallback(tlm::tlm_generic_payload &payload, const tlm::tlm_phase &phase); diff --git a/DRAMSys/library/src/simulation/dram/DramRecordable.h b/DRAMSys/library/src/simulation/dram/DramRecordable.h index c2c901c2..e750ecfc 100644 --- a/DRAMSys/library/src/simulation/dram/DramRecordable.h +++ b/DRAMSys/library/src/simulation/dram/DramRecordable.h @@ -48,8 +48,9 @@ class DramRecordable final : public BaseDram public: DramRecordable(sc_module_name, TlmRecorder *); SC_HAS_PROCESS(DramRecordable); + virtual ~DramRecordable() {} - virtual void reportPower(); + virtual void reportPower() override; private: virtual tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &payload, From fe0d60bbc871e2a737e492a28d103d3979bfbe1b Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Wed, 5 Aug 2020 16:55:38 +0200 Subject: [PATCH 09/11] Change name in logo to DRAMSys4.0. --- DRAMSys/library/src/simulation/DRAMSys.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DRAMSys/library/src/simulation/DRAMSys.cpp b/DRAMSys/library/src/simulation/DRAMSys.cpp index 30a74d63..fca962a1 100644 --- a/DRAMSys/library/src/simulation/DRAMSys.cpp +++ b/DRAMSys/library/src/simulation/DRAMSys.cpp @@ -150,7 +150,7 @@ void DRAMSys::logo() #define BOLDTXT(s) std::string(("\033[1;37m"+std::string((s))+"\033[0m")) cout << std::endl << BLACKTXT("■ ■ ")<< DGREENTXT("■ ") - << BOLDTXT("DRAMSys 4.0, Copyright (c) 2020") + << BOLDTXT("DRAMSys4.0, Copyright (c) 2020") << std::endl << BLACKTXT("■ ") << DGREENTXT("■ ") << GREENTXT("■ ") << "Technische Universitaet Kaiserslautern," From 7e2d0b1c3cb7e80d605c9cff382aa784e3e4e15f Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Thu, 6 Aug 2020 14:11:58 +0200 Subject: [PATCH 10/11] Fix bug that was introduced with merge. --- .../library/src/controller/refresh/RefreshManagerBankwise.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp index 3bdb71e3..6acb4e6c 100644 --- a/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp +++ b/DRAMSys/library/src/controller/refresh/RefreshManagerBankwise.cpp @@ -173,6 +173,7 @@ void RefreshManagerBankwise::updateState(Command command) switch (command) { case Command::REFB: + skipSelection = false; remainingBankMachines.erase(currentIterator); if (remainingBankMachines.empty()) remainingBankMachines = allBankMachines; From 15517bf53f496fc56ee3ef22c7b700f90d261c4d Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Mon, 10 Aug 2020 11:10:47 +0200 Subject: [PATCH 11/11] Correct bandwidth calculation, move Trace Analyzer to top of readme. --- DRAMSys/library/src/controller/ControllerIF.h | 20 +++++++------- README.md | 26 +++++++++---------- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/DRAMSys/library/src/controller/ControllerIF.h b/DRAMSys/library/src/controller/ControllerIF.h index 38f206fe..b23c3a2e 100644 --- a/DRAMSys/library/src/controller/ControllerIF.h +++ b/DRAMSys/library/src/controller/ControllerIF.h @@ -60,35 +60,35 @@ public: / Configuration::getInstance().memSpec->dataRate * Configuration::getInstance().memSpec->tCK; - double bandwidth = (activeTime / sc_time_stamp() * 100); - double bandwidthWoIdle = ((activeTime) / (sc_time_stamp() - idleTimeCollector.getIdleTime()) * 100); + double bandwidth = activeTime / sc_time_stamp(); + double bandwidthWoIdle = activeTime / (sc_time_stamp() - idleTimeCollector.getIdleTime()); double maxBandwidth = ( - // fCK in Mhz e.g. 800 [MHz]: - (1000000 / Configuration::getInstance().memSpec->tCK.to_double()) + // fCK in GHz e.g. 1 [GHz] (tCK in ps): + (1000 / Configuration::getInstance().memSpec->tCK.to_double()) // DataRate e.g. 2 * Configuration::getInstance().memSpec->dataRate // BusWidth e.g. 8 or 64 * Configuration::getInstance().memSpec->bitWidth // Number of devices on a DIMM e.g. 8 - * Configuration::getInstance().memSpec->numberOfDevicesOnDIMM ) / ( 1024 ); + * Configuration::getInstance().memSpec->numberOfDevicesOnDIMM ); std::cout << name() << std::string(" Total Time: ") << sc_time_stamp().to_string() << std::endl; std::cout << name() << std::string(" AVG BW: ") << std::fixed << std::setprecision(2) - << ((bandwidth / 100) * maxBandwidth) - << " Gibit/s (" << bandwidth << " %)" + << (bandwidth * maxBandwidth) + << " Gb/s (" << (bandwidth * 100) << " %)" << std::endl; std::cout << name() << std::string(" AVG BW\\IDLE: ") << std::fixed << std::setprecision(2) - << ((bandwidthWoIdle / 100) * maxBandwidth) - << " Gibit/s (" << bandwidthWoIdle << " %)" + << (bandwidthWoIdle * maxBandwidth) + << " Gb/s (" << (bandwidthWoIdle * 100) << " %)" << endl; std::cout << name() << std::string(" MAX BW: ") << std::fixed << std::setprecision(2) - << maxBandwidth << " Gibit/s" + << maxBandwidth << " Gb/s" << std::endl; } diff --git a/README.md b/README.md index 909d2fe4..1f0b201e 100644 --- a/README.md +++ b/README.md @@ -31,6 +31,18 @@ A UML diagram of the software architecture is presented below; different compone UML +## Trace Analyzer Consulting and Custom-Tailored Modifications + +To provide better analysis capabilities for DRAM subsystem design space exploration than the usual performance-related outputs to the console, DRAMSys offers the Trace Analyzer. + +All requests, responses and DRAM commands can be recorded in an SQLite trace database during a simulation and visualized with the tool afterwards. An evaluation of the trace databases can be performed with the powerful Python interface of the Trace Analyzer. Different metrics are described as SQL statements and formulas in Python, which can be customized or extended without recompilation. + +The Trace Analyzer's main window is shown below. + +If you are interested in the database recording feature and the Trace Analyzer, if you need support on how to setup DRAMSys in a virtual platform of your company, or if you require custom modifications of the simulator please contact [Matthias Jung](mailto:matthias.jung@iese.fraunhofer.de). + +![Trace Analyzer Main Window](DRAMSys/docs/images/traceanalyzer.png) + ## Basic Setup Start using DRAMSys by cloning the repository. @@ -342,7 +354,7 @@ An example follows. ## DRAMSys with Thermal Simulation -The thermal simulation is performed by a **3D-ICE** [8] server accessed through the network. Therefore users interested in thermal simulation during their DRAMSys simulations need to make sure they have a 3D-ICE server up and running before starting. For more information about 3D-ICE visit the [official website](https://www.epfl.ch/labs/esl/open-source-software-projects/3d-ice/). +The thermal simulation is performed by a **3D-ICE** [8] server accessed through the network. Therefore users interested in thermal simulation during their DRAMSys simulations need to make sure they have a 3D-ICE server up and running before starting. For more information about 3D-ICE visit the [official website](https://www.epfl.ch/labs/esl/open-source-software-projects/3d-ice/). An example video that visualizes the results of a thermal simulation is provided on [Youtube](https://www.youtube.com/watch?v=Eacsq71hHtY). #### Installing 3D-ICE @@ -506,18 +518,6 @@ The content of [config.json](DRAMSys/library/resources/configs/thermalsim/config - true: generate power map files during thermal simulation - false: do not generate power map files during thermal simulation -## Trace Analyzer Consulting and Custom-Tailored Modifications - -To provide better analysis capabilities for DRAM subsystem design space exploration than the usual performance-related outputs to the console, DRAMSys offers the Trace Analyzer. - -All requests, responses and DRAM commands can be recorded in an SQLite trace database during a simulation and visualized with the tool afterwards. An evaluation of the trace databases can be performed with the powerful Python interface of the Trace Analyzer. Different metrics are described as SQL statements and formulas in Python, which can be customized or extended without recompilation. - -The Trace Analyzer's main window is shown below. - -If you are interested in the database recording feature and the Trace Analyzer, if you need support on how to setup DRAMSys in a virtual platform of your company, or if you require custom modifications of the simulator please contact [Matthias Jung](mailto:matthias.jung@iese.fraunhofer.de). - -![Trace Analyzer Main Window](DRAMSys/docs/images/traceanalyzer.png) - ## Acknowledgements The development of DRAMSys was supported by the German Research Foundation (DFG) as part of the priority program [Dependable Embedded Systems SPP1500](http://spp1500.itec.kit.edu) and the DFG grant no. [WE2442/10-1](https://www.uni-kl.de/en/3d-dram/). Furthermore, it was supported within the Fraunhofer and DFG cooperation program (grant no. [WE2442/14-1](https://www.iese.fraunhofer.de/en/innovation_trends/autonomous-systems/memtonomy.html)) and by the [Fraunhofer High Performance Center for Simulation- and Software-Based Innovation](https://www.leistungszentrum-simulation-software.de/en.html). Special thanks go to all listed contributors for their work and commitment during seven years of development.