diff --git a/DRAMSys/library/src/controller/ControllerNew.cpp b/DRAMSys/library/src/controller/ControllerNew.cpp
index 9b9d8efe..3f25d984 100644
--- a/DRAMSys/library/src/controller/ControllerNew.cpp
+++ b/DRAMSys/library/src/controller/ControllerNew.cpp
@@ -86,42 +86,6 @@ ControllerNew::~ControllerNew()
 {
     endBandwithIdleCollector();
 
-    sc_time activeTime = numberOfTransactionsServed
-                         * Configuration::getInstance().memSpec->BurstLength
-                         / Configuration::getInstance().memSpec->DataRate
-                         * Configuration::getInstance().memSpec->clk;
-
-    double bandwidth = (activeTime / sc_time_stamp() * 100);
-    double bandwidth_IDLE = ((activeTime) / (sc_time_stamp() - idleTime) * 100);
-
-    double maxBandwidth = (
-                              // clk in Mhz e.g. 800 [MHz]:
-                              (1000000 / Configuration::getInstance().memSpec->clk.to_double())
-                              // DataRate e.g. 2
-                              * Configuration::getInstance().memSpec->DataRate
-                              // BusWidth e.g. 8 or 64
-                              * Configuration::getInstance().memSpec->bitWidth
-                              //   Number of devices on a DIMM e.g. 8
-                              * Configuration::getInstance().NumberOfDevicesOnDIMM ) / ( 1024 );
-
-    std::cout << name() << string("  Total Time:     ")
-         << sc_time_stamp().to_string()
-         << std::endl;
-    std::cout << name() << string("  AVG BW:         ")
-         << std::fixed << std::setprecision(2)
-         << ((bandwidth / 100) * maxBandwidth)
-         << " Gibit/s (" << bandwidth << " %)"
-         << std::endl;
-    std::cout << name() << string("  AVG BW\\IDLE:    ")
-         << std::fixed << std::setprecision(2)
-         << ((bandwidth_IDLE / 100) * maxBandwidth)
-         << " Gibit/s (" << bandwidth_IDLE << " %)"
-         << endl;
-    std::cout << name() << string("  MAX BW:         ")
-         << std::fixed << std::setprecision(2)
-         << maxBandwidth << " Gibit/s"
-         << std::endl;
-
     delete checker;
     for (auto it : bankMachines)
         delete it.second;
diff --git a/DRAMSys/library/src/controller/ControllerNew.h b/DRAMSys/library/src/controller/ControllerNew.h
index 2fafba4e..31bfc7ab 100644
--- a/DRAMSys/library/src/controller/ControllerNew.h
+++ b/DRAMSys/library/src/controller/ControllerNew.h
@@ -95,14 +95,11 @@ private:
 
     std::map<Bank, sc_time> commandFinishedTime;
 
-    // Bandwidth related:
+    // Bandwidth related
     sc_time idleStart;
-    sc_time idleTime = SC_ZERO_TIME;
     bool isIdle = false;
     void startBandwidthIdleCollector();
     void endBandwithIdleCollector();
-
-    uint64_t numberOfTransactionsServed = 0;
 };
 
 #endif // CONTROLLERNEW_H
diff --git a/DRAMSys/library/src/controller/GenericController.h b/DRAMSys/library/src/controller/GenericController.h
index 08d016b0..3dbffffd 100644
--- a/DRAMSys/library/src/controller/GenericController.h
+++ b/DRAMSys/library/src/controller/GenericController.h
@@ -5,6 +5,7 @@
 #include <tlm.h>
 #include <tlm_utils/simple_initiator_socket.h>
 #include <tlm_utils/simple_target_socket.h>
+#include "core/configuration/Configuration.h"
 
 using namespace tlm;
 
@@ -14,9 +15,10 @@ class GenericController : public sc_module
 {
 public:
     // Already create and bind sockets to the virtual functions
-    tlm_utils::simple_target_socket<GenericController> tSocket; // DRAMSys side
+    tlm_utils::simple_target_socket<GenericController> tSocket; // Arbiter side
     tlm_utils::simple_initiator_socket<GenericController> iSocket; // DRAM side
 
+protected:
     // Bind sockets with virtual functions
     GenericController(sc_module_name name) :
         sc_module(name), tSocket("tSocket"), iSocket("iSocket")
@@ -28,13 +30,53 @@ public:
     SC_HAS_PROCESS(GenericController);
 
     // Destructor
-    virtual ~GenericController() {}
+    virtual ~GenericController()
+    {
+        sc_time activeTime = numberOfTransactionsServed
+                             * Configuration::getInstance().memSpec->BurstLength
+                             / Configuration::getInstance().memSpec->DataRate
+                             * Configuration::getInstance().memSpec->clk;
+
+        double bandwidth = (activeTime / sc_time_stamp() * 100);
+        double bandwidth_IDLE = ((activeTime) / (sc_time_stamp() - idleTime) * 100);
+
+        double maxBandwidth = (
+                                  // clk in Mhz e.g. 800 [MHz]:
+                                  (1000000 / Configuration::getInstance().memSpec->clk.to_double())
+                                  // DataRate e.g. 2
+                                  * Configuration::getInstance().memSpec->DataRate
+                                  // BusWidth e.g. 8 or 64
+                                  * Configuration::getInstance().memSpec->bitWidth
+                                  //   Number of devices on a DIMM e.g. 8
+                                  * Configuration::getInstance().NumberOfDevicesOnDIMM ) / ( 1024 );
+
+        std::cout << name() << std::string("  Total Time:     ")
+             << sc_time_stamp().to_string()
+             << std::endl;
+        std::cout << name() << std::string("  AVG BW:         ")
+             << std::fixed << std::setprecision(2)
+             << ((bandwidth / 100) * maxBandwidth)
+             << " Gibit/s (" << bandwidth << " %)"
+             << std::endl;
+        std::cout << name() << std::string("  AVG BW\\IDLE:    ")
+             << std::fixed << std::setprecision(2)
+             << ((bandwidth_IDLE / 100) * maxBandwidth)
+             << " Gibit/s (" << bandwidth_IDLE << " %)"
+             << endl;
+        std::cout << name() << std::string("  MAX BW:         ")
+             << std::fixed << std::setprecision(2)
+             << maxBandwidth << " Gibit/s"
+             << std::endl;
+    }
 
-protected:
     // Virtual transport functions
     virtual tlm_sync_enum nb_transport_fw(tlm_generic_payload &, tlm_phase &, sc_time &) = 0;
     virtual unsigned int transport_dbg(tlm_generic_payload &) = 0;
     virtual tlm_sync_enum nb_transport_bw(tlm_generic_payload &, tlm_phase &, sc_time &) = 0;
+
+    // Bandwidth related
+    sc_time idleTime = SC_ZERO_TIME;
+    uint64_t numberOfTransactionsServed = 0;
 };