From 05098ab3ebb6b5d81cda69a62267b7f96df71dd6 Mon Sep 17 00:00:00 2001 From: Lukas Steiner Date: Thu, 2 Sep 2021 09:27:15 +0200 Subject: [PATCH] Rename refresh management decrement. --- .../configs/memspecs/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3200A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3600A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4000A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4400A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4800A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5200A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5600A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6000A.json | 2 +- .../configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6400A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3200A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3600A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4000A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4800A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5200A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5600A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6000A.json | 2 +- .../configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6400A.json | 2 +- .../configs/memspecs/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json | 2 +- DRAMSys/library/src/configuration/memspec/MemSpec.cpp | 6 +++--- DRAMSys/library/src/configuration/memspec/MemSpec.h | 6 +++--- .../library/src/configuration/memspec/MemSpecDDR5.cpp | 10 +++++----- .../library/src/configuration/memspec/MemSpecDDR5.h | 8 ++++---- DRAMSys/library/src/controller/BankMachine.cpp | 4 ++-- DRAMSys/library/src/controller/BankMachine.h | 2 +- 26 files changed, 38 insertions(+), 38 deletions(-) diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json index 7e3db80b..f05dcf14 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x2x8x4Gbx4_DDR5-3200A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 32, "RAAMMT" : 64, - "RAADEC" : 16 + "RAACDR" : 16 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-3200A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3200A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3200A.json index e73c156b..188a6e1c 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3200A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3200A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-3200A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3600A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3600A.json index e6ea9571..f93a41b9 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3600A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-3600A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-3600A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4000A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4000A.json index 5523e7c0..ca96c120 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4000A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4000A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-4000A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4400A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4400A.json index fb64fde3..5848a928 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4400A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4400A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-4400A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4800A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4800A.json index 9e5d8756..5d854ebf 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4800A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-4800A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-4800A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5200A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5200A.json index 861f84d4..f9dfbab2 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5200A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5200A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-5200A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5600A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5600A.json index ac0b7998..d7fbd3d4 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5600A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-5600A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-5600A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6000A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6000A.json index aeafa9ec..1c87d8dd 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6000A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6000A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-6000A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6400A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6400A.json index d71c3de1..c1029bbd 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6400A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x4x1Gbx8_DDR5-6400A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x4x1Gbx8_DDR5-6400A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3200A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3200A.json index c20e3f5b..fe6df96b 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3200A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3200A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 32, "RAAMMT" : 1, - "RAADEC" : 16 + "RAACDR" : 16 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-3200A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3600A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3600A.json index 35182329..330f47e8 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3600A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-3600A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-3600A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4000A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4000A.json index f8ff32ee..a1930cbf 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4000A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4000A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-4000A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json index aaa60207..c529788e 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4400A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-4400A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4800A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4800A.json index f368bad2..fc1a5abd 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4800A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-4800A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-4800A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5200A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5200A.json index 22f49b27..7c533673 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5200A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5200A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-5200A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5600A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5600A.json index 440bb3dd..040b69d0 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5600A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-5600A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-5600A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6000A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6000A.json index db6b66a5..c6ac45ea 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6000A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6000A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-6000A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6400A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6400A.json index f8ec619a..b70d884a 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6400A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x2Gbx4_DDR5-6400A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x2Gbx4_DDR5-6400A", "memoryType": "DDR5", diff --git a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json index 6942b05c..e27b3acd 100644 --- a/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json +++ b/DRAMSys/library/resources/configs/memspecs/JEDEC_2x8x8x2Gbx4_DDR5-3200A.json @@ -18,7 +18,7 @@ "refMode": 1, "RAAIMT" : 0, "RAAMMT" : 1, - "RAADEC" : 0 + "RAACDR" : 0 }, "memoryId": "JEDEC_2x8x8x8Gbx4_DDR5-3200A_4bit", "memoryType": "DDR5", diff --git a/DRAMSys/library/src/configuration/memspec/MemSpec.cpp b/DRAMSys/library/src/configuration/memspec/MemSpec.cpp index fc4de80b..7929150d 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpec.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpec.cpp @@ -98,19 +98,19 @@ sc_time MemSpec::getRefreshIntervalSB() const return SC_ZERO_TIME; } -uint64_t MemSpec::getRAADEC() const +unsigned MemSpec::getRAACDR() const { SC_REPORT_FATAL("MemSpec", "Refresh Management not supported"); return 0; } -uint64_t MemSpec::getRAAIMT() const +unsigned MemSpec::getRAAIMT() const { SC_REPORT_FATAL("MemSpec", "Refresh Management not supported"); return 0; } -uint64_t MemSpec::getRAAMMT() const +unsigned MemSpec::getRAAMMT() const { SC_REPORT_FATAL("MemSpec", "Refresh Management not supported"); return 0; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpec.h b/DRAMSys/library/src/configuration/memspec/MemSpec.h index a5d0893a..4c6b9f9d 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpec.h +++ b/DRAMSys/library/src/configuration/memspec/MemSpec.h @@ -80,9 +80,9 @@ public: virtual sc_core::sc_time getRefreshIntervalPB() const; virtual sc_core::sc_time getRefreshIntervalSB() const; - virtual uint64_t getRAADEC() const; - virtual uint64_t getRAAIMT() const; - virtual uint64_t getRAAMMT() const; + virtual unsigned getRAAIMT() const; + virtual unsigned getRAAMMT() const; + virtual unsigned getRAACDR() const; virtual bool hasRasAndCasBus() const; diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp index a3aa091c..1a2b4a45 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp @@ -64,7 +64,7 @@ MemSpecDDR5::MemSpecDDR5(json &memspec) refMode(parseUint(memspec["memarchitecturespec"]["refMode"], "refMode")), RAAIMT(parseUint(memspec["memarchitecturespec"]["RAAIMT"], "RAAIMT")), RAAMMT(parseUint(memspec["memarchitecturespec"]["RAAMMT"], "RAAMMT")), - RAADEC(parseUint(memspec["memarchitecturespec"]["RAADEC"], "RAADEC")), + RAACDR(parseUint(memspec["memarchitecturespec"]["RAACDR"], "RAACDR")), tRCD (tCK * parseUint(memspec["memtimingspec"]["RCD"], "RCD")), tPPD (tCK * parseUint(memspec["memtimingspec"]["PPD"], "PPD")), tRP (tCK * parseUint(memspec["memtimingspec"]["RP"], "RP")), @@ -191,17 +191,17 @@ sc_time MemSpecDDR5::getRefreshIntervalSB() const return tREFIsb; } -uint64_t MemSpecDDR5::getRAADEC() const +unsigned MemSpecDDR5::getRAACDR() const { - return RAADEC; + return RAACDR; } -uint64_t MemSpecDDR5::getRAAIMT() const +unsigned MemSpecDDR5::getRAAIMT() const { return RAAIMT; } -uint64_t MemSpecDDR5::getRAAMMT() const +unsigned MemSpecDDR5::getRAAMMT() const { return RAAMMT; } diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h index 00420f00..44e344f8 100644 --- a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h @@ -54,7 +54,7 @@ public: const unsigned refMode; const unsigned RAAIMT; const unsigned RAAMMT; - const unsigned RAADEC; + const unsigned RAACDR; // Memspec Variables: const sc_core::sc_time tRCD; @@ -116,9 +116,9 @@ public: sc_core::sc_time getRefreshIntervalAB() const override; sc_core::sc_time getRefreshIntervalSB() const override; - uint64_t getRAADEC() const override; - uint64_t getRAAIMT() const override; - uint64_t getRAAMMT() const override; + unsigned getRAACDR() const override; + unsigned getRAAIMT() const override; + unsigned getRAAMMT() const override; sc_core::sc_time getExecutionTime(Command command, const tlm::tlm_generic_payload &payload) const override; TimeInterval getIntervalOnDataStrobe(Command command, const tlm::tlm_generic_payload &payload) const override; diff --git a/DRAMSys/library/src/controller/BankMachine.cpp b/DRAMSys/library/src/controller/BankMachine.cpp index a2d821f8..7995a175 100644 --- a/DRAMSys/library/src/controller/BankMachine.cpp +++ b/DRAMSys/library/src/controller/BankMachine.cpp @@ -82,8 +82,8 @@ void BankMachine::updateState(Command command) if (refreshManagement) { - if (refreshManagementCounter > memSpec->getRAADEC()) - refreshManagementCounter -= memSpec->getRAADEC(); + if (refreshManagementCounter > memSpec->getRAACDR()) + refreshManagementCounter -= memSpec->getRAACDR(); else refreshManagementCounter = 0; } diff --git a/DRAMSys/library/src/controller/BankMachine.h b/DRAMSys/library/src/controller/BankMachine.h index 84da9ed0..5dbae1ca 100644 --- a/DRAMSys/library/src/controller/BankMachine.h +++ b/DRAMSys/library/src/controller/BankMachine.h @@ -77,7 +77,7 @@ protected: Bank bank; bool blocked = false; bool sleeping = false; - uint64_t refreshManagementCounter = 0; + unsigned refreshManagementCounter = 0; bool refreshManagement = false; };