changed folder name of project from DRAM to dram

dram/src/core/Controller.cpp

@@ -0,0 +1,78 @@
+/*
+ * controller.cpp
+ *
+ *  Created on: Mar 5, 2014
+ *      Author: jonny
+ */
+
+#include "Controller.h"
+#include "systemc.h"
+#include "core/scheduling/checker/ActivateChecker.h"
+#include "core/scheduling/checker/PrechargeChecker.h"
+#include "core/scheduling/checker/ReadChecker.h"
+#include "core/scheduling/checker/WriteChecker.h"
+
+namespace core {
+
+DramController::DramController(IControllerWrapper& wrapper):
+		 config(),state(config.numberOfBanks), commandSequenceGenerator(state), commandChecker(),allCommandChecker(),commandSequenceScheduler(
+				commandChecker), bus(config, state, allCommandChecker, wrapper), refreshManager(config.Timings.refreshTimings[0], bus)
+{
+	addCommandChecker(Activate, new ActivateChecker(config, bus));
+	addCommandChecker(Precharge, new PrechargeChecker(config, bus));
+	addCommandChecker(Read, new ReadChecker(config, bus));
+	addCommandChecker(Write, new WriteChecker(config, bus));
+}
+
+
+DramController::~DramController()
+{
+	for (std::vector<ICommandChecker*>::iterator it = allCommandChecker.begin(); it != allCommandChecker.end();++it)
+	{
+		delete *it;
+	}
+
+}
+
+void DramController::scheduleRefresh(sc_time time)
+{
+	refreshManager.scheduleRefresh(time);
+}
+
+void DramController::addCommandChecker(Command command, ICommandChecker* checker)
+{
+	commandChecker[command] = checker;
+	allCommandChecker.push_back(checker);
+}
+
+
+void DramController::schedule(sc_time currentTime, tlm::tlm_generic_payload& externalTransaction)
+{
+	bus.cleanUpBus(currentTime);
+
+	CommandSequence sequence = commandSequenceGenerator.generateCommandSequence(
+			externalTransaction);
+	CommandSchedule schedule = commandSequenceScheduler.prepareSchedule(currentTime,
+			externalTransaction, sequence);
+
+	while (refreshManager.hasCollision(schedule))
+	{
+		refreshManager.scheduleRefresh(currentTime);
+		sequence = commandSequenceGenerator.generateCommandSequence(externalTransaction);
+		schedule = commandSequenceScheduler.prepareSchedule(currentTime, externalTransaction,
+				sequence);
+		assert(schedule.getExecutionTime() < config.Timings.refreshTimings[0].tREFI); //TODO make nice
+	}
+
+	bus.schedule(schedule);
+}
+
+const ICommandChecker& DramController::getChecker(Command command) const
+{
+	std::map<Command, ICommandChecker*>::const_iterator result = commandChecker.find(command);
+	assert(result != commandChecker.end());
+	return *(result->second);
+}
+
+} /* namespace controller */
+