<simulation>
    <!-- Simulation file identifier -->
    <simulationid id="ddr3_postpone_ref_test"></simulationid>
    <!-- Configuration for the DRAMSys Simulator -->
    <simconfig src="ddr3.xml" />
    <!-- Temperature Simulator Configuration -->
    <thermalconfig src="config.xml" />
    <!-- Memory Device Specification: Which Device is on the DDR3 DIMM -->
    <memspec src="MICRON_1Gb_DDR3-1600_8bit_G.xml"></memspec>
    <!-- Addressmapping Configuration of the Memory Controller -->
    <addressmapping src="am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml"></addressmapping>
    <!-- Memory Controller Configuration: -->
    <mcconfig src="fifoStrict.xml"/>
    <!--
    The following trace setup is only used in standalone mode.
    In library mode e.g. in Platform Architect the trace setup is ignored.
    -->
    <tracesetup>
        <device clkMhz="1000">ddr3_postpone_ref_test_1.stl</device>
    </tracesetup>
</simulation>
