<!-- 
DDR3 Example:
2GB x64 DIMM with: 8 * 2 Gb x8 Devices (e.g. Micron MT41J256M8) with Page Size: 1KB

Device Characteristics:

Rows: 32 K [14:0]  -> 15 bit
Bank: 8    [2:0]   -> 3  bit
Cols: 1 K  [9:0]   -> 10 bit

Due to the DIMM we have a Byte Offset Y
       
3 2 2 2 2 2 2 2 1 1 1 1 1 1 1 | 1 1 1 | 1 1 1 
0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 | 5 4 3 | 2 1 0 9 8 7 6 5 4 3 | 2 1 0
R R R R R R R R R R R R R R R | B B B | C C C C C C C C C C | Y Y Y
-->

<addressmapping>
    <channel from="128"  to="128"  /> <!-- only one channel -->
    <row     from="16"   to="30"   />
    <bank    from="13"   to="15"   />
    <column  from="3"    to="12"   />
    <bytes   from="0"    to="2"    />
</addressmapping>

