#!/usr/bin/tclsh
#
# Copyright (c) 2017, Technische Universität Kaiserslautern
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
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# 1. Redistributions of source code must retain the above copyright notice,
#    this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in the
#    documentation and/or other materials provided with the distribution.
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# 3. Neither the name of the copyright holder nor the names of its
#    contributors may be used to endorse or promote products derived from
#    this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
# OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors:
#    Matthias Jung

# Setup PCT:
::pct::open_library $env(COWAREHOME)/pc/TLM2_PROTOCOLS/ConvergenSC/TLM2_PROTOCOLS.xml
::pct::clear_systemc_defines
::pct::clear_systemc_include_path

# Import Dummy Module:
::pct::set_import_protocol_generation_flag true
::pct::set_update_existing_encaps_flag true
::pct::set_dynamic_port_arrays_flag true
::pct::set_import_scml_properties_flag true
::pct::load_all_modules "--set-category" "dummy.h"
#::pct::create_instance Project:DRAMSys /HARDWARE i_DRAMSys DRAMSys {DRAMSys(simulationToRun, pathToResources)}
::pct::create_instance Project:DRAMSysRecordable /HARDWARE i_DRAMSys DRAMSysRecordable {DRAMSysRecordable(simulationToRun, pathToResources)}

# Add DRAMSys Library // ../[glob -type d ../../build*]/simulator/
::pct::set_simulation_build_project_setting Debug Libraries "sqlite3 DRAMSysLibrary DRAMPower"
::pct::set_simulation_build_project_setting Debug {Library Search Paths} [concat ../../../build/library/ ../../../build/library/src/common/third_party/DRAMPower]
::pct::set_simulation_build_project_setting Debug {Defined Symbols} SC_INCLUDE_DYNAMIC_PROCESSES=1
::pct::set_simulation_build_project_setting Debug {Compiler Flags} {-std=c++11}

# Disable Fast Linking and Caching and Elaboration
::pct::set_simulation_build_project_setting Debug {Cache Objects} false
::pct::set_simulation_build_project_setting Debug {Fast Linking} false
::scsh::build-options -skip-elab on
### TODO: count number of cores:
::pct::set_simulation_build_project_setting Debug {Make Jobs} 16 

# Configure DDR3 Example:
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} pathToResources ../../library/resources/
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../library/resources/simulations/ddr3-example.json

# Build Rest of the Example system:
::pct::open_library "GFRBM"
::pct::create_instance GFRBM:GFRBM_TLM2 /HARDWARE i_GFRBM_TLM2 GFRBM_TLM2 GFRBM_TLM2()
::pct::create_connection C /HARDWARE /HARDWARE/i_GFRBM_TLM2/INIT_SOCKET /HARDWARE/i_DRAMSys/tSocket
::pct::open_library "GenericIPlib"
::pct::create_instance GenericIPlib:ClockGenerator /HARDWARE i_ClockGenerator GIPL_CLK {GIPL_CLK(period, period_unit, duty_cycle, start_time, start_time_unit, posedge_first)}
::pct::create_connection C_1 /HARDWARE /HARDWARE/i_ClockGenerator/CLK /HARDWARE/i_GFRBM_TLM2/CLK

# Configure GFRBM:
::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Scml Properties} InputFile ../../library/resources/traces/pct.stl
::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Template Arguments} NUM_IN_IRQ 0
::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Template Arguments} NUM_OUT_IRQ 0
::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Extra properties} /all_encaps/LogFile foo.log
::pct::set_param_value /HARDWARE/i_GFRBM_TLM2 {Extra properties} /all_encaps/DebugLevel 6

# Design:
::pct::set_background_color_rgb /HARDWARE/i_DRAMSys 113 200 55 255

